BD9838MWV [ROHM]

Switching Controller, Current-mode, 550kHz Switching Freq-Max, 7 X 7 MM, UQFN-56;


型号：	BD9838MWV
厂家：	ROHM
描述：	Switching Controller, Current-mode, 550kHz Switching Freq-Max, 7 X 7 MM, UQFN-56 开关
文件：	总5页 (文件大小：214K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

1/4

STURUCTURE

Type

Silicon Monolithic Integrated Circuit

6 Channel Switching Regulator control system

PRODUCUT SERIES

BD９８３９MWV

Fig. 1 (Plastic Mold)

Fig. 2

THYSICAL DIMENSIONS

BLOCK DIAGRAM

FEATURES

● Step Down 5CH, Step Up 1CH total 6CH included.

●

FET 4ch (CH1~CH4) for Synchronous Switching Regulator

Short Circuit Protection (SCP)

Under Voltage Lockout Function (UVLO)

Thermal Shut Down Function (TSD)

Independent ON/OFF Function Each Channel(Stand_by Current Is Under 5uA)

UQFN056V7070 Package

Absolute Maximum Ratings（Ta=25℃）

Parameter

Symbol

Limits

Units

Power Supply Voltage

VCC,PVCC1～6

BOOT1～4

17.5

Input Voltage

BOOT-Lx Voltage

Power Dissipation

Lx1～4,OUT5,6

ΔBOOT1～4

6.5

420(*1)

930(*2)

-30～+85

-55～+125

125

℃

Operating Temperature

Storage Temperature

Junction Temperature

Topr

Tstg

Tjmax

(*1) Without external heat sink, the power dissipation degrades by 4.2mW/℃ above 25℃.

(*2)Power dissipation degrades by 9.3mW/℃ above 25℃, when mounted on a PCB (74.2mm×74.2mm×1.6mm).

Recommended Operating Conditions（Ta=25℃）

Spec.

Typ

Parameter

Symbol

Units

Min

Max

VCC,PVCC1～56

BOOT1～4

⊿BOOT1～4

Idhnl

Power Supply Voltage

3.5

BOOT-Lx Voltage

CH1～4 H NMOS Drain Current

CH1～4 L NMOS Drain Current

Frequency Stability (*4)

5.0

1.5(*3)

2000

2.2

Idlnl

fosc

300

0.47

0.047

500

1.0

0.1

kHz

VREGA– GND Capacitor

VCC – VREGD Capacitor

BOOT – Lx Capacitor

CVREGA

CVREGD

CBOOT

2.2

0.22

(*3) FET Drain Current Max value.Set the current value within Power dissipation in the application.

(*4) Max 1MHz for Ch1 ~ Ch4.

Status of this document

The Japanese language version of this document shall be the official specification.

Any translation of this document shall be for reference only.

REV. C

2/4

● Electrical Characteristics （Ta=25℃，VCC=7V，fosc=500kHz with no designation）

Limits

Parameter

Symbol

Units

Condition

Min.

Typ.

Max.

【Whole Device】

Standby Current

Circuit Current

Ｉｓｔ

0.1

6.0

Ｉｃｃ

9.0

FB＝0V

【Reference Voltage】

Output Voltage

ＶＲＥＧＡ

DVli

2.475

2.500

2.525

VREGA=-1mA

Line regulation

VCC=4V～10V、VREGA=-1ｍA

VREGA=-1ｍA～-5ｍA

VREGA=0V

Load regulation

ＤＶｌｏ

Ｉｏｓ

Output current at VREGA PIN shorted

【Bias Voltage】

-30

-5

Output Voltage

ＶＲＥＧＤ

4.90

5.00

5.10

VREGD=-10ｍA

【Oscillator】

Oscillator Frequency CH1～６

Oscillator Frequency coefficient

【Current Mode Circuit】

Minimum OFF time of H Nch（CH１）

Minimum OFF time of H Nch（CH２）

Minimum OFF time of H Nch（CH３）

Minimum OFF time of H Nch（CH４）

ｆｏｓｃ

Ｄｆ

450

500

550

kHz

RT=10kΩ、CT=220ｐF、SEL=”L”

VCC=4V～10V

Ｔｏｆｆｍｉｎ１

Ｔｏｆｆｍｉｎ２

Ｔｏｆｆｍｉｎ３

Ｔｏｆｆｍｉｎ４

ＶＳＥＬＨ

ＶＳＥＬＬ

100

VCC

0.8

nsec

（ｆｏｓｃ=ｆｏｓｃ/2）（CH1～4）

SEL control voltage

-0.3

【PWM Comparator】

０％Duty threshold（CH5,6）

１００％Duty threshold（CH5）

MAX Duty ｃｙｃｌｅＣＨ６

【ERRORAMP１】（ＣＨ１）

Threshold Voltage

Ｖｔ０

1.00

1.10

1.60

Ｖｔ１００

Ｄｍａｘ６

1.70

ＶＥＴＨ

ＶＯＬ

0.790

0.800

0.03

2.4

0.810

0.2

Output Voltage Ｌ

INV=0.9V

Output Voltage Ｈ

ＶＯＨ

2.2

1.8

INV=0.7V

Output Sink Current

Output Source Current

Input Bias Current

ＩＳＩＮＫ

ＩＳＯＵＲＣＥ

ＩＢＩＡＳ

ＡＶ

3.6

MHz

INV=0.9V、FB=1.25V

INV=0.7V、FB=1.25V

INV=0V

-100

-50

-150

Voltage Gain

Open loop ｇain

Frequency Bandwidth

【ERRORAMP２】（ＣＨ２～５）

Threshold Voltage

ＢＷ

ＶＥＴＨ

ＶＯＬ

0.990

1.000

0.03

2.4

1.010

0.2

Output Voltage Ｌ

INV=1.1V

Output Voltage Ｈ

ＶＯＨ

2.2

1.8

INV=0.9V

Output Sink Current

Output Source Current

Input Bias Current

ＩＳＩＮＫ

ＩＳＯＵＲＣＥ

ＩＢＩＡＳ

ＡＶ

3.6

MHz

INV=1.1V、FB=1.25V

INV=0.9V、FB=1.25V

INV=0V

-100

-50

-150

Voltage Gain

Open loop ｇain

Frequency Bandwidth

【ERRORAMP３】（ＣＨ６）

Threshold Voltage

ＢＷ

ＶＥＴＨ

ＶＯＬ

0.285

0.300

0.03

2.4

0.315

0.2

Output Voltage Ｌ

INV=0.4V

Output Voltage Ｈ

ＶＯＨ

2.2

1.8

INV=0.2V

Output Sink Current

Output Source Current

Input Bias Current

ＩＳＩＮＫ

ＩＳＯＵＲＣＥ

ＩＢＩＡＳ

ＡＶ

3.6

MHz

INV=0.4V、FB=1.25V

INV=0.2V、FB=1.25V

INV=0V

-100

-50

-150

Voltage Gain

Open loop ｇain

Frequency Bandwidth

【Driver 部】

ＢＷ

Ｌｘ Pull-down resistor（ＣＨ１～ＣＨ４）

ＲＬｘ

ＴＵＰＰＥＲ

ＴＬＯＷＥＲ

ＲｏｎＨ１

ＲｏｎＬ１

ＲｏｎＨ２

ＲｏｎＬ２

ＲｏｎＨ３

ＲｏｎＬ３

ＲｏｎＨ４

ＲｏｎＬ４

ＲｏｎＨ５

ＲｏｎＬ５

ＲｏｎＨ６

ＲｏｎＬ６

300

500

700

ｎｓｅｃ

CTL=0V

Simultaneous off time setting（ＣＨ１～ＣＨ４）

H Nch resistor（ＣＨ１）

L Nch resistor（ＣＨ１）

H Nch resistor（ＣＨ２）

L Nch resistor（ＣＨ２）

H Nch resistor（ＣＨ３）

L Nch resistor（ＣＨ３）

H Nch resistor（ＣＨ４）

L Nch resistor（ＣＨ４）

0.38

0.18

0.28

0.27

0.22

0.28

0.65

0.31

0.48

0.46

0.37

0.48

Lx1=-50mA

Lx1=50mA

Lx2=-50mA

Lx2=50mA

Lx3=-50mA

Lx3=50mA

Lx4=-50mA

Lx4=50mA

IOUT5=-15mA

IOUT5=15ｍA

IOUT6=-15ｍA

IOUT6=15ｍA

Output ＯＮ resistor（ＣＨ５）

Output ＯＮ resistor（ＣＨ６）

【Control Block】

ＣＴＬ vol

ＶＣＴＬＨ

ＶＣＴＬＬ

ＲＣＴＬ

VCC

0.8

Ｖ

OFF

-0.3

250

ＣＴＬ１～６Pull-down resistor

【Soft Start Block】

Standby Voltage

400

700

kΩ

Ｖｓｔｓｃ

100

-0.6

ｍV

Input Charge Current

ＩＳＯＦＴ

-1.4

-1.0

SOFT1～6=0.1V

FB1～6 voltage

SCP=0.1V

【Short Circuit Protection (SCP) Timer】

Timer Start Voltage

Ｖｔｉｍｅ

Ｖｔｓｃ

2.1

0.9

-1.4

2.2

1.0

2.3

1.1

Threshold Voltage

Source Current

Ｉｓｃｐ

-1.0

-0.6

100

ｍV

Standby Volatge

Ｖｓｔｓｃ

【Short Circuit Detective Comparator】

Threshold Voltage

ＶＴＨ

0.95

-15

1.0

1.05

-5

Input Bias Current

ＩＢＩＡＳ

-10

SCP1=0V

【Under Volatge Lockout (UVLO)】

Threshold Voltage１

Ｖｓｔｄ１

⊿Ｖｓｔ

Ｖｓｔｄ２

Ｖｓｔｄ３

3.3

1.8

2.8

3.4

100

2.0

3.5

200

2.2

ｍV

VCC voltage

Hysteresis Voltage

VCC voltage

Threshold Voltage２

VREGA voltage

VREGD voltage

Threshold Voltage３

3.0

3.2

REV. C

3/4

● Package

BD9839MW

LOT No.

Fig－１

● Block Diagram

● Pin Description

BOOT1

PVCC1

Pin No.

Pin Name

Pin Descriptions

Pin Name

Pin Descriptions

ERRORAMP1

－

SEL

SOFT1

INV1

CH1～CH4 Oscillator Frequency Cotrol Pin

BOOT4

PVCC4

Lx4

Input Supply Voltage Pin for CH4 Output

Pin for Connecting to Inductor

Ground Pin for CH3、4 Output

Pin for Connecting to Inductor

Input Supply Voltage Pin for CH3 Output

Input Supply Voltage Pin for CH2 Output

Pin for Connecting to Inductor

CH3 ON/OFF Control Pin

INV1

CH1

Lx1(2pin)

Step Down DC/DC

(Current mode)

SS TIMER

＋

SOFT1

CH1 Soft Start Delay time Setting Pin

with External Capacitor

PGND12(2pin)

FB1

CH1Error Amplifier Negative Input Pin

CH1 Error Amplifier Output Pin

BOOT2

PVCC2

FB1

PGND34

Lx3

ERRORAMP2

－

INV2

CH2

CH2 Soft Start Delay time Setting Pin

with External Capacitor

Lx2

SOFT2

INV2

Step Down DC/DC

(Current mode)

SOFT2

SS TIMER

＋

CH2 Error Amplifier Negative Input Pin

CH2 Error Amplifier Output Pin

FB2

Lx3

BOOT3

PVCC3

CH3 Soft Start Delay time Setting Pin

with External Capacitor

SOFT3

INV3

PVCC3

BOOT3

BOOT2

PVCC2

Lx2

ERRORAMP3

－

INV3

CH3

Lx3(2pin)

Step Down DC/DC

(Current mode)

SS TIMER

SOFT3

＋

CH3 Error Amplifier Negative Input Pin

CH3 Error Amplifier Output Pin

PGND34(2pin)

FB3

CH4 Soft Start Delay time Setting Pin

with External Capacitor

BOOT4

PVCC4

Lx4

SOFT4

INV4

ERRORAMP4

CH4 Error Amplifier Negative Input Pin

CH4 Error Amplifier Output Pin

－

INV4

CH4

Step Down DC/DC

(Current mode)

SS TIMER

＋

SOFT4

FB4

CTL3

FB4

CH5 Soft Start Delay time Setting Pin

with External Capacitor

SOFT5

INV5

CTL2

CH2 ON/OFF Control Pin

CH5 Error Amplifier Negative Input Pin

CH5 Error Amplifier Output Pin

CTL1

CH1 ON/OFF Control Pin

ERRORAMP5

－

INV5

PVCC56

OUT5

FB5

PGND12

Lx1

Ground Pin for CH1、2 Output

Pin for Connecting to Inductor

Input Supply Voltage Pin for CH1Output

Bias Output Voltage Pin

CH5

SS TIMER

＋

SOFT5

Step Down DC/DC

(Voltage mode)

CH6 Soft Start Delay time Setting Pin

with External Capacitor

SOFT6

INV6

PGND56

FB5

CH6 Error Amplifier Negative Input Pin

CH6 Error Amplifier Output Pin

FB6

Lx1

ERRORAMP6

－

INV6

Short Detective Comparator

Negative Input Pin

SCP1

SCP

PVCC1

BOOT1

VREGD

VCC

CH6

Step Up DC/DC

(Voltage mode)

SS TIMER

＋

SOFT6

OUT6

Short Circuit Protection Delay time Setting Pin

with External Capacitor

FB6

OUT6

PGND56

OUT5

PVCC56

CTL6

CTL5

CTL4

CH6 NchFET Driver Output Pin

Ground Pin for CH5、6 Driver

Output Pin for CH5 PchFET Driver

Input Supply Voltage Pin for CH5、6 Driver

CH6 ON/OFF Control Pin

PROTECTION

Input Supply Voltage Pin

SCP1

SCP

VREGA

GND

Reference Output Voltage Pin

Ground Pin

－

SCP TIMER

＋

2.2V

SLOPE

Slope Setting Pin with external Resistor

Oscillator Frequency Adjustment Pin

with external Resistor

CH5 ON/OFF Control Pin

VREGA

VREGD

VCC

GND

CTL1

CTL2

UVLO

Oscillator Frequency Adjustment Pin

with external Capacitor

CTL3

CTL4

CTL5

CTL6

CH4 ON/OFF Control Pin

SHUT DOWN

OSC

SEL

VREGA VREGD

CT SLOPE

Fig－２

REV. C

4/4

● Operation Notes

１.) Absolute maximum ratings

Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in IC deterioration or damage. Assumptions should not

be made regarding the state of the IC (short mode or open mode) when such damage is suffered. Aphysical safety measure such as a fuse should be implemented when use of the

IC in a special mode where the absolute maximum ratings may be exceeded is anticipated.

２.) GND potential

Ensure a minimum GND pin potential in all operating conditions. In addition, ensure that no pins other than the GND pin carry a voltage lower than or equal to the GND pin, including

during actual transient phenomena.

３.) Thermal design

Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.

４.) Inter-pin shorts and mounting errors

Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in damage to the IC. Shorts between output pins or between

output pins and the power supply and GND pin caused by the presence of a foreign object may result in damage to the IC.

５.) Operation in a strong electromagnetic field

Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction.

６.) Common impedance

Power supply and ground wiring should reflect consideration of the need to lower common impedance and minimize ripple as much as possible (by making wiring as short

and thick as possible or rejecting ripple by incorporating inductance and capacitance).

７.) Voltage of CTL pin

The threshold voltages of CTL pin are 0.8V and 2.0V. STB state is set below 0.8V while action state is set beyond 2.0V.

The region between 0.8V and 2.0V is not recommended and may cause improper operation.

The rise and fall time must be under 10msec. In case to put capacitor to STB pin, it is recommended to use under 0.01μF.

８.) Thermal shutdown circuit (TSD circuit)

This IC incorporates a built-in thermal shutdown circuit (TSD circuit). The TSD circuit is designed only to shut the IC off to prevent runaway thermal operation. Do not continue to use the

IC after operating this circuit or use the IC in an environment where the operation of the thermal shutdown circuit is assumed.

９.)Applications with modes that reverse VCC and pin potentials may cause damage to internal IC circuits.

For example, such damage might occur when VCC is shorted with the GND pin while an external capacitor is charged. It is recommended to insert a diode for preventing back

current flow in series with VCC or bypass diodes between VCC and each pin.

10.) Relationship between PVCC - VCC

Because diode was connecting between PVCC (Anode) – VCC (Cathode) for prevent electrostatic breakdown,

it must be set PVCC – VCC < 0.3V voltage relationship.

11.) Rush current at the time of power supply injection.

An IC which has plural power supplies, or CMOS IC could have momentaly rush current at the time of power supply injection.

Because there exists inside logic uncertainty state. Please take care about power supply coupling capacity and width of power

Supply and GND pattern wiring.

Please use it so that VCC and PVCC terminal should not exceed the absolute maximum ratings. Ringing might be caused by L element of the pattern

according to the position of the input capacitor, and ratings be exceeded. Please will assume the example of the reference ,the distance of IC and capacitor, use it by 5.0mm or less when

thickness of print pattern are 35um, pattern width are 1.0mm.

12.)

13.)

Testing on application boards

When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge capacitors after each process or step.

Ground the IC during assembly steps as an antistatic measure, and use similar caution when transporting or storing the IC. Always turn the IC's power supply off before connecting it to

or removing it from a jig or fixture during the inspection process.

14.) IC pin input

This monolithic IC contains P+ isolation and PCB layers between adjacent elements in order to keep them isolated.

P/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a variety of parasitic elements.

For example, when a resistor and transistor are connected to pins as shown in following chart,

the P/N junction functions as a parasitic diode when GND > (PinA) for the resistor or GND > (Pin B) for the transistor (NPN).

 Similarly, when GND > (Pin B) for the transistor (NPN), the parasitic diode described above combines with the N layer of other adjacent elements to operate as a

parasitic NPN transistor.

The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable result of the IC's architecture. The operation of parasitic elements

can cause interference with circuit operation as well as IC malfunction and damage. For these reasons, it is necessary to use caution so that the IC is not used in a way that will

trigger the operation of parasitic elements, such as by the application of voltages lower than the GND (PCB) voltage to input and output pins.

Resistance

Transistor (NPN)

(PinA)

Ｂ

(PinA)

(PinB)

Ｅ

Parasitic diode

Ｃ

ＧＮＤ

(PinB)

Ｎ

Ｐ^＋

Ｐ

Ｐ^＋

Ｐ

Ｎ

Ｐ^＋

Ｎ

P substrate

Ｃ

Ｅ

Ｂ

ＧＮＤ

Parasitic diode

Parasitic elementals

ＧＮＤ

Other adiacent components

Parasitic diode

REV. C

Notice

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"Products"). If you wish to use any such Product, please be sure to refer to the speciﬁcations,

which can be obtained from ROHM upon request.

Examples of application circuits, circuit constants and any other information contained herein

illustrate the standard usage and operations of the Products. The peripheral conditions must

be taken into account when designing circuits for mass production.

Great care was taken in ensuring the accuracy of the information speciﬁed in this document.

However, should you incur any damage arising from any inaccuracy or misprint of such

information, ROHM shall bear no responsibility for such damage.

The technical information speciﬁed herein is intended only to show the typical functions of and

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The Products speciﬁed in this document are intended to be used with general-use electronic

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While ROHM always makes efforts to enhance the quality and reliability of its Products, a

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Please be sure to implement in your equipment using the Products safety measures to guard

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R0039

BD9838MWV [ROHM]

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