BD3508MUV [ROHM]

Ultra Low Dropout Linear Regulators for PC Chipsets; 超低压差线性稳压器的PC芯片组
BD3508MUV
型号: BD3508MUV
厂家: ROHM    ROHM
描述:

Ultra Low Dropout Linear Regulators for PC Chipsets
超低压差线性稳压器的PC芯片组

稳压器 PC
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High-performance Regulator IC Series for PCs  
Ultra Low Dropout  
Linear Regulators for PC Chipsets  
No.09030EAT22  
BD3508MUV, BD3509MUV  
Description  
The BD3508MUV / BD3509MUV ultra low-dropout linear chipset regulator operates from a very low input supply, and offers  
ideal performance in low input voltage to low output voltage applications. It incorporates a built-in N-MOSFET power  
transistor to minimize the input-to-output voltage differential to the ON resistance (RON MAX=100mΩ/50mΩ) level. By  
lowering the dropout voltage in this way, the regulator realizes high current output (Iomax=3.0A/4.0A) with reduced  
conversion loss, and thereby obviates the switching regulator and its power transistor, choke coil, and rectifier diode. Thus,  
the BD3508MUV / BD3509MUV are designed to enable significant package profile downsizing and cost reduction. An  
external resistor allows the entire range of output voltage configurations between 0.65 and 2.7V, while the NRCS (soft start)  
function enables a controlled output voltage ramp-up, which can be programmed to whatever power supply sequence is  
required.  
Features  
1) Internal high-precision reference voltage circuit (0.65V±1%)  
2) Built-in VCC under voltage lock out circuit (VCC=3.80V)  
3) NRCS (soft start) function reduces the magnitude of in-rush current  
4) Internal Nch MOSFET driver offers low ON resistance (65mΩ/28mΩ typ)  
5) Built-in current limit circuit (3.0A/4.0A min)  
6) Built-in thermal shutdown (TSD) circuit  
7) Variable output (0.652.7V)  
8) Incorporates high-power VQFN020V4040 package: 4.0×4.0×1.0(mm)  
9) Tracking function  
Applications  
Notebook computers, Desktop computers, LCD-TV, DVD, Digital appliances  
Model Lineup  
Maximum output current  
Package  
VCC=5V  
3A  
4A  
BD3508MUV  
BD3509MUV  
VQFN020V4040  
www.rohm.com  
2009.05 - Rev.A  
1/20  
c
2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BD3508MUV, BD3509MUV  
Absolute Maximum Ratings (Ta=100)  
BD3508MUV / BD3509MUV  
Limit  
BD3508MUV BD3509MUV  
Parameter  
Symbol  
Unit  
Input Voltage 1  
VCC  
VIN  
6.0 *1  
6.0 *1  
V
V
Input Voltage 2  
Input Voltage 3  
VDD  
Ven  
-
-
6.0*1  
6.0  
V
Enable Input Voltage  
Power Good Input Voltage  
Power Dissipation 1  
Power Dissipation 2  
Power Dissipation 3  
Power Dissipation 4  
Operating Temperature Range  
Storage Temperature Range  
6.0  
V
VPGOOD  
Pd1  
V
0.34 *2  
0.70 *3  
1.21 *4  
3.56 *5  
W
W
W
W
Pd2  
Pd3  
Pd4  
Topr  
Tstg  
-10+100  
-55+125  
+150  
Maximum Junction Temperature  
Tjmax  
*1 Should not exceed Pd.  
*2 Reduced by 4mW/for each increase in Ta25(no heat sink)  
*3 1 layer, mounted on a board 74.2mm×74.2mm×1.6mm Glass-epoxy PCB (Copper foil area : 10.29mm2)  
*4 4 layers, mounted on a board 74.2mm×74.2mm×1.6mm Glass-epoxy PCB (Copper foil area : 10.29mm2) , copper foil in each layers.  
*5 4 layers, mounted on a board 74.2mm×74.2mm×1.6mm Glass-epoxy PCB (Copper foil area : 5505mm2) , copper foil in each layers.  
Operating Conditions(Ta=25)  
BD3508MUV  
BD3509MUV  
Parameter  
Input Voltage 1  
Symbol  
Unit  
Min  
Max  
Min  
Max  
VCC  
VIN  
4.3  
0.75  
-
5.5  
4.3  
0.7  
5.5  
V
V
Input Voltage 2  
VCC-1 *6  
VCC-1 *6  
5.5  
Input Voltage 3  
VDD  
Vo  
-
2.7  
V
Output Voltage setting Range  
Enable Input Voltage  
NRCS capacity  
VFB  
-0.3  
0.001  
2.7  
5.5  
1
VFB  
-0.3  
0.001  
2.7  
V
Ven  
5.5  
V
CNRCS  
1
uF  
*6 VCC and VIN do not have to be implemented in the order listed.  
This product is not designed for use in radioactive environments.  
www.rohm.com  
2009.05 - Rev.A  
2/20  
c
2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BD3508MUV, BD3509MUV  
Electrical Characteristics  
(Unless otherwise specified, Ta=25VCC=5V Ven=3V VIN=1.8V VDD=3.3V R1=3.9KΩ R2=3.3KΩ)  
BD3508MUV  
Limit  
Typ.  
0.7  
0
Parameter  
Symbol  
Unit  
Condition  
Min.  
Max.  
Bias Current  
ICC  
IST  
Vo  
-
-
1.4  
mA  
uA  
V
VCC Shutdown Mode Current  
Output Voltage  
10  
-
Ven=0V  
Vo=0V  
-
1.200  
-
Maximum Output Current  
Output Short Circuit Current  
Output Voltage Temperature  
Coefficient  
Io  
3.0  
3.0  
-
A
Iost  
-
-
A
Tcvo  
VFB1  
VFB2  
-
0.01  
0.650  
0.650  
-
%/℃  
V
Feedback Voltage 1  
0.643  
0.630  
0.657  
0.670  
Io=0 to 3A  
Feedback Voltage 2  
V
7
Tj=-10 to 100℃  
*
Line Regulation 1  
Line Regulation 2  
Load Regulation  
Minimum Input-Output Voltage  
Differential  
Reg.l1  
Reg.l2  
Reg.L  
-
-
-
0.1  
0.1  
0.5  
0.5  
0.5  
10  
%/V  
%/V  
mV  
VCC=4.3V to 5.5V  
VIN=1.2V to 3.3V  
Io=0 to 3A  
Io=1A,VIN=1.2V  
dVo  
-
65  
-
100  
-
mV  
mA  
7
Tj=-10 to 100℃  
*
Standby Discharge Current  
[ENABLE]  
Iden  
1
Ven=0V, Vo=1V  
Enable Pin  
Enhi  
2
-
-
V
Input Voltage High  
Enable Pin  
Enlow  
Ien  
-0.2  
-
-
0.8  
10  
V
Input Voltage Low  
Enable Input Bias Current  
[FEEDBACK]  
7
uA  
Ven=3V  
Feedback Pin Bias Current  
[NRCS]  
IFB  
-100  
0
100  
nA  
NRCS Charge Current  
NRCS Standby Voltage  
[UVLO]  
Inrcs  
14  
-
20  
0
26  
50  
uA  
Vnrcs=0.5V  
Ven=0V  
VSTB  
mV  
VCC Under voltage Lock out  
Threshold Voltage  
VCC Under voltage Lock out  
Hysteresis Voltage  
[AMP]  
VccUVLO  
Vcchys  
3.5  
3.8  
4.1  
V
VCC:Sweep-up  
100  
160  
220  
mV  
VCC:Sweep-down  
Gate Source Current  
IGSO  
IGSI  
-
-
1.6  
4.7  
-
-
mA  
mA  
VFB=0, VGATE=2.5V  
Gate Sink Current  
VFB=VCC, VGATE=2.5V  
*7 Design Guarantee  
www.rohm.com  
2009.05 - Rev.A  
3/20  
c
2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BD3508MUV, BD3509MUV  
Electrical Characteristics  
(Unless otherwise specified, Ta=25VCC=5V Ven=3V VIN=1.5V VDD=3.3V R1=3.9KΩ R2=3.6KΩ)  
BD3509MUV  
Limit  
Typ.  
1.1  
0
Parameter  
Symbol  
Unit  
Condition  
Min.  
Max.  
2.0  
10  
-
Bias Current  
ICC  
IST  
Vo  
-
-
mA  
uA  
V
VCC Shutdown Mode Current  
Output Voltage  
Ven=0V  
-
1.25  
-
Maximum Output Current  
Output Voltage Temperature  
Coefficient  
Io  
4.0  
-
A
Tcvo  
VFB1  
VFB2  
-
0.01  
0.650  
0.650  
-
%/℃  
V
Feedback Voltage 1  
0.643  
0.637  
0.657  
0.663  
Io=0 to 4A  
Feedback Voltage 2  
V
7
Tj=-10 to 100℃  
*
Line Regulation 1  
Line Regulation 2  
Load Regulation  
Minimum Input-Output Voltage  
Differential  
Reg.l1  
Reg.l2  
Reg.L  
-
-
-
0.1  
0.1  
0.5  
0.5  
0.5  
10  
%/V  
%/V  
mV  
VCC=4.3V to 5.5V  
VIN=1.2V to 3.3V  
Io=0 to 4A  
Io=1A,VIN=1.25V  
dVo  
-
28  
-
50  
-
mV  
mA  
7
Tj=-10 to 100℃  
*
Standby Discharge Current  
[ENABLE]  
Iden  
1
Ven=0V, Vo=1V  
Enable Pin  
Enhi  
2
-
-
V
Input Voltage High  
Enable Pin  
Enlow  
Ien  
-0.2  
-
-
0.8  
10  
V
Input Voltage Low  
Enable Input Bias Current  
[FEEDBACK]  
7
uA  
Ven=3V  
Feedback Pin Bias Current  
[NRCS]  
IFB  
-100  
0
100  
nA  
NRCS Charge Current  
NRCS Standby Voltage  
[UVLO]  
Inrcs  
14  
-
20  
0
26  
50  
uA  
Vnrcs=0.5V  
Ven=0V  
VSTB  
mV  
VCC Under voltage Lock out  
Threshold Voltage  
VCC Under voltage Lock out  
Hysteresis Voltage  
[AMP]  
VccUVLO  
Vcchys  
3.5  
3.8  
4.1  
V
VCC:Sweep-up  
100  
160  
220  
mV  
VCC:Sweep-down  
Gate Source Current  
IGSO  
IGSI  
-
-
10  
18  
-
-
mA  
mA  
VFB=0, VGATE=2.5V  
Gate Sink Current  
[PGOOD Block]  
Threshold voltage  
VFB=VCC, VGATE=2.5V  
VTHPG  
RPG  
-
-
0.585  
0.1  
-
-
V
FB voltage  
Ron  
kΩ  
*7 Design Guarantee  
www.rohm.com  
2009.05 - Rev.A  
4/20  
c
2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BD3508MUV, BD3509MUV  
Reference Data  
BD3508MUV  
Vo  
Vo  
Vo  
50mV/div  
45mV  
50mV/div  
100mV/div  
64mV  
3.0A  
91mV  
Io  
Io  
Io  
3.0A  
3A  
2A/div  
2A/div  
2A/div  
Io=0A3A/3μsec  
t(5μsec/div)  
Io=0A3A/3μsec  
t(5μsec/div)  
Io=0A3A/3μsec  
t(5μsec/div)  
Fig.1 Transient Response  
(03A)  
Fig.2 Transient Response  
(03A)  
Fig.3 Transient Response  
(03A)  
Co=150μF×2, CFB=0.01uF  
Co=150μF  
Co=47μF, CFB=0.01uF  
Vo  
Vo  
Vo  
55mV  
79mV  
87mV  
50mV/div  
50mV/div  
100mV/div  
Io  
Io  
Io  
3.0A  
2A/div  
2A/div  
2A/div  
3.0A  
3A  
Io=3A0A/3μsec  
t(5μsec/div)  
Io=3A0A/3μsec  
t(5μsec/div)  
Io=3A0A/3μsec  
t(5μsec/div)  
Fig.4 Transient Response  
(30A)  
Fig.5 Transient Response  
(30A)  
Fig.6 Transient Response  
(30A)  
Co=150μF×2  
Co=150μF  
Co=47μF  
Ven  
Ven  
VCC  
Ven  
2V/div  
2V/div  
VNRCS  
2V/div  
VNRCS  
2V/div  
VIN  
Vo  
Vo  
Vo  
1V/div  
1V/div  
t(200μsec/div)  
t(2msec/div)  
VCCVINVen  
Fig.9 Input sequence  
Fig.7: Waveform at output start  
Fig.8 Waveform at output OFF  
VCC  
VCC  
Ven  
VCC  
Ven  
Ven  
VIN  
Vo  
VIN  
Vo  
VIN  
Vo  
VINVCCVen  
VenVCCVIN  
VCCVenVIN  
Fig.10 Input sequence  
Fig.11 Input sequence  
Fig.12 Input sequence  
www.rohm.com  
2009.05 - Rev.A  
5/20  
c
2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BD3508MUV, BD3509MUV  
Reference Data  
1.25  
1.23  
1.21  
1.19  
1.17  
1.15  
VCC  
Ven  
VIN  
VCC  
Ven  
VIN  
Vo  
Vo  
VINVenVCC  
VenVINVCC  
-10  
10  
30  
50  
70  
90  
100  
Ta(  
)
Fig.13 Input sequence  
Fig.14 Input sequence  
Fig.15 Tj-Vo (Io=0mA)  
1.00  
0.95  
0.90  
0.85  
0.80  
0.75  
0.70  
0.65  
0.60  
0.55  
0.50  
2.0  
1.9  
1.8  
1.7  
1.6  
1.5  
1.4  
1.3  
1.2  
1.1  
1.0  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
100  
90  
100  
90  
-10  
10  
30  
50  
70  
-10  
10  
30  
50  
70  
-60 -30  
0
30 60  
90 120 150  
Ta()  
Ta()  
Ta()  
Fig.16 Tj-ICC  
Fig.17 Tj-ISTB  
Fig.18 Tj-IIN  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
20  
15  
10  
5
30  
25  
20  
15  
10  
5
0
-5  
-10  
-15  
-20  
0
100  
-10  
10  
30  
50  
70  
90  
100  
90  
-10  
10  
30  
50  
70  
-60 -30  
0
30  
60  
90 120 150  
Ta(  
)
Ta()  
Ta()  
Fig.21 Tj-IFB  
Fig.20 Tj-INRCS  
Fig.19 Tj-IINSTB  
60  
50  
40  
30  
20  
10  
0
60  
55  
50  
45  
40  
35  
30  
25  
10  
9
8
7
6
5
4
3
2
1
0
2.5V  
1.8V  
1.2V  
4
100  
-10  
10  
30  
50  
70  
90  
2
6
8
-10  
10  
30  
50  
70  
90 100  
Ta()  
Vcc(V)  
Ta()  
Fig.24 Vcc-RON  
Fig.22 Tj-Ien  
Fig.23 Tj-RON  
(Vcc=5V/Vo=1.2V)  
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2009.05 - Rev.A  
6/20  
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2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BD3508MUV, BD3509MUV  
Reference Data  
BD3509MUV  
Vo  
Vo  
Vo  
50mV/div  
50mV/div  
100mV/div  
41mV  
39mV  
51mV  
Io  
Io  
Io  
2A/div  
2A/div  
2A/div  
4.0A  
4.0A  
4.0A  
Io=0A4A/4μsec t(10μsec/div)  
Io=0A4A/4μsec  
t(10μsec/div)  
Io=0A4A/4μsec  
t(10μsec/div)  
Fig.25 Transient Response  
(04A)  
Fig.26 Transient Response  
(04A)  
Fig.27 Transient Response  
(04A)  
Co=22μF  
Co=100μF  
Co=47μF  
37mV  
Vo  
Vo  
Vo  
41mV  
39mV  
50mV/div  
50mV/div  
50mV/div  
Io  
2A/div  
4.0A  
Io  
Io  
2A/div  
2A/div  
4.0A  
4.0A  
Io=4A0A/4μsec t(100μsec/div)  
Io=4A0A/4μsec t(100μsec/div)  
Io=4A0A/4μsec t(100μsec/div)  
Fig.28 Transient Response  
(40A)  
Fig.29 Transient Response  
(40A)  
Fig.30 Transient Response  
(40A)  
Co=22μF, CFB=0.01μF  
Co=100μF  
Co=47μF, CFB=0.01μF  
VEN  
VEN  
VEN  
VCC  
2V/div  
2V/div  
VNRCS  
1V/div  
VNRCS  
1V/div  
Vo  
Vo  
VIN  
Vo  
1V/div  
1V/div  
PGOOD  
PGOOD  
2V/div  
2V/div  
t(200μsec/div)  
t(2msec/div)  
VCCVINVEN  
Fig.33 Input sequence  
Fig.31: Waveform at output start  
Fig.32 Waveform at output  
OFF  
VEN  
VCC  
VIN  
VEN  
VCC  
VEN  
VCC  
VIN  
Vo  
VIN  
Vo  
Vo  
VINVCCVEN  
VENVCCVIN  
VCCVENVIN  
Fig.34 Input sequence  
Fig.35 Input sequence  
Fig.36 Input sequence  
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2009.05 - Rev.A  
7/20  
c
2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BD3508MUV, BD3509MUV  
Reference Data  
1.3  
1.29  
1.28  
1.27  
1.26  
1.25  
1.24  
1.23  
1.22  
1.21  
1.2  
VEN  
VCC  
VIN  
VEN  
VCC  
VIN  
Vo  
Vo  
-50 -25  
0
25 50 75 100 125 150  
Ta()  
VINVENVCC  
VENVINVCC  
Fig.37 Input sequence  
Fig.38 Input sequence  
Fig.39 Tj-Vo (Io=0mA)  
1.5  
1.2  
0.9  
0.6  
0.3  
0
1
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
50  
45  
40  
35  
30  
25  
20  
15  
10  
5
0
-50 -25  
0
25 50 75 100 125 150  
Ta()  
-50 -25  
0
25 50 75 100 125 150  
Ta()  
-50 -25  
0
25 50 75 100 125 150  
Ta()  
Fig.40 Tj-ICC  
Fig.41 Tj-ISTB  
Fig.42 Tj-IDD  
0.1  
2
1.8  
1.6  
1.4  
1.2  
1
50  
45  
40  
35  
30  
25  
20  
15  
10  
5
0.09  
0.08  
0.07  
0.06  
0.05  
0.04  
0.03  
0.02  
0.01  
0
0
-50 -25  
0
25 50 75 100 125 150  
Ta()  
-50 -25  
0
25 50 75 100 125 150  
Ta()  
-50 -25  
0
25 50 75 100 125 150  
Ta()  
Fig.43 Tj-IDDSTB  
Fig.44 Tj-IIN  
Fig.45 Tj-IINSTB  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
10  
10  
8
9
8
7
6
5
4
3
2
1
0
6
4
2
0
-2  
-4  
-6  
-8  
-10  
-50 -25  
0
25 50 75 100 125 150  
Ta()  
-50 -25  
0
25 50 75 100 125 150  
Ta()  
-50 -25  
0
25 50 75 100 125 150  
Ta()  
Fig.47 Tj-IFB  
8/20  
Fig.46 Tj-INRCS  
Fig.48 Tj-Ien  
www.rohm.com  
2009.05 - Rev.A  
c
2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BD3508MUV, BD3509MUV  
Reference Data  
50  
45  
40  
35  
30  
25  
20  
15  
10  
5
50  
45  
40  
35  
30  
25  
2.5V  
1.8V  
1.25V  
4
1.0V  
5
0
-50 -25  
0
25 50 75 100 125 150  
4.3  
5.5  
Ta()  
VCC[V]  
Fig.50 Vcc-RON  
Fig.49 Tj-RON  
(Vcc=5V/Vo=1.2V)  
Block Diagram  
BD3508MUV  
VCC  
VCC  
6
VIN1  
8
9
VCC  
UVLO  
VIN2  
VIN3  
VIN  
Current  
Limit  
CL  
EN  
Reference  
Block  
7
10  
VCC  
Vo1  
Vo2  
Vo3  
16  
17  
18  
Vo  
CL  
UVLO  
TSD  
EN  
FB  
Thermal  
Shutdown  
19  
11  
GATE  
NRCS  
20  
TSD  
1
2
NRCS  
GND  
BD3509MUV  
VCC  
VCC  
6
VIN1  
VIN2  
8
9
VCC  
VIN  
VIN3  
VIN4  
VIN5  
Current  
Limit  
UVLO  
CL  
10  
12  
13  
EN  
Reference  
Block  
7
VCC  
VDD  
5
Vo1  
Vo2  
Vo3  
Vo4  
Vo5  
VCC  
14  
15  
16  
17  
Vo  
CL  
UVLO  
TSD  
PGOOD  
4
POWER  
GOOD  
18  
EN  
FB  
19  
Thermal  
Shutdown  
GATE  
NRCS  
20  
11  
TSD  
1
2
NRCS  
GND  
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2009.05 - Rev.A  
9/20  
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Technical Note  
BD3508MUV, BD3509MUV  
Pin Layout  
BD3508MUV  
BD3509MUV  
Vo2 Vo1 VIN5  
N.C N.C N.C N.C  
GATE  
11  
VIN4  
12  
GATE  
11  
15  
14  
13  
12  
15  
14  
13  
16  
17  
18  
19  
20  
10  
9
16  
17  
18  
19  
20  
10  
Vo1  
Vo2  
Vo3  
FB  
Vo3  
Vo4  
Vo5  
FB  
VIN3  
VIN2  
VIN1  
EN  
VIN3  
9
VIN2  
FIN  
FIN  
8
8
VIN1  
7
7
EN  
6
6
NRCS  
VCC  
NRCS  
VCC  
1
2
3
4
5
1
2
3
4
5
GND1 GND2 N.C  
N.C N.C  
GND1 GND2 N.C PGOOD VDD  
Pin Function Table  
BD3508MUV  
BD3509MUV  
PIN  
PIN  
PIN Name  
PIN Function  
PIN Name  
PIN Function  
Ground pin 1  
No.  
1
No.  
1
GND1  
GND2  
N.C.  
N.C.  
N.C.  
VCC  
EN  
Ground pin 1  
Ground pin 2  
GND1  
GND2  
N.C.  
PGOOD  
VDD  
VCC  
EN  
2
2
Ground pin 2  
3
No connection (empty) pin *  
No connection (empty) pin *  
No connection (empty) pin *  
Power supply pin  
3
No connection (empty) pin *  
Power Good pin  
4
4
5
5
Power supply pin  
Power supply pin  
Enable input pin  
6
6
7
Enable input pin  
7
8
VIN1  
VIN2  
VIN3  
GATE  
N.C.  
N.C.  
N.C.  
N.C.  
Vo1  
Input pin 1  
8
VIN1  
VIN2  
VIN3  
GATE  
VIN4  
VIN5  
Vo1  
Input pin 1  
9
Input pin 2  
9
Input pin 2  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
Input pin 3  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
Input pin 3  
Gate pin  
Gate pin  
No connection (empty) pin *  
No connection (empty) pin *  
No connection (empty) pin *  
No connection (empty) pin *  
Output voltage pin 1  
Output voltage pin 2  
Output voltage pin 3  
Input pin 4  
Input pin 5  
Output voltage pin 1  
Output voltage pin 2  
Output voltage pin 3  
Output voltage pin 4  
Output voltage pin 5  
Reference voltage feedback pin  
In-rush current protection (NRCS)  
capacitor connection pin  
Vo2  
Vo3  
Vo2  
Vo4  
Vo3  
Vo5  
FB  
Reference voltage feedback pin  
In-rush current protection (NRCS)  
capacitor connection pin  
FB  
20  
NRCS  
FIN  
20  
NRCS  
FIN  
rever  
se  
rever  
se  
Connected to heatsink and GND  
Connected to heatsink and GND  
* Please short N.C to the GND。  
* Please short N.C to the GND  
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2009.05 - Rev.A  
10/20  
c
2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BD3508MUV, BD3509MUV  
Operation of Each Block  
AMP  
This is an error amp that functions by comparing the reference voltage (0.65V) with Vo to drive the output Nch FET  
(Ron=50mΩ). Frequency optimization helps to realize rapid transit response, and to support the use of functional polymer  
output capacitors. AMP input voltage ranges from GND to 2.7V, while the AMP output ranges from GND to VCC. When EN is  
OFF, or when UVLO is active, output goes LOW and the output NchFET switches OFF.  
EN  
The EN block controls the regulator ON/OFF pin by means of the logic input pin. In OFF position, circuit voltage is  
maintained at 0μA, thus minimizing current consumption at standby. The FET is switched ON to enable discharge of the  
NRCS pin Vo, thereby draining the excess charge and preventing the load IC from malfunctioning. Since no electrical  
connection is required (such as between the VCC pin and the ESD prevention Di), module operation is independent of the  
input sequence.  
UVLO  
To prevent malfunctions that can occur when there is a momentary decrease in VCC supply voltage, the UVLO circuit  
switches output OFF, and, like the EN block, discharges the NRCS Vo. Once the UVLO threshold voltage (TYP3.80V) is  
exceeded, the power-on reset is triggered and output begins.  
CURRENT LIMIT  
With output ON, the current limit function monitors internal IC output current against the parameter value. When current  
exceeds this level, the current limit module lowers the output current to protect the load IC. When the overcurrent state is  
eliminated, output voltage is restored at the parameter value.  
NRCS  
The soft start function is realized by connecting an NRCS pin external capacitor to the target ground. Output ramp-up can  
be set for any period up to the time the NRCS pin reaches VFB (0.65V). During startup, the NRCS pin serves as the 20μA  
(TYP) constant current source and charges the externally connected capacitor.  
TSD (Thermal Shut Down)  
The shutdown (TSD) circuit automatically switches output OFF when the chip temperature gets too high, thus serving to  
protect the IC against “thermal runaway” and heat damage. Because the TSD circuit is provided to shut down the IC in the  
presence of extreme heat, in order to avoid potential problems with the TSD, it is crucial that the Tj (max) parameter not be  
exceeded in the thermal design.  
VIN  
The VIN line is the major current supply line, and is connected to the output NchFET drain. Since no electrical connection  
(such as between the VCC pin and an ESD protective Di) is necessary, VIN operates independent of the input sequence.  
However, since there is an output NchFET body Di between VIN and Vo, a VIN-Vo electric (Di) connection is present. Note,  
therefore, that when output is switched ON or OFF, reverse current may flow to the VIN from Vo.  
PGOOD (BD3509MUV)  
This is the monitor pin for output voltage (Vo). It is used through the pull-up resistance (100kΩ). PGOOD pin judges the  
voltage High or Low (FB Voltage 0.585V typ. : threshold voltage).  
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2009.05 - Rev.A  
11/20  
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Technical Note  
BD3508MUV, BD3509MUV  
Timing Chart  
VIN  
VCC  
EN  
0.65V(typ)  
NRCS  
Vo  
Start up  
Vo×0.9V(typ)  
80μs(typ)  
t
PGOOD  
(BD3509MUV)  
VCC ON/OFF  
VIN  
VCC  
EN  
UVLO  
Hysteresis  
0.65V(typ)  
NRCS  
Vo  
Start up  
Vo×0.9V(typ)  
80μs(typ)  
t
PGOOD  
(BD3509MUV)  
www.rohm.com  
2009.05 - Rev.A  
12/20  
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2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BD3508MUV, BD3509MUV  
Evaluation Board  
BD3509MUV Evaluation Board Schematic  
BD3509MUV Evaluation Board Standard Component List  
Component Rating Manufacturer Product Name  
Component Rating  
R4  
Manufacturer Product Name  
U1  
-
ROHM  
BD3509MUV  
100kΩ ROHM  
MCR03EZPF1003  
Jumper  
C5  
0.1uF  
1uF  
10uF  
22uF  
MURATA  
MURATA  
MURATA  
KYOCERA  
GRM155F11E104ZD  
GRM188B11A105KD  
GRM21BB10J106KD  
CM316W5R226K06AT  
GRM188B11H103KD  
R7  
0Ω  
-
C6  
R8  
3.6k  
3.9kΩ  
0Ω  
ROHM  
MCR03EZPF3601  
MCR03EZPF3901  
Jumper  
C8  
R9  
ROHM  
C16  
C20  
JP13  
JP14  
-
-
0.01uF MURATA  
0Ω  
Jumper  
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2009.05 - Rev.A  
13/20  
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2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BD3508MUV, BD3509MUV  
BD3509MUV Evaluation Board Layout  
Silk Screen (Top)  
Silk Screen (Bottom)  
TOP Layer  
Middle Layer_1  
Middle Layer_2  
Bottom Layer  
Recommended Circuit Example  
Vo (1.25V/4A)  
15  
14  
13  
12  
11  
C8  
VIN  
C16  
16  
17  
18  
19  
20  
10  
9
C18  
R18  
R19  
8
7
VEN  
6
C6  
VCC  
1
2
3
4
5
C20  
R4  
VPGOOD  
C5  
VDD  
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2009.05 - Rev.A  
14/20  
c
2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BD3508MUV, BD3509MUV  
Recommended  
Component  
Value  
Programming Notes and Precautions  
R1/R2  
3.6k/3.9k  
IC output voltage can be set with a configuration formula using the values for the internal  
reference output voltage (VFB) and the output voltage resistors (R1, R2).  
Select resistance values that will avoid the impact of the VFB current (±100nA). The  
recommended total resistance value is 10KΩ.  
R4  
100k  
22uF  
This is the pull-up resistance for open drain pin. It is recommended to set the value about  
100kΩ.  
C16  
To assure output voltage stability, please be certain the Vo1, Vo2, and Vo3 pins and the GND  
pins are connected. Output capacitors play a role in loop gain phase compensation and in  
mitigating output fluctuation during rapid changes in load level. Insufficient capacitance may  
cause oscillation, while high equivalent series reisistance (ESR) will exacerbate output  
voltage fluctuation under rapid load change conditions. While a 47μF ceramic capacitor is  
recomended, actual stability is highly dependent on temperature and load conditions. Also,  
note that connecting different types of capacitors in series may result in insufficient total  
phase compensation, thus causing oscillation. In light of this information, please confirm  
operation across a variety of temperature and load conditions.  
C6  
C8  
1uF  
The input capacitor reduces the output impedence of the voltage supply source connected to  
the VCC. When the output impedence of this power supply increases, the input voltage  
(VCC) may become unstable. This may result in the output voltage oscillation or lowering  
ripple rejection. A low ESR 1uF capacitor with minimal susceptibility to temperature is  
preferable, but stability depends on power supply characteristics and the substrate wiring  
pattern. Please confirm operation across a variety of temperature and load conditions.  
Input capacitors reduce the output impedance of the voltage supply source connected to the  
(VIN) input pins. If the impedance of this power supply were to increase, input voltage (VIN)  
could become unstable, leading to oscillation or lowered ripple rejection function. While a  
low-ESR 10uF capacitor with minimal susceptibility to temperature is recommended, stability  
is highly dependent on the input power supply characteristics and the substrate wiring  
pattern. In light of this information, please confirm operation across a variety of temperature  
and load conditions.  
10uF  
C5  
0.1uF  
Input capacitors reduce the output impedance of the voltage supply source connected to the  
(VDD) input pins. If the impedance of this power supply were to increase, input voltage (VDD)  
could become unstable, leading to oscillation or lowered ripple rejection function. While a  
low-ESR 0.1uF capacitor with minimal susceptibility to temperature is recommended, stability  
is highly dependent on the input power supply characteristics and the substrate wiring  
pattern. In light of this information, please confirm operation across a variety of temperature  
and load conditions.  
C20  
C18  
0.01uF  
0.01uF  
The Non Rush Current on Startup (NRCS) function is built into the IC to prevent rush current  
from going through the load (VIN to Vo) and impacting output capacitors at power supply  
start-up. Constant current comes from the NRCS pin when EN is HIGH or the UVLO function  
is deactivated. The temporary reference voltage is proportionate to time, due to the current  
charge of the NRCS pin capacitor, and output voltage start-up is proportionate to this  
reference voltage. Capacitors with low susceptibility to temperature are recommended, in  
order to assure a stable soft-start time.  
This component is employed when the C16 capacitor causes, or may cause, oscillation. It  
provides more precise internal phase correction.  
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2009.05 - Rev.A  
15/20  
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Technical Note  
BD3508MUV, BD3509MUV  
Heat Loss  
Thermal design should allow operation within the following conditions. Note that the temperatures listed are the allowed  
temperature limits, and thermal design should allow sufficient margin from the limits.  
1. Ambient temperature Ta can be no higher than 100 .  
2. Chip junction temperature (Tj) can be no higher than 150.  
Chip junction temperature can be determined as follows:  
Calculation based on ambient temperature (Ta)  
Tj=Ta+θj-a×W  
Reference values>  
θj-a: VQFN020V4040 367.6/W Bare (unmounted) IC  
178.6/W 4-layer substrate (bottom layer surface copper foil area 10.29mm2)  
103.3/W 4-layer substrate (bottom layer surface copper foil area 10.29mm2)  
35.1/W 4-layer substrate (top layer copper foil area 5505mm2)  
Substrate size: 74.2×74.2×1.6mm3 (substrate with thermal via)  
It is recommended to layout the VIA for heat radiation in the GND pattern of reverse (of IC) when there is the GND pattern in  
the inner layer (in using multiplayer substrate). This package is so small (size: 4.2mm×4.2mm) that it is not available to  
layout the VIA in the bottom of IC. Spreading the pattern and being increased the number of VIA like the figure below).  
enable to get the superior heat radiation characteristic. (This figure is the image. It is recommended that the VIA size and the  
number is designed suitable for the actual situation.).  
Most of the heat loss that occurs in the BD3509MUV is generated from the output Nch FET. Power loss is determined by  
the total VIN-Vo voltage and output current. Be sure to confirm the system input and output voltage and the output current  
conditions in relation to the heat dissipation characteristics of the VIN and Vo in the design. Bearing in mind that heat  
dissipation may vary substantially depending on the substrate employed (due to the power package incorporated in the  
BD3509MUV) make certain to factor conditions such as substrate size into the thermal design.  
Power consumption (W) = Input voltage (VIN)- output voltage (Vo) ×Io (Ave)  
Example) VIN=1.5V, Vo=1.25V, Io(Ave) = 4A  
Power consumption (W) =  
1.5(V)-1.2(V) ×4.0(A)  
= 1.0(W)  
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2009.05 - Rev.A  
16/20  
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Technical Note  
BD3508MUV, BD3509MUV  
Input-Output Equivalent Circuit Diagram  
VCC  
VCC  
VCC  
1kΩ  
1kΩ  
NRCS  
1kΩ  
1kΩ  
VIN1  
VIN2  
VIN3  
VIN4  
GATE  
1kΩ  
10kΩ  
10kΩ  
1kΩ  
VIN5  
VCC  
VCC  
EN  
1kΩ  
1kΩ  
FB  
Vo1  
350kΩ  
1kΩ  
100kΩ  
100kΩ  
Vo2  
50kΩ  
10kΩ  
Vo3  
Vo4  
Vo5  
20pF  
PGOOD  
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2009.05 - Rev.A  
17/20  
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Technical Note  
BD3508MUV, BD3509MUV  
Operation Notes  
1. Absolute maximum ratings  
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can  
break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any  
over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as  
fuses.  
2. Connecting the power supply connector backward  
Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply  
lines. An external direction diode can be added.  
3. Output pin  
In the event that load containing a large inductance component is connected to the output terminal, and generation of  
back-EMF at the start-up and when output is turned OFF is assumed, it is requested to insert a protection diode.  
(Example)  
OUTPUT PIN  
4. GND voltage  
The potential of GND pin must be minimum potential in all operating conditions.  
5. Thermal design  
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.  
6. Inter-pin shorts and mounting errors  
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any  
connection error or if pins are shorted together.  
7. Actions in strong electromagnetic field  
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to  
malfunction.  
8. ASO  
When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO.  
9. Thermal shutdown circuit  
The IC incorporates a built-in thermal shutdown circuit (TSD circuit). The thermal shutdown circuit (TSD circuit) is designed  
only to shut the IC off to prevent thermal runaway. It is not designed to protect the IC or guarantee its operation. Do not  
continue to use the IC after operating this circuit or use the IC in an environment where the operation of this circuit is  
assumed.  
TSD on temperature [°C] (typ.)  
Hysteresis temperature [°C] (typ.)  
BD3508MUV /  
BD3509MUV  
175  
15  
10. Testing on application boards  
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.  
Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or  
removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic  
measure. Use similar precaution when transporting or storing the IC.  
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2009.05 - Rev.A  
18/20  
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Technical Note  
BD3508MUV, BD3509MUV  
11. Regarding input pin of the IC  
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.  
P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode  
or transistor. For example, the relation between each potential is as follows:  
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.  
When GND > Pin B, the P-N junction operates as a parasitic transistor.  
Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual  
interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes operate,  
such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be used.  
Resistor  
Transistor (NPN)  
B
Pin A  
Pin B  
Pin B  
C
E
Pin A  
B
C
E
N
N
N
P+  
P+  
P+  
P+  
N
P
P
Parasitic  
element  
N
N
Parasitic  
element  
P substrate  
P substrate  
GND  
GND  
GND  
GND  
Parasitic element  
Parasitic element  
Other adjacent elements  
12. Ground Wiring Pattern  
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing  
a single ground point at the ground potential of application so that the pattern wiring resistance and voltage variations  
caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND  
wiring pattern of any external components, either.  
Heat Dissipation Characteristics  
4 layers (Copper foil area : 5505mm2)  
copper foil in each layers.  
θj-a=35.1/W  
4 layers (Copper foil area : 10.29m2)  
copper foil in each layers.  
θj-a=103.3/W  
4.0  
3.0  
3.56W  
4 layers (Copper foil area : 10.29m2)  
θj-a=178.6/W  
IC only.  
2.0  
1.21W  
1.0  
0
0.70W  
0.34W  
0
25  
50  
75 100105 125  
150  
Ambient temperature:Ta []  
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2009.05 - Rev.A  
19/20  
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2009 ROHM Co., Ltd. All rights reserved.  
Technical Note  
BD3508MUV, BD3509MUV  
Ordering part number  
B D  
3
5
0
8
M U V  
-
E
2
Part No.  
Part No.  
3508  
Package  
Packaging and forming specification  
E2: Embossed tape and reel  
MUV: VQFN020V4040  
3509  
VQFN020V4040  
<Tape and Reel information>  
4.0 0.1  
Tape  
Embossed carrier tape  
2500pcs  
Quantity  
E2  
Direction  
of feed  
1PIN MARK  
The direction is the 1pin of product is at the upper left when you hold  
reel on the left hand and you pull out the tape on the right hand  
S
(
)
0.08  
S
2.1 0.1  
C0.2  
1.0  
1
5
20  
16  
6
10  
15  
11  
+0.05  
–0.04  
Direction of feed  
1pin  
0.25  
0.5  
Reel  
Order quantity needs to be multiple of the minimum quantity.  
(Unit : mm)  
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2009.05 - Rev.A  
20/20  
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Notice  
N o t e s  
No copying or reproduction of this document, in part or in whole, is permitted without the  
consent of ROHM Co.,Ltd.  
The content specified herein is subject to change for improvement without notice.  
The content specified herein is for the purpose of introducing ROHM's products (hereinafter  
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,  
which can be obtained from ROHM upon request.  
Examples of application circuits, circuit constants and any other information contained herein  
illustrate the standard usage and operations of the Products. The peripheral conditions must  
be taken into account when designing circuits for mass production.  
Great care was taken in ensuring the accuracy of the information specified in this document.  
However, should you incur any damage arising from any inaccuracy or misprint of such  
information, ROHM shall bear no responsibility for such damage.  
The technical information specified herein is intended only to show the typical functions of and  
examples of application circuits for the Products. ROHM does not grant you, explicitly or  
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and  
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the  
use of such technical information.  
The Products specified in this document are intended to be used with general-use electronic  
equipment or devices (such as audio visual equipment, office-automation equipment, commu-  
nication devices, electronic appliances and amusement devices).  
The Products specified in this document are not designed to be radiation tolerant.  
While ROHM always makes efforts to enhance the quality and reliability of its Products, a  
Product may fail or malfunction for a variety of reasons.  
Please be sure to implement in your equipment using the Products safety measures to guard  
against the possibility of physical injury, fire or any other damage caused in the event of the  
failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM  
shall bear no responsibility whatsoever for your use of any Product outside of the prescribed  
scope or not in accordance with the instruction manual.  
The Products are not designed or manufactured to be used with any equipment, device or  
system which requires an extremely high level of reliability the failure or malfunction of which  
may result in a direct threat to human life or create a risk of human injury (such as a medical  
instrument, transportation equipment, aerospace machinery, nuclear-reactor controller,  
fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of  
any of the Products for the above special purposes. If a Product is intended to be used for any  
such special purpose, please contact a ROHM sales representative before purchasing.  
If you intend to export or ship overseas any Product or technology specified herein that may  
be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to  
obtain a license or permit under the Law.  
Thank you for your accessing to ROHM product informations.  
More detail product informations and catalogs are available, please contact us.  
ROHM Customer Support System  
http://www.rohm.com/contact/  
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R0039  
A

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BD350T

THROUGH HOLE SCHOTTKY BARRIER RECTIFIERS
PANJIT

BD350YS

THROUGH HOLE SCHOTTKY BARRIER RECTIFIERS
PANJIT

BD350YT

THROUGH HOLE SCHOTTKY BARRIER RECTIFIERS
PANJIT

BD3512MUV

Ultra Low Dropout Linear Regulators for PC Chipsets with Power Good
ROHM

BD3512MUV-E2

Fixed Positive LDO Regulator, CMOS, 4 X 4 MM, VQFN-20
ROHM