ISL8563EIB [ROCHESTER]
Line Transceiver, 2 Func, 2 Driver, 2 Rcvr, CMOS, PDSO18, PLASTIC, MS-013-AB, SOIC-18;
| 型号： | ISL8563EIB |
| 厂家： | 
Rochester Electronics |
| 描述： | Line Transceiver, 2 Func, 2 Driver, 2 Rcvr, CMOS, PDSO18, PLASTIC, MS-013-AB, SOIC-18 光电二极管 |
| 文件： | 总11页 (文件大小：1037K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISL8563E
®
Data Sheet
February 2004
FN6002.1
+/-15kV ESD Protected, +3V to +5.5V,
1Microamp, 250kbps, EIA/TIA-562,
EIA/TIA-232 Transmitters/Receivers
Features
• ESD Protection for RS-562 I/O Pins to ±15kV (IEC61000)
• Drop in Replacement for MAX563, with Improved Output
Voltage (±5V) for Enhanced Noise Immunity
The Intersil ISL8563E contains 3.0V to 5.5V powered
transmitters/receivers which meet ElA/TIA-562 and
• Meets EIA/TIA-562, and EIA/TIA-232 Specifications at 3V
• RS-232 Compatible Outputs at 2.7V
• Latch-Up Free
ElA/TIA-232 specifications, even at V
= 3.0V. Additionally,
CC
they provide ±15kV ESD protection (IEC61000-4-2 Air Gap
and Human Body Model) on transmitter outputs and receiver
inputs (RS-562 pins). Targeted applications are PDAs,
Palmtops, and notebook and laptop computers where the
low operational, and even lower standby, power
• On-Chip Voltage Converters Require Only Four External
0.1µF Capacitors
consumption is critical. Efficient on-chip charge pumps,
coupled with a manual powerdown function, reduce the
standby supply current to a 1µA trickle. Small footprint
packaging, and the use of small, low value capacitors ensure
board space savings as well. Data rates greater than
250kbps are guaranteed at worst case load conditions. The
ISL8563E is fully compatible with 3.3V only systems, mixed
3.3V and 5.0V systems, and 5.0V only systems.
• Receivers Active in Powerdown
• Receiver Hysteresis For Improved Noise Immunity
• Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps
• Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 4V/µs
• Wide Power Supply Range . . . . . . . Single +3V to +5.5V
• Low Supply Current in Powerdown State. . . . . . . . . . .1µA
This product features an improved charge pump which
delivers ±5V transmitter supplies, allowing the use of the
ISL8563E in RS-562 and RS-232 applications. RS-562
applications will benefit from the improved noise immunity
afforded by the ±5V output swing capability.
Applications
• Any System Requiring RS-562/RS-232 Communication
Ports
- Battery Powered, Hand-Held, and Portable Equipment
- Laptop Computers, Notebooks, Palmtops
- Digital Cameras
Table 1 summarizes the features of the device represented
by this data sheet, while Application Note AN9863
summarizes the features of each device comprising the 3V
RS-232 family.
- Bar Code Readers
Related Literature
Ordering Information
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
TEMP.
PKG.
PART NO.
ISL8563ECB
ISL8563ECB-T
ISL8563ECP
ISL8563EIB
RANGE (°C)
PACKAGE
18 Ld SOIC
DWG. #
• Application Note AN9863, “3V to +5.5V, 250K-1Mbps,
RS-232 Transmitters/Receivers”
0 to 70
0 to 70
M18.3
Tape and Reel
18 Ld PDIP
M18.3
E18.3
M18.3
M18.3
Pinout
0 to 70
ISL8563E (PDIP, SOIC)
-40 to 85
-40 to 85
18 Ld SOIC
TOP VIEW
ISL8563EIB-T
Tape and Reel
EN
C1+
V+
1
2
3
4
5
6
7
8
9
18 SHDN
17 V
CC
16 GND
15 T1
C1-
C2+
C2-
V-
OUT
14 R1
13 R1
IN
OUT
IN
12 T1
11 T2
T2
OUT
IN
R2
10
R2
IN
OUT
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004. All Rights Reserved
1
All other trademarks mentioned are the property of their respective owners.
ISL8563E
TABLE 1. SUMMARY OF FEATURES
DATA
NO. OF
MONITOR Rx.
MANUAL
POWER-
DOWN?
AUTOMATIC
POWERDOWN
FUNCTION?
NO. OF NO.OF
RATE
Rx. ENABLE
FUNCTION?
READY
PART NUMBER
Tx.
Rx.
(R
)
(kbps)
OUTPUT?
OUTB
ISL8563E
2
2
0
250
Yes
No
Yes
No
Pin Descriptions
PIN
FUNCTION
V
System Power Supply Input (3.0V to 5.5V).
CC
V+
Internally Generated Positive Transmitter Supply (+5.5V).
Internally Generated Negative Transmitter Supply (-5.5V).
Ground Connection.
V-
GND
C1+
C1-
External Capacitor (Voltage Doubler) is connected to this lead.
External Capacitor (Voltage Doubler) is connected to this lead.
External Capacitor (Voltage Inverter) is connected to this lead.
External Capacitor (Voltage Inverter) is connected to this lead.
TTL/CMOS Compatible Transmitter Inputs with pull-up resistors.
C2+
C2-
T
IN
T
±15kV ESD Protected, RS-562/RS-232 level (nominally ±5.5V) transmitter outputs.
±15kV ESD Protected, RS-562/RS-232 compatible receiver inputs.
TTL/CMOS Level Receiver Outputs.
OUT
R
IN
R
OUT
EN
Active Low Receiver Enable Control.
SHDN
Active Low Input which shuts down transmitters and on-board power supply, to place device in low power mode.
Typical Operating Circuit
ISL8563E
+3.3V
C
+
0.1µF
17
C
3
2
0.1µF
C1+
V
CC
1
+
+
+
+
V+
V-
0.1µF
4
5
3
7
C1-
C2+
C
0.1µF
2
C
4
6
C2-
0.1µF
V
CC
400kΩ
T
T
1
2
12
15
T1
T2
T1
T2
IN
IN
OUT
OUT
V
CC
400kΩ
8
11
13
TTL/CMOS
RS-562/232
LEVELS
LOGIC LEVELS
14
R1
R1
R2
OUT
IN
IN
5kΩ
R
1
9
10
1
R2
OUT
5kΩ
R
2
EN
18
V
CC
SHDN
GND
16
2
ISL8563E
Absolute Maximum Ratings
Thermal Information
Thermal Resistance (Typical, Note 1)
18 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . .
18 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C
Maximum Storage Temperature Range. . . . . . . . . . .-65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(SOIC - Lead Tips Only)
V
to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
θ
(°C/W)
JA
CC
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
80
75
T
R
, EN, SHDN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
IN
IN
Output Voltages
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V
OUT
Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
T
R
OUT
Operating Conditions
Temperature Range
ISL8563ECX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
ISL8563EIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V +0.3V
CC
T
OUT
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θ is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
Electrical Specifications Test Conditions: V = 3V to 5.5V, C - C = 0.1µF; Unless Otherwise Specified.
CC
1
4
Typicals are at T = 25°C
A
TEMP
(°C)
PARAMETER
RS-562/RS-232 TRANSMITTERS
Output Voltage Swing
TEST CONDITIONS
MIN
TYP
MAX
UNITS
All Transmitter Outputs Loaded with 3kΩ to Ground
R = 3kΩ, C = 1000pF, One Transmitter Switching and
Maintaining ±5V Output Swing
Full
Full
±5.0
250
±5.4
500
-
-
V
kbps
Maximum Data Rate
L
L
Input Logic Threshold Low
Input Logic Threshold High
Transmitter Pull-Up Input Current
T
T
T
Full
Full
Full
Full
Full
Full
Full
-
-
-
2
0.8
-
20
±1.0
±10
-
V
V
µA
µA
µA
Ω
IN
IN
IN
V
= 3.0V to 5.0V
2.4
-
-
-
300
-
CC
SHDN = V
CC
SHDN = GND
= 0V or 3.6V to 5.5V, SHDN = GND
= V+ = V- = 0V, Transmitter Output = ±2V
±0.01
-
10M
±35
Output Leakage Current
Output Resistance
Output Short-Circuit Current
RS-562/RS-232 RECEIVERS
Input Voltage Range
V
V
V
= ±12V, V
CC
OUT
CC
= 0V
±60
mA
OUT
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
-25
-
-
2.4
2.4
0.1
3
-
25
0.6
0.8
-
V
V
V
V
V
V
kΩ
V
V
µA
V
Input Threshold Low
V
V
V
V
V
= 3.3V
= 5.0V
= 3.3V
= 5.0V
1.2
1.5
1.5
1.8
0.5
5
CC
CC
CC
CC
CC
Input Threshold High
-
Input Hysteresis
Input Resistance
Output Voltage Low
Output Voltage High
Output Leakage Current
EN Input Logic Threshold Low
EN Input Logic Threshold High
POWER SUPPLY
= 3.0V to 3.6V
1.0
7
0.4
-
±10
0.8
-
I
I
= 3.2mA
= -1.0mA
-
-
OUT
OUT
V
-0.6 V
-0.1
CC
-
-
CC
±0.05
-
-
EN = V
CC
V
= 3.0V to 5.0V
2.4
V
CC
Operating Supply Voltage
Supply Current
Full
Full
25
25
Full
3.0
-
0.5
14
1
5.5
6.0
-
10
25
V
SHDN = V
All Outputs Unloaded
All Outputs loaded, R = 3kΩ
-
-
-
-
mA
mA
µA
µA
CC
L
Supply Current, Powerdown
SHDN = GND
1
3
ISL8563E
Electrical Specifications Test Conditions: V = 3V to 5.5V, C - C = 0.1µF; Unless Otherwise Specified.
CC
1
4
Typicals are at T = 25°C (Continued)
A
TEMP
(°C)
Full
Full
Full
PARAMETER
TEST CONDITIONS
MIN
-
-
TYP
±0.01
-
-
MAX
±1.0
0.8
-
UNITS
µA
V
SHDN Input Leakage Current
SHDN Input Logic Threshold Low
SHDN Input Logic Threshold High
AC CHARACTERISTICS
V
V
= 3.0V to 5.0V
2.4
V
CC
Transition Region Slew Rate
= 3.3V, R = 3kΩ to 7kΩ, Measured From 3V to -3V or
-3V to 3V, C = 50pF to 2500pF
25
4
-
30
V/µs
CC
L
L
Transmitter Propagation Delay
Receiver Propagation Delay
Transmitter Input to
t
t
(Note 2)
(Note 2)
Full
Full
-
-
1
1
3.5
3.5
µs
µs
PHL
PLH
Transmitter Output,
C = 1000pF, R = 3kΩ
L
L
Receiver Input to Receiver
Output, C = 150pF
L
t
t
t
t
t
t
(Note 3)
(Note 3)
Full
Full
Full
Full
25
25
25
25
-
-
-
-
-
-
-
-
0.3
0.3
125
160
17
600
100
100
1.0
1.0
500
500
-
-
-
-
µs
µs
ns
ns
µs
ns
ns
ns
PHL
PLH
ER
Receiver Output Enable Time
Receiver Output Disable Time
Transmitter Output Enable Time
Transmitter Output Disable Time
Transmitter Skew
Figure 1
Figure 1
Figure 2
Figure 2
DR
ET
DT
t
t
- t
(Note 2)
(Note 3)
PHL PLH
Receiver Skew
- t
PHL PLH
ESD PERFORMANCE
RS-562 Pins (T
, R
)
Human Body Model
25
25
25
25
-
-
-
-
±15
±8
±15
±3
-
-
-
-
kV
kV
kV
kV
OUT IN
IEC61000-4-2 Contact Discharge
IEC61000-4-2 Air Gap Discharge
Human Body Model
All Other Pins
NOTES:
2. Transmitter is measured at the transmitter zero crossing points.
3. Receiver is measured at the receiver 50 percent crossing points.
Test Waveforms
V
CC
t
V
CC
EN INPUT
0V
0V
0V
SHDN INPUT
t
ER
ET
+3.7V
V
- 0.6V
0.5V
CC
RECEIVER
OUTPUT
CC
TRANSMITTER
OUTPUT
C
= 50pF
= 3kΩ
C
R
= 150pF to GND
= 1kΩ to 0.5V
L
+0.4V
L
L
-3.7V
R
L
CC
V
V
CC
CC
SHDN INPUT
0V
0V
EN INPUT
t
DR
t
DT
V
V+
OH
+3.7V
-3.7V
V
V
- 0.1V
+ 0.1V
OH
TRANSMITTER
OUTPUT
0.5V
RECEIVER
OUTPUT
CC
0V
C
= 50pF
= 3kΩ
L
L
V
C
= 150pF to GND
= 1kΩ to 0.5V
CC
OL
OL
L
L
V-
R
R
FIGURE 2. TRANSMITTER OUTPUT ENABLE AND DISABLE
TIMING
FIGURE 1. RECEIVER OUTPUT ENABLE AND DISABLE TIMING
4
ISL8563E
(V
= 0V). The receivers’ Schmitt trigger input stage uses
Detailed Description
CC
hysteresis (even in powerdown) to increase noise immunity
and decrease errors due to slow input signal transitions.
The ISL8563E operates from a single +3V to +5.5V supply,
guarantees a 250kbps minimum data rate, requires only four
small external 0.1µF capacitors, features low power
consumption, and meets all ElA/TIA-562 and EIA/TIA-232
specifications. The circuit is divided into three sections: The
charge pump, the transmitters, and the receivers.
The ISL8563E inverting receivers disable only when EN is
driven high. Standard receivers driving powered down
peripherals must be disabled to prevent current flow through
the peripheral’s protection diodes (see Figures 4 and 5).
Charge-Pump
V
CC
Intersil’s new ISL8563E utilizes regulated on-chip dual
charge pumps as voltage doublers, and voltage inverters to
R
R
XIN
XOUT
GND ≤ V
≤ V
CC
-25V ≤ V
≤ +25V
5kΩ
ROUT
RIN
generate ±5.5V transmitter supplies from a V
supply as
CC
GND
low as 3.0V. This allows these devices to maintain RS-232
compliant output levels over the ±10% tolerance range of
3.3V powered systems. The efficient on-chip power supplies
require only four small, external 0.1µF capacitors for the
FIGURE 3. INVERTING RECEIVER CONNECTIONS
Powerdown Functionality
voltage doubler and inverter functions over the full V
CC
This 3V device requires a nominal supply current of 0.3mA
during normal operation (not in powerdown mode). This is
considerably less than the 5mA to 11mA current required by
5V devices. The already low current requirement drops
significantly when the device enters powerdown mode. In
powerdown, supply current drops to 1µA, because the on-
range. The charge pumps operate discontinuously (i.e., they
turn off as soon as the V+ and V- supplies are pumped up to
the nominal values), resulting in significant power savings.
Transmitters
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-562/232
output levels. Coupled with the on-chip ±5.5V supplies,
these transmitters deliver true RS-562/232 levels over a
wide range of single supply system voltages.
chip charge pump turns off (V+ collapses to V , V-
CC
collapses to GND), the transmitter outputs three-state, and
the transmitter input pull-ups disable. This micro-power
mode makes the ISL8563E ideal for battery powered and
portable applications.
All transmitter outputs disable and assume a high
impedance state when the device enters the powerdown
mode (see Table 2). These outputs may be driven to ±12V
when disabled.
Software Controlled (Manual) Powerdown
The ISL8563E, is forced into its low power, stand by state via
a simple shutdown (SHDN) pin. Driving this pin high enables
normal operation, while driving it low forces the IC into its
All devices guarantee a 250kbps data rate (V
= ±5V) for
OUT
≥ 3.0V, with one
powerdown state. Connect SHDN to V
if the powerdown
CC
full load conditions (3kΩ and 1000pF), V
CC
function isn’t needed. Note that all the receiver outputs
remain enabled during shutdown (see Table 2). For the
lowest power consumption during powerdown, the receivers
should also be disabled by driving the EN input high (see
next section, and Figures 4 and 5). The time required to exit
powerdown, and resume transmission is less than 30µs.
transmitter operating at full speed. Under more typical
conditions of V ≥ 3.3V, R = 3kΩ, and C = 250pF, one
CC
L
L
transmitter easily operates at 900kbps.
Unused transmitter inputs may be left unconnected because
they will be pulled to V by the on-chip pull-up resistors.
CC
Forcing the ISL8563E into power down disables the pull-up
resistors to further minimize power.
Receiver ENABLE Control
The device also features an EN input to control the receiver
outputs. Driving EN high disables all the receiver outputs
placing them in a high impedance state. This is useful to
eliminate supply current, due to a receiver output forward
biasing the protection diode, when driving the input of a
Receivers
The ISL8563E contains standard inverting receivers that
three-state via the EN control line. All the receivers convert
RS-562/232 signals to CMOS output levels and accept
inputs up to ±25V while presenting the required 3kΩ to 7kΩ
input impedance (see Figure 3) even if the power is off
powered down (V = GND) peripheral (see Figure 4). The
enable input has no effect on transmitters.
CC
TABLE 2. POWERDOWN AND ENABLE LOGIC TRUTH TABLE
SHDN INPUT
EN INPUT
TRANSMITTER OUTPUTS
RECEIVER OUTPUTS
MODE OF OPERATION
Manual Powerdown
L
L
L
H
L
High-Z
High-Z
Active
Active
Active
High-Z
Active
High-Z
Manual Powerdown w/Rcvr. Disabled
Normal Operation
H
H
H
Normal Operation w/Rcvr. Disabled
5
ISL8563E
Power Supply Decoupling
V
CC
In most circumstances a 0.1µF bypass capacitor is
V
CC
adequate. In applications that are particularly sensitive to
V
CURRENT
FLOW
CC
power supply noise, decouple V
to ground with a
CC
capacitor of the same value as the charge-pump capacitor C .
1
V
= V
CC
OUT
Connect the bypass capacitor as close as possible to the IC.
Rx
POWERED
DOWN
Operation Down to 2.7V
UART
Tx
ISL8563E transmitter outputs meet RS-562 levels (±3.7V), at
OLD
SHDN = GND
RS-562/232 CHIP
GND
the full data rate, with V
as low as 2.7V. RS-562 levels
CC
typically ensure interoperability with RS-232 devices.
FIGURE 4. POWER DRAIN THROUGH POWERED DOWN
PERIPHERAL
Transmitter Outputs When Exiting
Powerdown
Figure 6 shows the response of two transmitter outputs
when exiting powerdown mode. As they activate, the two
transmitter outputs properly go to opposite RS-562/232
levels, with no glitching, ringing, nor undesirable transients.
Each transmitter is loaded with 3kΩ in parallel with 2500pF.
Note that the transmitters enable only when the magnitude
of the supplies exceed approximately 3V.
V
CC
TRANSITION
DETECTOR
TO
ISL8563E
WAKE-UP
LOGIC
V
CC
5V/DIV
SHDN
T1
R
T
V
= HI-Z
X
OUT
R2
OUT
POWERED
DOWN
R2
IN
UART
T1
IN
X
2V/DIV
T1
OUT
SHDN = GND, EN = V
CC
T2
FIGURE 5. DISABLED RECEIVERS PREVENT POWER DRAIN
V
= +3.3V
CC
C1 - C4 = 0.1µF
TIME (20µs/DIV)
Capacitor Selection
FIGURE 6. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
The charge pumps operate with 0.1µF (or greater)
capacitors for 3.0V ≤ V
≤ 5.5V. Increasing the capacitor
CC
values (by a factor of 2) reduces ripple on the transmitter
outputs and slightly reduces power consumption. C , C , and
High Data Rates
2
3
C can be increased without increasing C ’s value, however,
4
1
The ISL8563E maintains the RS-232 ±5V minimum
transmitter output voltages even at high data rates. Figure 7
details a transmitter loopback test circuit, and Figure 8
illustrates the loopback test result at 120kbps. For this test,
all transmitters were simultaneously driving RS-232 loads in
parallel with 1000pF, at 120kbps. Figure 9 shows the
loopback results for a single transmitter driving 1000pF and
an RS-232 load at 250kbps. The static transmitters were
also loaded with an RS-232 receiver.
do not increase C without also increasing C , C , and C to
1
2
3
4
maintain the proper ratios (C to the other capacitors).
1
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor’s equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
6
ISL8563E
Interconnection with 3V and 5V Logic
V
CC
+
0.1µF
The ISL8563E directly interfaces with 5V CMOS and TTL
logic families. Nevertheless, with the device at 3.3V, and the
logic supply at 5V, AC, HC, and CD4000 outputs can drive
ISL83563E inputs, but ISL83563E outputs do not reach the
V
CC
V+
V-
+
+
C1+
+
C
C
1
2
C
3
4
C1-
ISL8563E
CC
C2+
C
V
minimum V for these logic families. See Table 3 for more
IH
+
C2-
400kΩ
information.
T
T
IN
OUT
TABLE 3. LOGIC FAMILY COMPATIBILITY WITH VARIOUS
SUPPLY VOLTAGES
1000pF
R
IN
R
OUT
EN
SHDN
SYSTEM
V
CC
POWER-SUPPLY SUPPLY
5K
VOLTAGE
(V)
VOLTAGE
(V)
COMPATIBILITY
V
CC
3.3
5
3.3
5
Compatible with all CMOS families.
Compatible with all TTL and
CMOS logic families.
FIGURE 7. TRANSMITTER LOOPBACK TEST CIRCUIT
5
3.3
Compatible with ACT and HCT
CMOS, and with TTL. ISL83563E
outputs are incompatible with AC,
HC, and CD4000 CMOS inputs.
5V/DIV.
T1
IN
±15kV ESD Protection
All pins on Intersil 3V interface devices include ESD
protection structures, but the ISL8XXXE family incorporates
advanced structures which allow the RS-562/232 pins
(transmitter outputs and receiver inputs) to survive ESD
events up to ±15kV. These pins are particularly vulnerable to
ESD damage because they typically connect to an exposed
port on the exterior of the finished product. Simply touching
the port pins, or connecting a cable, can cause an ESD event
that might destroy unprotected ICs. These new ESD
T1
OUT
OUT
R1
V
= +3.3V
CC
C1 - C4 = 0.1µF
structures protect the device whether or not it is powered up,
protect without allowing any latchup mechanism to activate,
and don’t interfere with RS-562/232 signals as large as ±25V.
5µs/DIV.
FIGURE 8. LOOPBACK TEST AT 120kbps
Human Body Model (HBM) Testing
As the name implies, this test method emulates the ESD
event delivered to an IC during human handling. The tester
delivers the charge through a 1.5kΩ current limiting resistor,
making the test less severe than the IEC61000 test which
utilizes a 330Ω limiting resistor. The HBM method
5V/DIV
T1
IN
determines an ICs ability to withstand the ESD transients
typically present during handling and manufacturing. Due to
the random nature of these events, each pin is tested with
respect to all other pins. The RS-562/232 pins on “E” family
devices can withstand HBM ESD events to ±15kV.
T1
R1
OUT
OUT
IEC61000-4-2 Testing
The IEC61000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely
to suffer an ESD event are those that are exposed to the
outside world (the RS-562/232 pins in this case), and the IC
is tested in its typical application configuration (power
applied) rather than testing each pin-to-pin combination. The
lower current limiting resistor coupled with the larger charge
V
= +3.3V
CC
C1 - C4 = 0.1µF
2µs/DIV
FIGURE 9. LOOPBACK TEST AT 250kbps
7
ISL8563E
storage capacitor yields a test that is much more severe than
repeatable results. The “E” device RS-562/232 pins
the HBM test. The extra ESD protection built into this
device’s RS-562/232 pins allows the design of equipment
meeting level 4 criteria without the need for additional board
level protection on the RS-562/232 port.
withstand ±15kV air-gap discharges.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages
higher than ±8kV. All “E” family devices survive ±8kV contact
discharges on the RS-562/232 pins.
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward the
IC pin until the voltage arcs to it. The current waveform
delivered to the IC pin depends on approach speed,
humidity, temperature, etc., so it is difficult to obtain
Typical Performance Curves V = 3.3V, T = 25°C
CC
A
6
25
20
V
+
OUT
4
2
1 TRANSMITTER AT 250kbps
1 TRANSMITTER AT 30kbps
0
15
-SLEW
-2
-4
+SLEW
10
V
-
OUT
-6
5
0
1000
2000
3000
4000
5000
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
FIGURE 10. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
FIGURE 11. SLEW RATE vs LOAD CAPACITANCE
3.5
45
NO LOAD
ALL OUTPUTS STATIC
40
3.0
2.5
2.0
1.5
1.0
0.5
0
250kbps
35
30
25
20
15
10
5
120kbps
20kbps
0
0
1000
2000
3000
4000
5000
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
LOAD CAPACITANCE (pF)
SUPPLY VOLTAGE (V)
FIGURE 12. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FIGURE 13. SUPPLY CURRENT vs SUPPLY VOLTAGE
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
PROCESS:
Si Gate CMOS
GND
TRANSISTOR COUNT:
338
8
ISL8563E
Dual-In-Line Plas tic Packages (PDIP)
E18.3 (JEDEC MS-001-BC ISSUE D)
N
18 LEAD DUAL-IN-LINE PLASTIC PACKAGE
E1
INDEX
AREA
INCHES
MILLIMETERS
1 2
3
N/2
SYMBOL
MIN
MAX
0.210
-
MIN
-
MAX
5.33
-
NOTES
-B-
-C-
A
A1
A2
B
-
4
-A-
0.015
0.115
0.014
0.045
0.008
0.845
0.005
0.300
0.240
0.39
2.93
0.356
1.15
0.204
21.47
0.13
7.62
6.10
4
D
E
BASE
PLANE
0.195
0.022
0.070
0.014
0.880
-
4.95
0.558
1.77
0.355
22.35
-
-
A2
A
-
SEATING
PLANE
L
C
L
B1
C
8, 10
D1
B1
-
eA
A1
A
D1
e
D
5
eC
C
B
eB
D1
E
5
0.010 (0.25) M
C
B S
0.325
0.280
8.25
7.11
6
NOTES:
E1
e
5
1. Controlling Dimensions: INCH. In case of conflict between English and
Metric dimensions, the inch dimensions control.
0.100 BSC
0.300 BSC
2.54 BSC
7.62 BSC
-
e
A
6
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
e
-
0.430
0.150
-
10.92
3.81
7
B
L
0.115
2.93
4
9
4. Dimensions A, A1 and L are measured with the package seated in
N
18
18
JEDEC seating plane gauge GS-3.
Rev. 2 11/03
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
e
6. E and
are measured with the leads constrained to be perpendic-
A
-C-
ular to datum
.
7. e and e are measured at the lead tips with the leads unconstrained.
B
C
e
must be zero or greater.
C
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3
may have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
9
ISL8563E
Small Outline Plas tic Packages (SOIC)
N
M18.3 (JEDEC MS-013-AB ISSUE C)
INDEX
0.25(0.010)
M
B M
H
18 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
AREA
E
INCHES
MILLIMETERS
-B-
SYMBOL
MIN
MAX
MIN
2.35
0.10
0.33
0.23
11.35
7.40
MAX
2.65
0.30
0.51
0.32
11.75
7.60
NOTES
A
A1
B
C
D
E
e
0.0926
0.0040
0.013
0.1043
0.0118
0.0200
0.0125
0.4625
0.2992
-
1
2
3
L
-
9
SEATING PLANE
A
0.0091
0.4469
0.2914
-
-A-
o
h x 45
D
3
4
-C-
α
µ
0.050 BSC
1.27 BSC
-
e
A1
H
h
0.394
0.010
0.016
0.419
0.029
0.050
10.00
0.25
0.40
10.65
0.75
1.27
-
C
B
0.10(0.004)
5
0.25(0.010) M
C A M B S
L
6
N
α
18
18
7
NOTES:
o
o
o
o
0
8
0
8
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Rev. 0 12/93
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Thelead width “B”, as measured 0.36mm(0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
10
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