ICL3245EIAZ [ROCHESTER]

TRIPLE LINE TRANSCEIVER, PDSO28, ROHS COMPLIANT, PLASTIC, MO-150AH, SSOP-28;
ICL3245EIAZ
型号: ICL3245EIAZ
厂家: Rochester Electronics    Rochester Electronics
描述:

TRIPLE LINE TRANSCEIVER, PDSO28, ROHS COMPLIANT, PLASTIC, MO-150AH, SSOP-28

驱动 光电二极管 接口集成电路 驱动器
文件: 总21页 (文件大小:1127K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ICL3225E, ICL3227E, ICL3245E  
®
Data Sheet  
February 27, 2006  
FN4900.9  
±15kV ESD Protected, +3V to +5.5V,  
1Microamp, 1Mbps, RS-232 Transceivers  
with Enhanced Automatic Powerdown  
Features  
• Pb-Free Plus Anneal Available (RoHS Compliant)  
(see Ordering Info)  
The Intersil ICL32XXE devices are 3.0V to 5.5V powered  
RS-232 transmitters/receivers which meet ElA/TIA-232 and  
• ESD Protection for RS-232 I/O Pins to ±15kV (IEC61000)  
• Manual and Enhanced Automatic Powerdown Features  
V.28/V.24 specifications, even at V  
= 3.0V. Additionally,  
CC  
they provide ±15kV ESD protection (IEC61000-4-2 Air Gap  
and Human Body Model) on transmitter outputs and receiver  
inputs (RS-232 pins). Targeted applications are PDAs,  
Palmtops, and notebook and laptop computers where the  
low operational, and even lower standby, power  
consumption is critical. Efficient on-chip charge pumps,  
coupled with manual and enhanced automatic powerdown  
functions, reduce the standby supply current to a 1µA trickle.  
Small footprint packaging, and the use of small, low value  
capacitors ensure board space savings as well. Data rates  
greater than 1Mbps are guaranteed at worst case load  
conditions. This family is fully compatible with 3.3V only  
systems, mixed 3.3V and 5.0V systems, and 5.0V only  
systems.  
• Drop in Replacements for MAX3225E, MAX3227E,  
MAX3245E  
• RS-232 Compatible with V  
CC  
= 2.7V  
• Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V  
• Latch-Up Free  
• On-Chip Voltage Converters Require Only Four External  
0.1µF Capacitors  
• Guaranteed Mouse Driveability (ICL3245E)  
• “Ready to Transmit” Indicator Output  
(ICL3225E/ICL3227E)  
• Receiver Hysteresis For Improved Noise Immunity  
• Guaranteed Minimum Data Rate . . . . . . . . . . . . . . 1Mbps  
• Low Skew at Transmitter/Receiver Input Trip Points . . . 10ns  
• Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . 24V/µs  
• Wide Power Supply Range . . . . . . . Single +3V to +5.5V  
• Low Supply Current in Powerdown State. . . . . . . . . . .1µA  
The ICL3245E is a 3 driver, 5 receiver device that provides a  
complete serial port suitable for laptop or notebook  
computers. It also includes a noninverting always-active  
receiver for “wake-up” capability.  
These devices, feature an enhanced automatic  
powerdown function which powers down the on-chip power-  
supply and driver circuits. This occurs when all receiver and  
transmitter inputs detect no signal transitions for a period of  
30s. These devices power back up, automatically, whenever  
they sense a transition on any transmitter or receiver input.  
Applications  
• Any System Requiring RS-232 Communication Ports  
- Battery Powered, Hand-Held, and Portable Equipment  
- Laptop Computers, Notebooks, Palmtops  
- Modems, Printers and Other Peripherals  
- Digital Cameras  
Table 1 summarizes the features of the device represented  
by this data sheet, while Application Note AN9863  
summarizes the features of each device comprising the  
ICL32XXE 3V family.  
- Cellular/Mobile Phones  
TABLE 1. SUMMARY OF FEATURES  
ENHANCED  
AUTOMATIC  
POWERDOWN  
FUNCTION?  
NO. OF  
DATA  
RATE  
(kbps)  
MANUAL  
POWER-  
DOWN?  
NO. OF NO.OF  
MONITOR Rx.  
Rx. ENABLE  
FUNCTION?  
READY  
PART NUMBER  
ICL3225E  
Tx.  
2
Rx.  
2
(R  
)
OUTPUT?  
OUTB  
0
1000  
1000  
1000  
No  
No  
No  
Yes  
Yes  
No  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
ICL3227E  
1
1
0
1
ICL3245E  
3
5
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright © Intersil Americas Inc. 2000, 2001, 2003-2006. All Rights Reserved  
1
All other trademarks mentioned are the property of their respective owners.  
ICL3225E, ICL3227E, ICL3245E  
Ordering Information (Continued)  
Ordering Information  
TEMP.  
RANGE  
(°C)  
TEMP.  
RANGE  
(°C)  
PART  
PKG.  
PART  
PKG.  
PART NO. *  
MARKING  
PACKAGE  
DWG. #  
PART NO. *  
MARKING  
PACKAGE  
DWG. #  
ICL3245ECBZ ICL3245ECBZ 0 to 70 28 Ld SOIC  
M28.3  
ICL3225ECA  
ICL3225ECA  
0 to 70 20 Ld SSOP M20.209  
(Note 1)  
(Pb-free)  
ICL3225ECAZ ICL3225ECAZ 0 to 70 20 Ld SSOP M20.209  
(Note 1)  
ICL3245ECV  
ICL3245ECV  
0 to 70 28 Ld TSSOP M28.173  
(Pb-free)  
ICL3245ECVZ ICL3245ECVZ 0 to 70 28 Ld TSSOP M28.173  
ICL3225ECP  
ICL3225ECP  
0 to 70 20 Ld PDIP  
E20.3  
(Note 1)  
(Pb-free)  
ICL3225ECPZ 3225ECPZ  
(Note 1)  
0 to 70 20 Ld PDIP** E20.3  
(Pb-free)  
ICL3245EIA  
ICL3245EIA  
-40 to 85 28 Ld SSOP M28.209  
ICL3245EIAZ  
(Note 1)  
ICL3245EIAZ -40 to 85 28 Ld SSOP M28.209  
(Pb-free)  
ICL3225EIA  
ICL3225EIA  
-40 to 85 20 Ld SSOP M20.209  
ICL3225EIAZ  
(Note 1)  
ICL3225EIAZ -40 to 85 20 Ld SSOP M20.209  
(Pb-free)  
ICL3245EIB  
ICL3245EIB  
-40 to 85 28 Ld SOIC  
M28.3  
* Most surface mount devices are available on tape and reel; add “-T” to  
ICL3227ECA  
ICL3227ECA  
0 to 70 16 Ld SSOP M16.209  
suffix.  
ICL3227ECAZA 3227ECAZ  
(Note 1)  
0 to 70 16 Ld SSOP M16.209  
(Pb-free)  
**Pb-free PDIPs can be used for through hole wave solder processing  
only. They are not intended for use in Reflow solder processing  
applications.  
ICL3227EIA  
ICL3227EIA  
-40 to 85 16 Ld SSOP M16.209  
NOTE:  
ICL3227EIAZA 3227EIAZ  
(Note 1)  
-40 to 85 16 Ld SSOP M16.209  
(Pb-free)  
1. Intersil Pb-free plus anneal products employ special Pb-free  
material sets; molding compounds/die attach materials and 100%  
matte tin plate termination finish, which are RoHS compliant and  
compatible with both SnPb and Pb-free soldering operations.  
Intersil Pb-free products are MSL classified at Pb-free peak reflow  
temperatures that meet or exceed the Pb-free requirements of  
IPC/JEDEC J STD-020.  
ICL3245ECA  
ICL3245ECA  
0 to 70 28 Ld SSOP M28.209  
ICL3245ECAZ ICL3245ECAZ 0 to 70 28 Ld SSOP M28.209  
(Note 1)  
(Pb-Free)  
ICL3245ECB  
ICL3245ECB  
0 to 70 28 Ld SOIC  
M28.3  
Pinouts  
ICL3225E (PDIP, SSOP)  
ICL3227E (SSOP)  
TOP VIEW  
TOP VIEW  
READY  
C1+  
V+  
1
2
20 FORCEOFF  
READY  
C1+  
V+  
1
2
3
4
5
6
7
8
16 FORCEOFF  
19 V  
CC  
15 V  
CC  
3
18 GND  
14 GND  
17 T1  
OUT  
C1-  
4
13 T1  
OUT  
C1-  
C2+  
C2-  
5
16 R1  
IN  
C2+  
C2-  
12 FORCEON  
6
15 R1  
OUT  
11 T1  
IN  
V-  
7
14 FORCEON  
V-  
10 INVALID  
T2  
8
13 T1  
IN  
R1  
IN  
9
R1  
OUT  
OUT  
R2  
IN  
9
12  
T2  
IN  
11 INVALID  
10  
R2  
OUT  
FN4900.9  
2
February 27, 2006  
ICL3225E, ICL3227E, ICL3245E  
Pinouts (Continued)  
ICL3245E (SOIC, SSOP, TSSOP)  
TOP VIEW  
C2+  
C2-  
V-  
1
2
28 C1+  
27 V+  
3
26 V  
CC  
25 GND  
R1  
R2  
R3  
R4  
R5  
4
IN  
IN  
IN  
IN  
IN  
5
24 C1-  
6
23 FORCEON  
22 FORCEOFF  
21 INVALID  
7
8
T1  
9
20  
R2  
OUT  
OUT  
OUT  
OUTB  
OUT  
OUT  
OUT  
OUT  
OUT  
10  
11  
12  
13  
14  
19 R1  
18 R2  
17 R3  
16 R4  
15 R5  
T2  
T3  
T3  
T2  
T1  
IN  
IN  
IN  
Pin Descriptions  
PIN  
FUNCTION  
V
System power supply input (3.0V to 5.5V).  
CC  
V+  
Internally generated positive transmitter supply (+5.5V).  
Internally generated negative transmitter supply (-5.5V).  
Ground connection.  
V-  
GND  
C1+  
C1-  
External capacitor (voltage doubler) is connected to this lead.  
External capacitor (voltage doubler) is connected to this lead.  
External capacitor (voltage inverter) is connected to this lead.  
External capacitor (voltage inverter) is connected to this lead.  
TTL/CMOS compatible transmitter Inputs.  
C2+  
C2-  
T
IN  
T
±15kV ESD Protected, RS-232 level (nominally ±5.5V) transmitter outputs.  
±15kV ESD Protected, RS-232 compatible receiver inputs.  
OUT  
R
IN  
R
TTL/CMOS level receiver outputs.  
OUT  
R
TTL/CMOS level, noninverting, always enabled receiver outputs.  
Active low output that indicates if no valid RS-232 levels are present on any receiver input.  
Active high output that indicates when the ICL32XXE is ready to transmit (i.e., V- -4V).  
OUTB  
INVALID  
READY  
FORCEOFF Active low to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and FORCEON (see Table 2).  
FORCEON Active high input to override automatic powerdown circuitry thereby keeping transmitters active. (FORCEOFF must be high).  
FN4900.9  
3
February 27, 2006  
ICL3225E, ICL3227E, ICL3245E  
Typical Operating Circuits  
ICL3225E  
+3.3V  
+
0.1µF  
19  
2
+
4
C
0.1µF  
C1+  
1
V
3
CC  
C
0.1µF  
3
+
V+  
V-  
C1-  
5
C
0.1µF  
2
C2+  
+
7
C
4
0.1µF  
6
C2-  
+
T
T
1
2
13  
17  
8
T1  
T2  
T1  
T2  
IN  
OUT  
OUT  
12  
15  
IN  
TTL/CMOS  
RS-232  
16  
LOGIC LEVELS  
LEVELS  
R1  
R2  
R1  
R2  
OUT  
IN  
IN  
5kΩ  
5kΩ  
R
1
10  
9
OUT  
R
2
1
20  
11  
READY  
V
FORCEOFF  
INVALID  
CC  
14  
TO POWER  
CONTROL LOGIC  
FORCEON  
GND  
18  
ICL3227E  
+3.3V  
+
15  
0.1µF  
2
+
C
1
3
C1+  
V
CC  
C
3
+
V+  
V-  
0.1µF  
4
0.1µF  
C1-  
5
C
2
C2+  
+
7
0.1µF  
C
4
6
C2-  
0.1µF  
+
T
1
11  
9
13  
T1  
T1  
OUT  
IN  
TTL/CMOS  
RS-232  
LEVELS  
LOGIC LEVELS  
8
R1  
R1  
IN  
OUT  
5kΩ  
R
1
1
READY  
16  
10  
V
CC  
FORCEOFF  
INVALID  
12  
TO POWER  
FORCEON  
CONTROL LOGIC  
GND  
14  
FN4900.9  
4
February 27, 2006  
ICL3225E, ICL3227E, ICL3245E  
Typical Operating Circuits (Continued)  
ICL3245E  
+3.3V  
+
26  
0.1µF  
28  
27  
C
C1+  
V
CC  
1
C
0.1µF  
3
+
+
+
V+  
V-  
0.1µF  
24  
1
C1-  
C
2
C2+  
3
9
C
4
0.1µF  
2
0.1µF  
C2-  
+
T
T
T
1
2
3
14  
T1  
T1  
IN  
OUT  
13  
12  
20  
10  
11  
RS-232  
LEVELS  
T2  
T3  
T2  
T3  
IN  
IN  
OUT  
OUT  
R2  
OUTB  
TTL/CMOS  
LOGIC LEVELS  
19  
18  
4
5
R1  
R1  
R2  
OUT  
OUT  
IN  
R
1
2
5kΩ  
5kΩ  
R2  
IN  
R
17  
16  
6
7
RS-232  
LEVELS  
R3  
R4  
R3  
R4  
OUT  
OUT  
IN  
R
R
5kΩ  
3
4
IN  
5kΩ  
5kΩ  
15  
23  
8
R5  
R5  
OUT  
IN  
R
5
FORCEON  
22  
21  
V
CC  
FORCEOFF  
TO POWER  
CONTROL LOGIC  
GND  
25  
INVALID  
FN4900.9  
5
February 27, 2006  
ICL3225E, ICL3227E, ICL3245E  
Absolute Maximum Ratings  
Thermal Information  
Thermal Resistance (Typical, Note 2)  
20 Ld PDIP Package* . . . . . . . . . . . . . . . . . . . . . . .  
28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .  
16 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .  
20 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .  
28 Ld SSOP and TSSOP Packages . . . . . . . . . . . .  
Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C  
Maximum Storage Temperature Range. . . . . . . . . . .-65°C to 150°C  
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C  
(SOIC, SSOP, TSSOP - Lead Tips Only)  
*Pb-free PDIPs can be used for through hole wave solder  
processing only. They are not intended for use in Reflow solder  
processing applications.  
V
to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V  
θ
JA  
(°C/W)  
80  
75  
145  
135  
100  
CC  
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V  
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V  
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V  
Input Voltages  
T
R
, FORCEOFF, FORCEON. . . . . . . . . . . . . . . . . . . -0.3V to 6V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V  
IN  
IN  
Output Voltages  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V  
T
R
OUT  
, INVALID, READY . . . . . . . . . . . . . . . . -0.3V to V +0.3V  
OUT CC  
Short Circuit Duration  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous  
T
OUT  
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table  
Operating Conditions  
Temperature Range  
ICL32XXEC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C  
ICL32XXEI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C  
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the  
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
NOTE:  
2. θ is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.  
JA  
Electrical Specifications Test Conditions: V = 3V to 5.5V, C - C = 0.1µF; Unless Otherwise Specified.  
CC  
1
4
Typicals are at T = 25°C  
A
TEMP  
(°C)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
DC CHARACTERISTICS  
Supply Current, Automatic  
Powerdown  
All R Open, FORCEON = GND, FORCEOFF = V  
IN  
25  
-
1.0  
10  
µA  
CC  
Supply Current, Powerdown  
FORCEOFF = GND  
25  
25  
-
-
1.0  
0.3  
10  
µA  
Supply Current,  
Automatic Powerdown Disabled  
All Outputs Unloaded, FORCEON = FORCEOFF = V  
1.0  
mA  
CC  
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS  
Input Logic Threshold Low  
Input Logic Threshold High  
T
T
, FORCEON, FORCEOFF  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
-
2.0  
2.4  
-
-
0.8  
-
V
V
IN  
IN  
, FORCEON,  
FORCEOFF  
V
V
= 3.3V  
= 5.0V  
-
CC  
CC  
-
-
V
Input Leakage Current  
Output Leakage Current  
Output Voltage Low  
Output Voltage High  
RECEIVER INPUTS  
Input Voltage Range  
Input Threshold Low  
T
, FORCEON, FORCEOFF  
±0.01  
±0.05  
-
±1.0  
±10  
0.4  
-
µA  
µA  
V
IN  
FORCEOFF = GND, ICL3245E Only  
-
I
I
= 1.6mA  
= -1.0mA  
-
OUT  
OUT  
V
-0.6 V  
-0.1  
CC  
V
CC  
Full  
25  
25  
25  
25  
25  
25  
-25  
0.6  
0.8  
-
-
25  
-
V
V
V
V
V
V
= 3.3V  
= 5.0V  
= 3.3V  
= 5.0V  
1.2  
1.5  
1.5  
1.8  
0.5  
5
CC  
CC  
CC  
CC  
-
V
Input Threshold High  
2.4  
2.4  
-
V
-
V
Input Hysteresis  
-
V
Input Resistance  
3
7
kΩ  
TRANSMITTER OUTPUTS  
Output Voltage Swing  
All Transmitter Outputs Loaded with 3kto Ground  
Full  
±5.0  
±5.4  
-
V
FN4900.9  
6
February 27, 2006  
ICL3225E, ICL3227E, ICL3245E  
Electrical Specifications Test Conditions: V = 3V to 5.5V, C - C = 0.1µF; Unless Otherwise Specified.  
CC  
1
4
Typicals are at T = 25°C (Continued)  
A
TEMP  
(°C)  
PARAMETER  
Output Resistance  
TEST CONDITIONS  
MIN  
TYP  
10M  
±35  
-
MAX  
-
UNITS  
V
V
= V+ = V- = 0V, Transmitter Output = ±2V  
Full  
Full  
Full  
300  
CC  
Output Short-Circuit Current  
Output Leakage Current  
-
-
±60  
±25  
mA  
µA  
= ±12V, V  
= 0V or 3V to 5.5V,  
CC  
OUT  
Automatic Powerdown or FORCEOFF = GND  
MOUSE DRIVEABILITY  
Transmitter Output Voltage  
(See Figure 11)  
T1 = T2 = GND, T3 = V , T3  
Loaded with 3kΩ  
Full  
±5  
-
-
V
IN  
IN  
OUT  
IN  
CC  
OUT  
to GND, T1  
and T2  
Loaded with 2.5mA Each  
OUT  
ENHANCED AUTOMATIC POWERDOWN (FORCEON = GND, FORCEOFF = V  
)
CC  
Receiver Input Thresholds to  
INVALID High  
See Figure 6  
Full  
Full  
Full  
Full  
25  
-2.7  
-0.3  
-
-
-
2.7  
0.3  
0.4  
-
V
V
Receiver Input Thresholds to  
INVALID Low  
See Figure 6  
INVALID, READY Output Voltage  
Low  
I
I
= 1.6mA  
= -1.0mA  
-
V
OUT  
OUT  
INVALID, READY Output Voltage  
High  
V
-0.6  
-
V
CC  
Receiver Positive or Negative  
-
1
-
µs  
Threshold to INVALID High Delay  
(t  
)
INVH  
Receiver Positive or Negative  
25  
-
-
30  
-
µs  
Threshold to INVALID Low Delay  
(t  
)
INVL  
Receiver or Transmitter Edge to  
Transmitters Enabled Delay (t  
(Note 3)  
(Note 3)  
25  
100  
30  
-
µs  
)
WU  
Receiver or Transmitter Edge to  
Transmitters Disabled Delay  
Full  
15  
60  
sec  
(t  
)
AUTOPWDN  
TIMING CHARACTERISTICS  
Maximum Data Rate  
R = 3kΩ, One Transmitter C = 1000pF  
Full  
Full  
Full  
250  
1000  
1000  
-
-
-
-
-
-
kbps  
kbps  
kbps  
L
L
Switching  
V
V
= 3V to 4.5V, C = 250pF  
L
CC  
= 4.5V to 5.5V,  
= 1000pF  
CC  
C
L
Receiver Propagation Delay  
Receiver Input to Receiver  
t
t
25  
25  
25  
25  
25  
25  
25  
-
-
0.15  
0.15  
200  
200  
25  
-
µs  
µs  
PHL  
PLH  
Output, C = 150pF  
L
-
Receiver Output Enable Time  
Receiver Output Disable Time  
Transmitter Skew  
Normal Operation (ICL3245E Only)  
Normal Operation (ICL3245E Only)  
-
-
ns  
-
-
ns  
t
t
- t  
PHL PLH  
(Note 4)  
(Note 4)  
-
-
-
ns  
Receiver Skew  
- t  
PHL PLH  
-
50  
ns  
Transition Region Slew Rate  
V
= 3.3V, R = 3kto 7kΩ, Measured From 3V to -3V or  
24  
-
150  
V/µs  
CC  
L
-3V to 3V, C = 150pF to 1000pF  
L
ESD PERFORMANCE  
RS-232 Pins (T  
, R  
)
Human Body Model  
25  
25  
25  
25  
-
-
-
-
±15  
±8  
-
-
-
-
kV  
kV  
kV  
kV  
OUT IN  
IEC61000-4-2 Contact Discharge  
IEC61000-4-2 Air Gap Discharge  
Human Body Model  
±15  
±3  
All Other Pins  
NOTES:  
3. An “edge” is defined as a transition through the transmitter or receiver input thresholds.  
4. Skews are measured at the receiver input switching points (1.4V).  
FN4900.9  
7
February 27, 2006  
ICL3225E, ICL3227E, ICL3245E  
receivers’ Schmitt trigger input stage uses hysteresis to  
increase noise immunity and decrease errors due to slow  
input signal transitions.  
Detailed Description  
These ICL32XXE interface ICs operate from a single +3V to  
+5.5V supply, guarantee a 1Mbps minimum data rate,  
require only four small external 0.1µF capacitors, feature low  
power consumption, and meet all ElA RS-232C and V.28  
specifications. The circuit is divided into three sections: The  
charge pump, the transmitters, and the receivers.  
The ICL3245E inverting receivers disable during forced  
(manual) powerdown, but not during automatic powerdown  
(see Table 2). Conversely, the monitor receiver remains  
active even during manual powerdown making it extremely  
useful for Ring Indicator monitoring. Standard receivers  
driving powered down peripherals must be disabled to  
prevent current flow through the peripheral’s protection  
diodes (see Figures 2 and 3). This renders them useless for  
wake up functions, but the corresponding monitor receiver  
can be dedicated to this task as shown in Figure 3.  
Charge-Pump  
Intersil’s new ICL32XXE family utilizes regulated on-chip  
dual charge pumps as voltage doublers, and voltage  
inverters to generate ±5.5V transmitter supplies from a V  
CC  
supply as low as 3.0V. This allows these devices to maintain  
RS-232 compliant output levels over the ±10% tolerance  
range of 3.3V powered systems. The efficient on-chip power  
supplies require only four small, external 0.1µF capacitors  
V
CC  
R
R
XIN  
XOUT  
for the voltage doubler and inverter functions at V  
= 3.3V.  
CC  
GND V  
V  
-25V V  
+25V  
5kΩ  
ROUT  
CC  
RIN  
See the “Capacitor Selection” section, and Table 3 for  
capacitor recommendations for other operating conditions.  
The charge pumps operate discontinuously (i.e., they turn off  
as soon as the V+ and V- supplies are pumped up to the  
nominal values), resulting in significant power savings.  
GND  
FIGURE 1. INVERTING RECEIVER CONNECTIONS  
V
CC  
V
CC  
Transmitters  
CURRENT  
FLOW  
The transmitters are proprietary, low dropout, inverting  
drivers that translate TTL/CMOS inputs to EIA/TIA-232  
output levels. Coupled with the on-chip ±5.5V supplies,  
these transmitters deliver true RS-232 levels over a wide  
range of single supply system voltages.  
V
CC  
V
= V  
CC  
OUT  
Rx  
POWERED  
DOWN  
Transmitter outputs disable and assume a high impedance  
state when the device enters the powerdown mode (see  
Table 2). These outputs may be driven to ±12V when  
disabled.  
UART  
Tx  
OLD  
RS-232 CHIP  
SHDN = GND  
GND  
All devices guarantee a 1Mbps data rate for full load  
conditions (3kand 250pF), V  
3.0V, with one  
CC  
transmitter operating at full speed. Under more typical  
conditions of V 3.3V, R = 3k, and C = 250pF, one  
FIGURE 2. POWER DRAIN THROUGH POWERED DOWN  
PERIPHERAL  
CC  
L
L
transmitter easily operates at 1.4Mbps. Transmitter skew is  
extremely low on these devices, and is specified at the  
receiver input trip points (1.4V), rather than the arbitrary 0V  
crossing point typical of other RS-232 families.  
V
CC  
TRANSITION  
DETECTOR  
TO  
WAKE-UP  
LOGIC  
ICL3245E  
Transmitter inputs float if left unconnected, and may cause  
I
increases. Connect unused inputs to GND for the best  
CC  
performance.  
V
CC  
R2  
OUTB  
Receivers  
R
T
V
= HI-Z  
All the ICL32XXE devices contain standard inverting  
receivers, but only the ICL3245E receivers can tristate, via  
the FORCEOFF control line. Additionally, the ICL3245E  
includes a noninverting (monitor) receiver (denoted by the  
X
OUT  
R2  
OUT  
POWERED  
DOWN  
UART  
R2  
IN  
T1  
IN  
X
R
label) that is always active, regardless of the state of  
OUTB  
T1  
OUT  
any control lines. Both receiver types convert RS-232  
signals to CMOS output levels and accept inputs up to ±25V  
while presenting the required 3kto 7kinput impedance  
FORCEOFF = GND  
FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN  
(see Figure 1) even if the power is off (V  
= 0V). The  
CC  
FN4900.9  
8
February 27, 2006  
ICL3225E, ICL3227E, ICL3245E  
TABLE 2. POWERDOWN LOGIC TRUTH TABLE  
RS-232  
LEVEL  
RCVR OR  
XMTR  
PRESENT  
EDGE  
(NOTE 5)  
AT  
WITHIN 30 FORCEOFF FORCEON TRANSMITTER RECEIVER  
R
RECEIVER INVALID  
OUTB  
SEC?  
INPUT  
INPUT  
OUTPUTS  
OUTPUTS OUTPUTS  
INPUT?  
OUTPUT  
MODE OF OPERATION  
ICL3225E, ICL3227E  
NO  
NO  
YES  
YES  
NO  
NO  
X
H
H
H
H
H
H
L
H
H
L
L
L
L
X
X
Active  
Active  
Active  
Active  
High-Z  
High-Z  
High-Z  
High-Z  
Active  
Active  
Active  
Active  
Active  
Active  
Active  
Active  
N.A.  
N.A.  
N.A.  
N.A.  
N.A.  
N.A.  
N.A.  
N.A.  
No  
Yes  
No  
Yes  
No  
Yes  
No  
Yes  
L
H
L
H
L
H
L
H
Normal Operation (Enhanced  
Auto Powerdown Disabled)  
Normal Operation (Enhanced  
Auto Powerdown Enabled)  
Powerdown Due to Enhanced  
Auto Powerdown Logic  
Manual Powerdown  
X
L
ICL322XE - INVALID DRIVING FORCEON AND FORCEOFF (EMULATES AUTOMATIC POWERDOWN)  
X
X
NOTE 6  
NOTE 6  
NOTE 6  
NOTE 6  
Active  
High-Z  
Active  
Active  
N.A.  
N.A.  
Yes  
No  
H
L
Normal Operation  
Forced Auto Powerdown  
ICL3245E  
NO  
H
H
H
H
H
H
L
H
H
L
L
L
L
X
X
Active  
Active  
Active  
Active  
High-Z  
High-Z  
High-Z  
High-Z  
Active  
Active  
Active  
Active  
Active  
Active  
High-Z  
High-Z  
Active  
Active  
Active  
Active  
Active  
Active  
Active  
Active  
No  
Yes  
No  
Yes  
No  
Yes  
No  
Yes  
L
H
L
H
L
H
L
H
Normal Operation (Enhanced  
Auto Powerdown Disabled)  
NO  
YES  
YES  
NO  
NO  
X
Normal Operation (Enhanced  
Auto Powerdown Enabled)  
Powerdown Due to Enhanced  
Auto Powerdown Logic  
Manual Powerdown  
X
L
ICL3245E - INVALID DRIVING FORCEON AND FORCEOFF (EMULATES AUTOMATIC POWERDOWN)  
X
X
NOTE 6  
NOTE 6  
NOTE 6  
NOTE 6  
Active  
High-Z  
Active  
High-Z  
Active  
Active  
Yes  
No  
H
L
Normal Operation  
Forced Auto Powerdown  
NOTES:  
5. Applies only to the ICL3245E.  
6. Input is connected to INVALID Output.  
IC’s mode. For always enabled operation, FORCEON and  
FORCEOFF are both strapped high. To switch between  
active and powerdown modes, under logic or software  
control, only the FORCEOFF input need be driven. The  
FORCEON state isn’t critical, as FORCEOFF dominates  
over FORCEON. Nevertheless, if strictly manual control over  
powerdown is desired, the user must strap FORCEON high  
to disable the enhanced automatic powerdown circuitry.  
ICL3245E inverting (standard) receiver outputs also disable  
when the device is in powerdown, thereby eliminating the  
possible current path through a shutdown peripheral’s input  
protection diode (see Figures 2 and 3).  
Powerdown Functionality  
This 3V family of RS-232 interface devices requires a  
nominal supply current of 0.3mA during normal operation  
(not in powerdown mode). This is considerably less than the  
5mA to 11mA current required of 5V RS-232 devices. The  
already low current requirement drops significantly when the  
device enters powerdown mode. In powerdown, supply  
current drops to 1µA, because the on-chip charge pump  
turns off (V+ collapses to V , V- collapses to GND), and  
CC  
the transmitter outputs tristate. Inverting receiver outputs  
may or may not disable in powerdown; refer to Table 2 for  
details. This micro-power mode makes these devices ideal  
for battery powered and portable applications.  
Connecting FORCEOFF and FORCEON together disables  
the enhanced automatic powerdown feature, enabling them  
to function as a manual SHUTDOWN input (see Figure 4).  
Software Controlled (Manual) Powerdown  
These three devices allow the user to force the IC into the  
low power, standby state, and utilize a two pin approach  
where the FORCEON and FORCEOFF inputs determine the  
With any of the above control schemes, the time required to  
exit powerdown, and resume transmission is only 100µs.  
FN4900.9  
9
February 27, 2006  
ICL3225E, ICL3227E, ICL3245E  
by the internal receiver pull down resistors), the INVALID  
FORCEOFF  
FORCEON  
logic detects the invalid levels and drives the output low. The  
power management logic then uses this indicator to power  
down the interface block. Reconnecting the cable restores  
valid levels at the receiver inputs, INVALID switches high,  
and the power management logic wakes up the interface  
block. INVALID can also be used to indicate the DTR or  
RING INDICATOR signal, as long as the other receiver  
inputs are floating, or driven to GND (as in the case of a  
powered down driver).  
PWR  
MGT  
LOGIC  
INVALID  
ICL32XXE  
I/O  
UART  
CPU  
VALID RS-232 LEVEL - INVALID = 1  
2.7V  
INDETERMINATE  
0.3V  
INVALID LEVEL - INVALID = 0  
-0.3V  
FIGURE 4. CONNECTIONS FOR MANUAL POWERDOWN  
WHEN NO VALID RECEIVER SIGNALS ARE  
PRESENT  
INDETERMINATE  
When using both manual and enhanced automatic  
powerdown (FORCEON = 0), the ICL32XXE won’t power up  
from manual powerdown until both FORCEOFF and  
FORCEON are driven high, or until a transition occurs on a  
receiver or transmitter input. Figure 5 illustrates a circuit for  
ensuring that the ICL32XXE powers up as soon as  
FORCEOFF switches high. The rising edge of the Master  
Powerdown signal forces the device to power up, and the  
ICL32XXE returns to enhanced automatic powerdown mode  
an RC time constant after this rising edge. The time constant  
isn’t critical, because the ICL32XXE remains powered up for  
30 seconds after the FORCEON falling edge, even if there  
are no signal transitions. This gives slow-to-wake systems  
(e.g., a mouse) plenty of time to start transmitting, and as  
long as it starts transmitting within 30 seconds both systems  
remain enabled.  
-2.7V  
VALID RS-232 LEVEL - INVALID = 1  
FIGURE 6. DEFINITION OF VALID RS-232 RECEIVER LEVELS  
Enhanced Automatic Powerdown  
Even greater power savings is available by using these devices  
which feature an enhanced automatic powerdown function.  
When the enhanced powerdown logic determines that no  
transitions have occurred on any of the transmitter nor receiver  
inputs for 30 seconds, the charge pump and transmitters  
powerdown, thereby reducing supply current to 1µA. The  
ICL32XXE automatically powers back up whenever it detects a  
transition on one of these inputs. This automatic powerdown  
feature provides additional system power savings without  
changes to the existing operating system.  
Enhanced automatic powerdown operates when the  
FORCEON input is low, and the FORCEOFF input is high.  
Tying FORCEON high disables automatic powerdown, but  
manual powerdown is always available via the overriding  
FORCEOFF input. Table 2 summarizes the enhanced  
automatic powerdown functionality.  
MASTER POWERDOWN LINE  
POWER  
MANAGEMENT  
0.1µF  
UNIT  
1MΩ  
FORCEOFF  
FORCEON  
ICL32XXE  
FORCEOFF  
EDGE  
T_IN  
R_IN  
FIGURE 5. CIRCUIT TO ENSURE IMMEDIATE POWER UP  
WHEN EXITING FORCED POWERDOWN  
DETECT  
S
30s  
TIMER  
INVALID Output  
AUTOSHDN  
EDGE  
The INVALID output always indicates (see Table 2) whether  
or not 30µs have elapsed with invalid RS-232 signals (see  
Figures 6 and 8) persisting on all of the receiver inputs,  
giving the user an easy way to determine when the interface  
block should power down. Invalid receiver levels occur  
whenever the driving peripheral’s outputs are shut off  
(powered down) or when the RS-232 interface cable is  
disconnected. In the case of a disconnected interface cable  
where all the receiver inputs are floating (but pulled to GND  
DETECT  
R
FORCEON  
FIGURE 7. ENHANCED AUTOMATIC POWERDOWN LOGIC  
Figure 7 illustrates the enhanced powerdown control logic.  
Note that once the ICL32XXE enters powerdown (manually  
or automatically), the 30 second timer remains timed out  
FN4900.9  
10  
February 27, 2006  
ICL3225E, ICL3227E, ICL3245E  
(set), keeping the ICL32XXE powered down until FORCEON  
transitions high, or until a transition occurs on a receiver or  
transmitter input.  
FORCEON  
ICL32XXE  
INVALID  
FORCEOFF  
The INVALID output signal switches low to indicate that  
invalid levels have persisted on all of the receiver inputs for  
more than 30µs (see Figure 8), but this has no direct effect  
on the state of the ICL32XXE (see the next sections for  
methods of utilizing INVALID to power down the device).  
INVALID switches high 1µs after detecting a valid RS-232  
level on a receiver input. INVALID operates in all modes  
(forced or automatic powerdown, or forced on), so it is also  
useful for systems employing manual powerdown circuitry.  
I/O  
UART  
CPU  
FIGURE 8. CONNECTIONS FOR AUTOMATIC POWERDOWN  
WHEN NO VALID RECEIVER SIGNALS ARE  
PRESENT  
The time to recover from automatic powerdown mode is  
typically 100µs.  
Emulating Standard Automatic Powerdown  
Hybrid Automatic Powerdown Options  
If enhanced automatic powerdown isn’t desired, the user can  
implement the standard automatic powerdown feature (mimics  
the function on the ICL3221E/ICL3223E/ICL3243E) by  
connecting the INVALID output to the FORCEON and  
FORCEOFF inputs, as shown in Figure 9. After 30µs of invalid  
receiver levels, INVALID switches low and drives the  
For devices which communicate only through a detachable  
cable, connecting INVALID to FORCEOFF (with FORCEON  
= 0) may be a desirable configuration. While the cable is  
attached INVALID and FORCEOFF remain high, so the  
enhanced automatic powerdown logic powers down the RS-  
232 device whenever there is 30 seconds of inactivity on the  
receiver and transmitter inputs. Detaching the cable allows  
the receiver inputs to drop to an invalid level (GND), so  
INVALID switches low and forces the RS-232 device to  
power down. The ICL32XXE remains powered down until  
the cable is reconnected (INVALID = FORCEOFF = 1) and a  
transition occurs on a receiver or transmitter input (see  
Figure 7). For immediate power up when the cable is  
reattached, connect FORCEON to FORCEOFF through a  
network similar to that shown in Figure 5.  
ICL32XXE into a forced powerdown condition. INVALID  
switches high as soon as a receiver input senses a valid RS-  
232 level, forcing the ICL32XXE to power on. See the “INVALID  
DRIVING FORCEON AND FORCEOFF” section of Table 2 for  
an operational summary. This operational mode is perfect for  
handheld devices that communicate with another computer via  
a detachable cable. Detaching the cable allows the internal  
receiver pull-down resistors to pull the inputs to GND (an invalid  
RS-232 level), causing the 30µs timer to time-out and drive the  
IC into powerdown. Reconnecting the cablerestores valid  
levels, causing the IC to power back up.  
RECEIVER  
INPUTS  
INVALID  
REGION  
}
TRANSMITTER  
INPUTS  
TRANSMITTER  
OUTPUTS  
t
INVH  
INVALID  
OUTPUT  
t
INVL  
t
AUTOPWDN  
t
WU  
t
WU  
t
AUTOPWDN  
READY  
OUTPUT  
V+  
V
CC  
0
V-  
FIGURE 9. ENHANCED AUTOMATIC POWERDOWN, INVALID AND READY TIMING DIAGRAMS  
FN4900.9  
11  
February 27, 2006  
ICL3225E, ICL3227E, ICL3245E  
Ready Output (ICL3225E and ICL3227E Only)  
Mouse Driveability  
The Ready output indicates that the ICL322XE is ready to  
transmit. Ready switches low whenever the device enters  
powerdown, and switches back high during power-up when  
V- reaches -4V or lower.  
The ICL3245E is specifically designed to power a serial mouse  
while operating from low voltage supplies. Figure 11 shows the  
transmitter output voltages under increasing load current. The  
on-chip switching regulator ensures the transmitters will supply  
at least ±5V during worst case conditions (15mA for paralleled  
V+ transmitters, 7.3mA for single V- transmitter).  
Capacitor Selection  
The charge pumps require 0.1µF capacitors for 3.3V  
operation. For other supply voltages refer to Table 3 for  
capacitor values. Do not use values smaller than those listed  
in Table 3. Increasing the capacitor values (by a factor of 2)  
reduces ripple on the transmitter outputs and slightly  
5V/DIV  
FORCEOFF  
T1  
reduces power consumption. C , C , and C can be  
2
3
4
V
= +3.3V  
C1 - C4 = 0.1µF  
CC  
increased without increasing C ’s value, however, do not  
1
2V/DIV  
increase C without also increasing C , C , and C to  
1
2
3
4
maintain the proper ratios (C to the other capacitors).  
1
When using minimum required capacitor values, make sure  
that capacitor values do not degrade excessively with  
temperature. If in doubt, use capacitors with a larger nominal  
value. The capacitor’s equivalent series resistance (ESR)  
usually rises at low temperatures and it influences the  
amount of ripple on V+ and V-.  
T2  
5V/DIV  
READY  
TIME (20µs/DIV.)  
FIGURE 10. TRANSMITTER OUTPUTS WHEN EXITING  
POWERDOWN  
TABLE 3. REQUIRED CAPACITOR VALUES  
V
(V)  
C (µF)  
C , C , C (µF)  
2 3 4  
CC  
1
3.0 to 3.6  
4.5 to 5.5  
3.0 to 5.5  
0.1  
0.047  
0.1  
0.1  
0.33  
0.47  
6
5
V
+
4
3
OUT  
V
= 3.0V  
CC  
Power Supply Decoupling  
2
In most circumstances a 0.1µF bypass capacitor is  
T1  
1
adequate. In applications that are particularly sensitive to  
V
+
OUT  
0
power supply noise, decouple V  
to ground with a  
CC  
T2  
T3  
-1  
-2  
-3  
-4  
-5  
-6  
capacitor of the same value as the charge-pump capacitor C .  
1
ICL3245E  
Connect the bypass capacitor as close as possible to the IC.  
V
V
-
CC  
OUT  
V
-
OUT  
Operation Down to 2.7V  
ICL32XXE transmitter outputs meet RS-562 levels (±3.7V),  
at full data rate, with V  
as low as 2.7V. RS-562 levels  
0
1
2
3
4
5
6
7
8
9
10  
CC  
typically ensure inter operability with RS-232 devices.  
LOAD CURRENT PER TRANSMITTER (mA)  
FIGURE 11. TRANSMITTER OUTPUT VOLTAGE vs LOAD  
CURRENT (PER TRANSMITTER, i.e., DOUBLE  
CURRENT AXIS FOR TOTAL V + CURRENT)  
Transmitter Outputs when Exiting  
Powerdown  
OUT  
Figure 10 shows the response of two transmitter outputs  
when exiting powerdown mode. As they activate, the two  
transmitter outputs properly go to opposite RS-232 levels,  
with no glitching, ringing, nor undesirable transients. Each  
transmitter is loaded with 3kin parallel with 2500pF. Note  
that the transmitters enable only when the magnitude of the  
supplies exceed approximately 3V.  
High Data Rates  
The ICL32XXE maintain the RS-232 ±5V minimum  
transmitter output voltages even at high data rates. Figure  
12 details a transmitter loopback test circuit, and Figure 13  
illustrates the loopback test result at 250kbps. For this test,  
all transmitters were simultaneously driving RS-232 loads in  
parallel with 1000pF, at 250kbps. Figure 14 shows the  
loopback results for a single transmitter driving 250pF and  
FN4900.9  
12  
February 27, 2006  
ICL3225E, ICL3227E, ICL3245E  
an RS-232 load at 1Mbps. The static transmitters were also  
loaded with an RS-232 receiver.  
5V/DIV.  
T1  
V
CC  
+
IN  
0.1µF  
V
CC  
V+  
V-  
+
C1+  
+
C
1
2
T1  
C
OUT  
OUT  
3
4
C1-  
C2+  
C2-  
ICL32XXE  
+
C
+
C
R1  
T
T
OUT  
IN  
V
= +3.3V  
CC  
C1 - C4 = 0.1µF  
C
L
R
IN  
R
OUT  
0.5µs/DIV.  
FIGURE 14. LOOPBACK TEST AT 1Mbps (C = 250pF)  
FORCEON  
5k  
L
V
CC  
FORCEOFF  
Interconnection with 3V and 5V Logic  
FIGURE 12. TRANSMITTER LOOPBACK TEST CIRCUIT  
The ICL32XXE directly interfaces with 5V CMOS and TTL  
logic families. Nevertheless, with the ICL32XX at 3.3V, and  
the logic supply at 5V, AC, HC, and CD4000 outputs can  
drive ICL32XX inputs, but ICL32XX outputs do not reach the  
5V/DIV.  
T1  
minimum V for these logic families. See Table 4 for more  
IH  
information.  
IN  
TABLE 4. LOGIC FAMILY COMPATIBILITY WITH VARIOUS  
SUPPLY VOLTAGES  
SYSTEM  
V
CC  
T1  
OUT  
OUT  
POWER-SUPPLY SUPPLY  
VOLTAGE  
(V)  
VOLTAGE  
(V)  
COMPATIBILITY  
3.3  
3.3  
Compatible with all CMOS  
families.  
R1  
V
= +3.3V  
CC  
C1 - C4 = 0.1µF  
5
5
Compatible with all TTL and  
CMOS logic families.  
2µs/DIV.  
5
3.3  
Compatible with ACT and HCT  
CMOS, and with TTL. ICL32XX  
outputs are incompatible with AC,  
HC, and CD4000 CMOS inputs.  
FIGURE 13. LOOPBACK TEST AT 250kbps (C = 1000pF)  
L
±15kV ESD Protection  
All pins on ICL32XX devices include ESD protection  
structures, but the ICL32XXE family incorporates advanced  
structures which allow the RS-232 pins (transmitter outputs  
and receiver inputs) to survive ESD events up to ±15kV. The  
RS-232 pins are particularly vulnerable to ESD damage  
because they typically connect to an exposed port on the  
exterior of the finished product. Simply touching the port  
pins, or connecting a cable, can cause an ESD event that  
might destroy unprotected ICs. These new ESD structures  
protect the device whether or not it is powered up, protect  
without allowing any latchup mechanism to activate, and  
don’t interfere with RS-232 signals as large as ±25V.  
FN4900.9  
13  
February 27, 2006  
ICL3225E, ICL3227E, ICL3245E  
the HBM test. The extra ESD protection built into this  
Human Body Model (HBM) Testing  
device’s RS-232 pins allows the design of equipment  
meeting level 4 criteria without the need for additional board  
level protection on the RS-232 port.  
As the name implies, this test method emulates the ESD  
event delivered to an IC during human handling. The tester  
delivers the charge through a 1.5kcurrent limiting resistor,  
making the test less severe than the IEC61000 test which  
utilizes a 330limiting resistor. The HBM method  
AIR-GAP DISCHARGE TEST METHOD  
For this test method, a charged probe tip moves toward the  
IC pin until the voltage arcs to it. The current waveform  
delivered to the IC pin depends on approach speed,  
humidity, temperature, etc., so it is difficult to obtain  
repeatable results. The “E” device RS-232 pins withstand  
±15kV air-gap discharges.  
determines an ICs ability to withstand the ESD transients  
typically present during handling and manufacturing. Due to  
the random nature of these events, each pin is tested with  
respect to all other pins. The RS-232 pins on “E” family  
devices can withstand HBM ESD events to ±15kV.  
IEC61000-4-2 Testing  
CONTACT DISCHARGE TEST METHOD  
The IEC61000 test method applies to finished equipment,  
rather than to an individual IC. Therefore, the pins most likely  
to suffer an ESD event are those that are exposed to the  
outside world (the RS-232 pins in this case), and the IC is  
tested in its typical application configuration (power applied)  
rather than testing each pin-to-pin combination. The lower  
current limiting resistor coupled with the larger charge  
storage capacitor yields a test that is much more severe than  
During the contact discharge test, the probe contacts the  
tested pin before the probe tip is energized, thereby  
eliminating the variables associated with the air-gap  
discharge. The result is a more repeatable and predictable  
test, but equipment limits prevent testing devices at voltages  
higher than ±8kV. All “E” family devices survive ±8kV contact  
discharges on the RS-232 pins.  
Typical Performance Curves V = 3.3V, T = 25°C  
CC  
A
6
110  
V
+
OUT  
4
2
90  
+SLEW  
70  
1 TRANSMITTER AT 1Mbps  
OTHER TRANSMITTERS AT 30kbps  
0
50  
-2  
-4  
-SLEW  
30  
V
-
OUT  
10  
0
-6  
0
1000  
2000  
3000  
4000  
5000  
0
1000  
2000  
3000  
4000  
5000  
LOAD CAPACITANCE (pF)  
LOAD CAPACITANCE (pF)  
FIGURE 15. TRANSMITTER OUTPUT VOLTAGE vs LOAD  
CAPACITANCE  
FIGURE 16. SLEW RATE vs LOAD CAPACITANCE  
FN4900.9  
14  
February 27, 2006  
ICL3225E, ICL3227E, ICL3245E  
Typical Performance Curves V = 3.3V, T = 25°C (Continued)  
CC  
A
90  
80  
70  
60  
50  
90  
80  
70  
60  
50  
ICL3225E  
ICL3227E  
1Mbps  
1Mbps  
250kbps  
40  
30  
40  
30  
250kbps  
120kbps  
120kbps  
20  
10  
20  
10  
4000  
5000  
2000  
3000  
1000  
0
0
1000  
2000  
3000  
4000  
5000  
LOAD CAPACITANCE (pF)  
LOAD CAPACITANCE (pF)  
FIGURE 17. SUPPLY CURRENT vs LOAD CAPACITANCE  
WHEN TRANSMITTING DATA  
FIGURE 18. SUPPLY CURRENT vs LOAD CAPACITANCE  
WHEN TRANSMITTING DATA  
90  
3.5  
NO LOAD  
1Mbps  
ICL3245E  
ALL OUTPUTS STATIC  
3.0  
80  
70  
60  
50  
2.5  
2.0  
1.5  
1.0  
0.5  
0
250kbps  
40  
30  
120kbps  
20  
10  
0
1000  
2000  
3000  
4000  
5000  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
LOAD CAPACITANCE (pF)  
SUPPLY VOLTAGE (V)  
FIGURE 19. SUPPLY CURRENT vs LOAD CAPACITANCE  
WHEN TRANSMITTING DATA  
FIGURE 20. SUPPLY CURRENT vs SUPPLY VOLTAGE  
Die Characteristics  
MSUBSTRATE POTENTIAL (POWERED UP)  
GND  
TRANSISTOR COUNT  
ICL3225E: 937  
ICL3227E: 825  
ICL3245E: 1109  
PROCESS  
Si Gate CMOS  
FN4900.9  
15  
February 27, 2006  
ICL3225E, ICL3227E, ICL3245E  
Dual-In-Line Plastic Packages (PDIP)  
N
E20.3 (JEDEC MS-001-AD ISSUE D)  
E1  
20 LEAD DUAL-IN-LINE PLASTIC PACKAGE  
INDEX  
AREA  
1
2
3
N/2  
INCHES  
MILLIMETERS  
-B-  
SYMBOL  
MIN  
-
MAX  
0.210  
-
MIN  
-
MAX  
5.33  
-
NOTES  
-A-  
A
A1  
A2  
B
4
D
E
0.015  
0.115  
0.014  
0.045  
0.008  
0.980  
0.005  
0.300  
0.240  
0.39  
2.93  
0.356  
1.55  
0.204  
24.89  
0.13  
7.62  
6.10  
4
BASE  
PLANE  
A2  
A
0.195  
0.022  
0.070  
0.014  
1.060  
-
4.95  
0.558  
1.77  
0.355  
26.9  
-
-
-C-  
C
SEATING  
PLANE  
-
L
C
L
B1  
C
8
D1  
B1  
eA  
A1  
A
D1  
-
e
eC  
C
eB  
B
D
5
0.010 (0.25) M  
B S  
D1  
E
5
0.325  
8.25  
6
E1  
e
0.280  
7.11  
5
NOTES:  
1. Controlling Dimensions: INCH. In case of conflict between English  
0.100 BSC  
0.300 BSC  
2.54 BSC  
7.62 BSC  
-
and Metric dimensions, the inch dimensions control.  
e
e
6
A
B
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2  
-
0.430  
-
10.92  
7
L
0.115  
0.150  
2.93  
3.81  
4
9
of Publication No. 95.  
4. Dimensions A, A1 and L are measured with the package seated in  
N
20  
20  
JEDEC seating plane gauge GS-3.  
Rev. 0 12/93  
5. D, D1, and E1 dimensions do not include mold flash or protrusions.  
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).  
e
6. E and  
are measured with the leads constrained to be perpen-  
A
-C-  
dicular to datum  
.
7. e and e are measured at the lead tips with the leads uncon-  
B
C
strained. e must be zero or greater.  
C
8. B1 maximum dimensions do not include dambar protrusions. Dam-  
bar protrusions shall not exceed 0.010 inch (0.25mm).  
9. N is the maximum number of terminal positions.  
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,  
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).  
FN4900.9  
16  
February 27, 2006  
ICL3225E, ICL3227E, ICL3245E  
Small Outline Plastic Packages (SSOP)  
M16.209 (JEDEC MO-150-AC ISSUE B)  
N
16 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE  
INDEX  
AREA  
0.25(0.010)  
M
B M  
H
INCHES  
MILLIMETERS  
E
GAUGE  
PLANE  
SYMBOL  
MIN  
-
MAX  
0.078  
-
MIN  
-
MAX  
2.00  
-
NOTES  
-B-  
A
A1  
A2  
B
-
0.002  
0.065  
0.009  
0.004  
0.233  
0.197  
0.05  
1.65  
0.22  
0.09  
5.90  
5.00  
-
1
2
3
0.072  
0.014  
0.009  
0.255  
0.220  
1.85  
0.38  
0.25  
6.50  
5.60  
-
L
0.25  
SEATING PLANE  
A
9
0.010  
A2  
-A-  
C
D
E
-
D
3
-C-  
4
α
e
0.026 BSC  
0.65 BSC  
-
e
A1  
C
H
L
0.292  
0.022  
0.322  
0.037  
7.40  
0.55  
8.20  
0.95  
-
B
0.10(0.004)  
6
0.25(0.010) M  
C
A M B S  
N
α
16  
16  
7
0°  
8°  
0°  
8°  
-
NOTES:  
Rev. 3 6/05  
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of  
Publication Number 95.  
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
3. Dimension “D” does not include mold flash, protrusions or gate burrs.  
Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078  
inch) per side.  
4. Dimension “E” does not include interlead flash or protrusions. Interlead  
flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side.  
5. The chamfer on the body is optional. If it is not present, a visual index  
feature must be located within the crosshatched area.  
6. “L” is the length of terminal for soldering to a substrate.  
7. “N” is the number of terminal positions.  
8. Terminal numbers are shown for reference only.  
9. Dimension “B” does not include dambar protrusion. Allowable dambar  
protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimen-  
sion at maximum material condition.  
10. Controlling dimension: MILLIMETER. Converted inch dimensions are  
not necessarily exact.  
FN4900.9  
17  
February 27, 2006  
ICL3225E, ICL3227E, ICL3245E  
Shrink Small Outline Plastic Packages (SSOP)  
N
M20.209 (JEDEC MO-150-AE ISSUE B)  
INDEX  
AREA  
M
M
B
0.25(0.010)  
20 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE  
H
E
INCHES  
MIN  
MILLIMETERS  
GAUGE  
PLANE  
-B-  
SYMBOL  
MAX  
0.078  
0.008’  
0.070’  
0.015  
0.008  
0.289  
0.212  
MIN  
1.73  
0.05  
1.68  
0.25  
0.09  
7.07  
5.20’  
MAX  
1.99  
0.21  
1.78  
0.38  
0.20’  
7.33  
5.38  
NOTES  
A
A1  
A2  
B
0.068  
0.002  
0.066  
0.010’  
0.004  
0.278  
0.205  
1
2
3
L
0.25  
SEATING PLANE  
A
0.010  
A2  
9
-A-  
D
C
D
E
3
4
-C-  
α
e
A1  
e
0.026 BSC  
0.65 BSC  
C
B
0.10(0.004)  
H
L
0.301  
0.311  
7.65  
7.90’  
M
M
S
B
0.25(0.010)  
C
A
0.025  
0.037  
0.63  
0.95  
6
7
N
α
20  
20  
0 deg.  
8 deg.  
0 deg.  
8 deg.  
NOTES:  
Rev. 3 11/02  
1. Symbols are defined in the “MO Series Symbol List” in Section  
2.2 of Publication Number 95.  
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
3. Dimension “D” does not include mold flash, protrusions or gate  
burrs. Mold flash, protrusion and gate burrs shall not exceed  
0.20mm (0.0078 inch) per side.  
4. Dimension “E” does not include interlead flash or protrusions. In-  
terlead flash and protrusions shall not exceed 0.20mm (0.0078  
inch) per side.  
5. The chamfer on the body is optional. If it is not present, a visual  
index feature must be located within the crosshatched area.  
6. “L” is the length of terminal for soldering to a substrate.  
7. “N” is the number of terminal positions.  
8. Terminal numbers are shown for reference only.  
9. Dimension “B” does not include dambar protrusion. Allowable  
dambar protrusion shall be 0.13mm (0.005 inch) total in excess  
of “B” dimension at maximum material condition.  
10. Controlling dimension: MILLIMETER. Converted inch dimen-  
sions are not necessarily exact.  
FN4900.9  
18  
February 27, 2006  
ICL3225E, ICL3227E, ICL3245E  
Small Outline Plastic Packages (SOIC)  
M28.3 (JEDEC MS-013-AE ISSUE C)  
N
28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE  
INDEX  
AREA  
0.25(0.010)  
M
B M  
H
INCHES  
MILLIMETERS  
E
SYMBOL  
MIN  
MAX  
MIN  
2.35  
0.10  
0.33  
0.23  
MAX  
2.65  
0.30  
0.51  
0.32  
18.10  
7.60  
NOTES  
-B-  
A
A1  
B
C
D
E
e
0.0926  
0.0040  
0.013  
0.1043  
0.0118  
0.0200  
0.0125  
-
-
1
2
3
L
9
SEATING PLANE  
A
0.0091  
0.6969  
0.2914  
-
0.7125 17.70  
3
-A-  
o
h x 45  
D
0.2992  
7.40  
4
0.05 BSC  
1.27 BSC  
-
-C-  
α
H
h
0.394  
0.01  
0.419  
0.029  
0.050  
10.00  
0.25  
0.40  
10.65  
0.75  
1.27  
-
e
A1  
C
5
B
0.10(0.004)  
L
0.016  
6
0.25(0.010) M  
C
A M B S  
N
α
28  
28  
7
o
o
o
o
0
8
0
8
-
NOTES:  
Rev. 0 12/93  
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2  
of Publication Number 95.  
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
3. Dimension “D” does not include mold flash, protrusions or gate  
burrs. Mold flash, protrusion and gate burrs shall not exceed  
0.15mm (0.006 inch) per side.  
4. Dimension “E” does not include interlead flash or protrusions. In-  
terlead flash and protrusions shall not exceed 0.25mm (0.010  
inch) per side.  
5. The chamfer on the body is optional. If it is not present, a visual  
index feature must be located within the crosshatched area.  
6. “L” is the length of terminal for soldering to a substrate.  
7. “N” is the number of terminal positions.  
8. Terminal numbers are shown for reference only.  
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater  
above the seating plane, shall not exceed a maximum value of  
0.61mm (0.024 inch)  
10. Controlling dimension: MILLIMETER. Converted inch dimen-  
sions are not necessarily exact.  
FN4900.9  
19  
February 27, 2006  
ICL3225E, ICL3227E, ICL3245E  
Shrink Small Outline Plastic Packages (SSOP)  
M28.209 (JEDEC MO-150-AH ISSUE B)  
N
28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE  
INDEX  
AREA  
0.25(0.010)  
M
B M  
H
INCHES  
MILLIMETERS  
E
GAUGE  
PLANE  
SYMBOL  
MIN  
-
MAX  
0.078  
-
MIN  
-
MAX  
2.00  
-
NOTES  
-B-  
A
A1  
A2  
B
-
0.002  
0.065  
0.009  
0.004  
0.390  
0.197  
0.05  
1.65  
0.22  
0.09  
9.90  
5.00  
-
1
2
3
0.072  
0.014  
0.009  
0.413  
0.220  
1.85  
0.38  
0.25  
10.50  
5.60  
-
L
0.25  
SEATING PLANE  
A
9
0.010  
A2  
-A-  
C
D
E
-
D
3
-C-  
4
α
e
0.026 BSC  
0.65 BSC  
-
e
A1  
C
H
L
0.292  
0.022  
0.322  
0.037  
7.40  
0.55  
8.20  
0.95  
-
B
0.10(0.004)  
6
0.25(0.010) M  
C
A M B S  
N
α
28  
28  
7
NOTES:  
0°  
8°  
0°  
8°  
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2  
Rev. 2 6/05  
of Publication Number 95.  
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
3. Dimension “D” does not include mold flash, protrusions or gate  
burrs. Mold flash, protrusion and gate burrs shall not exceed  
0.20mm (0.0078 inch) per side.  
4. Dimension “E” does not include interlead flash or protrusions.  
Interlead flash and protrusions shall not exceed 0.20mm (0.0078  
inch) per side.  
5. The chamfer on the body is optional. If it is not present, a visual  
index feature must be located within the crosshatched area.  
6. “L” is the length of terminal for soldering to a substrate.  
7. “N” is the number of terminal positions.  
8. Terminal numbers are shown for reference only.  
9. Dimension “B” does not include dambar protrusion. Allowable  
dambar protrusion shall be 0.13mm (0.005 inch) total in excess of  
“B” dimension at maximum material condition.  
10. Controlling dimension: MILLIMETER. Converted inch dimensions  
are not necessarily exact.  
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.  
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without  
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
FN4900.9  
20  
February 27, 2006  

相关型号:

ICL3245EIAZ-T

±15kV ESD Protected, +3V to +5.5V, 1mA, 1Mbps, RS-232 Transceivers with Enhanced Automatic Powerdown; SSOP28; Temp Range: See Datasheet
RENESAS

ICL3245EIB

+-15kV ESD Protected, +3V to +5.5V, 1Microamp, 1Mbps, RS-232 Transceivers with Enhanced Automatic Powerdown
INTERSIL

ICL3245IA

1 Microamp, +3V to +5.5V, 1Mbps, RS-232 Transceivers with Enhanced Automatic Powerdown
INTERSIL

ICL3245IB

1 Microamp, +3V to +5.5V, 1Mbps, RS-232 Transceivers with Enhanced Automatic Powerdown
INTERSIL

ICL3245IB-T

TRIPLE LINE TRANSCEIVER, PDSO28, PLASTIC, MS-013AE, SOIC-28
RENESAS

ICL3245IV

1 Microamp, +3V to +5.5V, 1Mbps, RS-232 Transceivers with Enhanced Automatic Powerdown
INTERSIL

ICL3245IV

TRIPLE LINE TRANSCEIVER, PDSO28, PLASTIC, TSSOP-28
ROCHESTER

ICL3245IV-T

1 Microamp, +3V to +5.5V, 1Mbps, RS-232 Transceivers with Enhanced Automatic Powerdown
INTERSIL

ICL3245IVZ

TRIPLE LINE TRANSCEIVER, PDSO28, PLASTIC, TSSOP-28
ROCHESTER

ICL3245IVZ

1 Microamp, 3V to 5.5V, 1Mbps, RS-232 Transceivers with Enhanced Automatic Powerdown
RENESAS

ICL3245IVZ-T

1 Microamp, 3V to 5.5V, 1Mbps, RS-232 Transceivers with Enhanced Automatic Powerdown
RENESAS

ICL3310

+3V to +5.5V, 1 Microamp, 250kbps, RS-232 Transmitter/Receiver
INTERSIL