ICL3245EIAZ-T [RENESAS]

±15kV ESD Protected, +3V to +5.5V, 1mA, 1Mbps, RS-232 Transceivers with Enhanced Automatic Powerdown; SSOP28; Temp Range: See Datasheet;
ICL3245EIAZ-T
型号: ICL3245EIAZ-T
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

±15kV ESD Protected, +3V to +5.5V, 1mA, 1Mbps, RS-232 Transceivers with Enhanced Automatic Powerdown; SSOP28; Temp Range: See Datasheet

驱动 光电二极管 接口集成电路 驱动器
文件: 总28页 (文件大小:418K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Datasheet  
ICL3225E, ICL3227E, ICL3245E  
±15kV ESD Protected, +3V to +5.5V, 1µA, 1Mbps, RS-232 Transceivers with  
Enhanced Automatic Powerdown  
The ICL3225E, ICL3227E, and ICL3245E devices are  
3.0V to 5.5V powered RS-232 transmitters/receivers  
that meet ElA/TIA-232 and V.28/V.24 specifications,  
Features  
• Pb-free (RoHS compliant)  
• ESD protection for RS-232 I/O pins to ±15kV  
(IEC61000)  
even at V = 3.0V. They provide ±15kV ESD  
CC  
protection (IEC61000-4-2 Air Gap and Human Body  
Model) on transmitter outputs and receiver inputs  
(RS-232 pins). Targeted applications are PDAs,  
Palmtops, and notebook and laptop computers where  
the low operational power consumption and even  
lower standby power consumption are critical.  
Efficient on-chip charge pumps coupled with manual  
and enhanced automatic powerdown functions,  
reduce the standby supply current to a 1µA trickle.  
Small footprint packaging and the use of small, low  
value capacitors ensure board space savings. Data  
rates greater than 1Mbps are ensured at worst case  
load conditions. This family is fully compatible with  
3.3V only systems, mixed 3.3V and 5.0V systems,  
and 5.0V only systems.  
• Manual and enhanced automatic powerdown  
features  
• Drop in replacements for MAX3225E, MAX3227E,  
MAX3245E  
• RS-232 compatible with V = 2.7V  
CC  
• Meets EIA/TIA-232 and V.28/V.24 specifications at  
3V  
• Latch-up free  
• On-chip voltage converters require only four  
external 0.1µF capacitors  
• Ensured mouse driveability (ICL3245E)  
• “Ready to Transmit” indicator output  
(ICL3225E/ICL3227E)  
The ICL3245E is a 3-driver, 5-receiver device that  
provides a complete serial port suitable for laptop or  
notebook computers. It also includes a noninverting  
always-active receiver for “wake-up” capability.  
• Receiver hysteresis for improved noise immunity  
• Ensured minimum data rate: 1Mbps  
The ICL3225E, ICL3227E, and ICL3245E feature an  
enhanced automatic powerdown function that powers  
down the on-chip power supply and driver circuits.  
Powerdown occurs when all receiver and transmitter  
inputs detect no signal transitions for a period of 30s.  
These devices power back up automatically  
whenever they sense a transition on any transmitter  
or receiver input.  
• Low skew at transmitter/receiver input trip  
points: 10ns  
• Ensured minimum slew rate: 24V/µs  
• Wide power supply range: single +3V to +5.5V  
• Low supply current in powerdown state: 1µA  
Applications  
Table 1 summarizes the features of the device  
represented by this datasheet and AN9863  
summarizes the features of each device in the  
ICL32xxE 3V family.  
• Any system requiring RS-232 communication ports  
○ Battery powered, hand-held, and portable  
equipment  
○ Laptop computers, notebooks, palmtops  
○ Modems, printers, and other peripherals  
○ Digital cameras  
Related Literature  
For a full list of related documents, visit our website:  
ICL3225E, ICL3227E, and ICL3245E device pages  
○ Cellular/mobile phones  
FN4900 Rev.13.00  
May.2.19  
Page 1 of 28  
ICL3225E, ICL3227E, ICL3245E  
Contents  
1.  
Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
1.1  
1.2  
1.3  
1.4  
Typical Operating Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Pin Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
2.  
Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
2.1  
2.2  
2.3  
2.4  
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Thermal Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
3.  
4.  
Typical Performance Curves. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Application Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
4.1  
Charge Pump. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
4.1.1  
Charge Pump Abs Max Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Transmitters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Receivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Powerdown Functionality. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Software Controlled (Manual) Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
INVALID Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Enhanced Automatic Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Emulating Standard Automatic Powerdown. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Hybrid Automatic Powerdown Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
READY Output (ICL3225E and ICL3227E Only). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Power Supply Decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Operation Down to 2.7V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Transmitter Outputs when Exiting Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Mouse Driveability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
High Data Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
Interconnection with 3V and 5V Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
4.2  
4.3  
4.4  
4.4.1  
4.4.2  
4.4.3  
4.4.4  
4.4.5  
4.5  
4.6  
4.7  
4.8  
4.9  
4.10  
4.11  
4.12  
5.  
±15kV ESD Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
5.1  
5.2  
5.3  
5.4  
Human Body Model (HBM) Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
IEC61000-4-2 Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
Air-Gap Discharge Test Method. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
Contact Discharge Test Method. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
6.  
7.  
8.  
Die Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24  
Package Outline Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
FN4900 Rev.13.00  
May.2.19  
Page 2 of 28  
ICL3225E, ICL3227E, ICL3245E  
1. Overview  
1. Overview  
1.1  
Typical Operating Circuits  
+3.3V  
+
0.1µF  
19  
2
C
0.1µF  
C1+  
V
3
1
CC  
C
0.1µF  
+
3
+
V+  
V-  
4
C1-  
5
C
0.1µF  
2
C2+  
+
7
C
4
0.1µF  
6
C2-  
+
T
T
1
2
13  
17  
8
T1  
T2  
T1  
T2  
IN  
OUT  
OUT  
12  
15  
IN  
TTL/CMOS  
Logic Levels  
RS-232  
Levels  
16  
R1  
R2  
R1  
R2  
OUT  
IN  
IN  
5kΩ  
5kΩ  
R
1
10  
9
OUT  
R
2
1
20  
11  
READY  
V
FORCEOFF  
INVALID  
CC  
14  
To Power  
Control Logic  
FORCEON  
GND  
18  
Figure 1. ICL3225E  
+3.3V  
+
15  
0.1µF  
2
+
4
C
1
0.1µF  
3
C1+  
V
CC  
C
3
0.1µF  
+
V+  
V-  
C1-  
5
C
2
C2+  
+
7
0.1µF  
C
4
0.1µF  
6
C2-  
+
T
1
11  
13  
T1  
T1  
OUT  
IN  
TTL/CMOS  
Logic Levels  
RS-232  
Levels  
9
1
8
R1  
R1  
IN  
OUT  
5kΩ  
R
1
READY  
16  
10  
V
CC  
FORCEOFF  
INVALID  
12  
To Power  
Control Logic  
FORCEON  
GND  
14  
Figure 2. ICL3227E  
FN4900 Rev.13.00  
May.2.19  
Page 3 of 28  
ICL3225E, ICL3227E, ICL3245E  
1. Overview  
+3.3V  
+
26  
0.1µF  
28  
27  
C
0.1µF  
C1+  
1
V
CC  
C
0.1µF  
3
+
+
+
V+  
V-  
24  
1
C1-  
C
0.1µF  
2
C2+  
3
9
C
4
2
0.1µF  
C2-  
+
T
T
T
1
2
3
14  
T1  
T1  
IN  
OUT  
13  
12  
20  
10  
11  
RS-232  
Levels  
T2  
T3  
T2  
T3  
IN  
IN  
OUT  
OUT  
R2  
OUTB  
TTL/CMOS  
Logic Levels  
19  
18  
4
5
R1  
R1  
R2  
OUT  
OUT  
IN  
R
1
2
5kΩ  
5kΩ  
R2  
IN  
R
17  
16  
6
7
RS-232  
Levels  
R3  
R4  
R3  
R4  
OUT  
OUT  
IN  
R
R
5kΩ  
3
4
IN  
5kΩ  
5kΩ  
15  
23  
8
R5  
R5  
OUT  
IN  
R
5
FORCEON  
22  
21  
V
CC  
FORCEOFF  
GND  
25  
To Power  
Control Logic  
INVALID  
Figure 3. ICL3245E  
FN4900 Rev.13.00  
May.2.19  
Page 4 of 28  
ICL3225E, ICL3227E, ICL3245E  
1. Overview  
1.2  
Ordering Information  
Part Number  
(Notes 2, 3)  
Tape and Reel  
(Units) (Note 1)  
Package  
(RoHS Compliant)  
Part Marking  
Temp Range (°C)  
0 to +70  
Pkg. Dwg. #  
M20.209  
M20.209  
M20.209  
M20.209  
M16.209  
M16.209  
M16.209  
M16.209  
M28.209  
M28.209  
M28.209  
M28.209  
ICL3225ECAZ  
ICL3225ECAZ-T  
ICL3225EIAZ  
ICL3225ECAZ  
ICL3225ECAZ  
ICL3225EIAZ  
ICL3225EIAZ  
3227ECAZ  
-
1k  
-
20 Ld SSOP  
20 Ld SSOP  
20 Ld SSOP  
20 Ld SSOP  
16 Ld SSOP  
16 Ld SSOP  
16 Ld SSOP  
16 Ld SSOP  
28 Ld SSOP  
28 Ld SSOP  
28 Ld SSOP  
28 Ld SSOP  
0 to +70  
-40 to +85  
-40 to +85  
0 to +70  
ICL3225EIAZ-T  
ICL3227ECAZA  
ICL3227ECAZA-T  
ICL3227EIAZA  
ICL3227EIAZA-T  
ICL3245ECAZ  
ICL3245ECAZ-T  
ICL3245EIAZ  
1k  
-
3227ECAZ  
0 to +70  
1k  
-
3227EIAZ  
-40 to +85  
-40 to +85  
0 to +70  
3227EIAZ  
1k  
-
ICL3245ECAZ  
ICL3245ECAZ  
ICL3245EIAZ  
ICL3245EIAZ  
0 to +70  
1k  
-
-40 to +85  
-40 to +85  
ICL3245EIAZ-T  
Notes:  
1k  
1. See TB347 for details about reel specifications.  
2. These Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte  
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).  
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J-  
STD-020.  
3. For Moisture Sensitivity Level (MSL), see the ICL3225E, ICL3227E, and ICL3245E device pages. For more information about MSL, see  
TB363.  
Table 1. Summary of Features  
Enhanced  
Number of  
Monitor Rx.  
Automatic  
Powerdown  
Function?  
Number Number  
Data Rate  
(kbps)  
Rx. Enable  
Function?  
Ready  
Output?  
Manual  
Powerdown?  
Part Number  
ICL3225E  
ICL3227E  
ICL3245E  
of Tx.  
of Rx.  
(ROUTB  
)
2
1
3
2
1
5
0
0
1
1000  
1000  
1000  
No  
No  
No  
Yes  
Yes  
No  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
1.3  
Pin Configurations  
ICL3225E (SSOP)  
Top View  
ICL3227E (SSOP)  
Top View  
READY  
C1+  
V+  
1
2
20 FORCEOFF  
19  
READY  
1
2
3
4
5
6
7
8
16 FORCEOFF  
15  
V
C1+  
V+  
V
CC  
CC  
3
18 GND  
17 T1  
14 GND  
13 T1  
C1-  
4
C1-  
C2+  
C2-  
V-  
OUT  
OUT  
C2+  
C2-  
5
16 R1  
15 R1  
12 FORCEON  
IN  
6
11 T1  
IN  
OUT  
V-  
7
14 FORCEON  
10 INVALID  
T2  
8
13 T1  
IN  
R1  
IN  
9 R1  
OUT  
OUT  
R2  
IN  
9
12  
T2  
IN  
10  
11 INVALID  
R2  
OUT  
FN4900 Rev.13.00  
May.2.19  
Page 5 of 28  
ICL3225E, ICL3227E, ICL3245E  
1. Overview  
ICL3245E (SSOP)  
Top View  
C2+  
C2-  
V-  
1
2
28 C1+  
27 V+  
3
26 V  
CC  
25 GND  
R1  
R2  
R3  
R4  
R5  
4
IN  
IN  
IN  
IN  
IN  
5
24 C1-  
6
23 FORCEON  
22 FORCEOFF  
21 INVALID  
7
8
T1  
T2  
T3  
9
20  
R2  
OUT  
OUT  
OUT  
OUTB  
OUT  
OUT  
OUT  
OUT  
OUT  
10  
11  
19 R1  
18 R2  
17 R3  
16 R4  
15 R5  
T3 12  
IN  
T2 13  
IN  
T1 14  
IN  
1.4  
Pin Descriptions  
Pin  
VCC  
V+  
Function  
System power supply input (3.0V to 5.5V).  
Internally generated positive transmitter supply (+5.5V).  
Internally generated negative transmitter supply (-5.5V).  
Ground connection.  
V-  
GND  
C1+  
C1-  
C2+  
C2-  
TxIN  
External capacitor (voltage doubler) is connected to this lead.  
External capacitor (voltage doubler) is connected to this lead.  
External capacitor (voltage inverter) is connected to this lead.  
External capacitor (voltage inverter) is connected to this lead.  
TTL/CMOS compatible transmitter Inputs.  
TxOUT  
RxIN  
±15kV ESD protected, RS-232 level (nominally ±5.5V) transmitter outputs.  
±15kV ESD protected, RS-232 compatible receiver inputs.  
RxOUT  
R2OUTB  
INVALID  
READY  
TTL/CMOS level receiver outputs.  
TTL/CMOS level, noninverting, always enabled receiver outputs.  
Active low output that indicates if no valid RS-232 levels are present on any receiver input.  
Active high output that indicates when the ICL32xxE is ready to transmit (V- ≤ -4V).  
FORCEOFF Active low to shut down transmitters and on-chip power supply, which overrides any automatic circuitry and FORCEON (see  
Table 5 on page 15).  
FORCEON Active high input to override automatic powerdown circuitry and keeps transmitters active. (FORCEOFF must be high).  
FN4900 Rev.13.00  
May.2.19  
Page 6 of 28  
ICL3225E, ICL3227E, ICL3245E  
2. Specifications  
2. Specifications  
2.1  
Absolute Maximum Ratings  
Parameter  
Minimum  
-0.3  
Maximum  
Unit  
V
VCC to GND  
V+ to GND  
V- to GND  
6
-0.3  
7
V
+0.3  
-7  
14  
V
V+ to V-  
V
Input Voltages  
T
IN, FORCEOFF, FORCEON  
-0.3  
-0.3  
6
V
V
RIN  
±25  
Output Voltages  
TOUT  
±13.2  
V
V
R
OUT, INVALID, READY  
VCC +0.3  
Short-Circuit Duration  
TOUT  
Continuous  
ESD Rating  
(See “ESD Performance” on page 9)  
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions can adversely  
impact product reliability and result in failures not covered by warranty.  
2.2  
Thermal Information  
Thermal Resistance (Typical, Note 4)  
θJA (°C/W)  
145  
16 Ld SSOP Package  
20 Ld SSOP Package  
28 Ld SSOP Package  
Notes:  
135  
100  
4. θJA is measured with the component mounted on a low-effective thermal conductivity test board in free air. See TB379 for details.  
Parameter  
Maximum Junction Temperature (Plastic Package)  
Maximum Storage Temperature Range  
Pb-Free Reflow Profile  
Minimum  
Maximum  
+150  
Unit  
°C  
-65  
+150  
°C  
see TB493  
2.3  
Recommended Operating Conditions  
Parameter  
Minimum  
Maximum  
Unit  
Temperature Range  
ICL32xxEC  
0
+70  
+85  
°C  
°C  
ICL32xxEI  
-40  
FN4900 Rev.13.00  
May.2.19  
Page 7 of 28  
ICL3225E, ICL3227E, ICL3245E  
2. Specifications  
2.4  
Electrical Specifications  
Test conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; unless otherwise specified. Typicals are at TA = +25°C  
Temp  
Parameter  
Test Conditions  
(°C)  
Min  
Typ  
Max Unit  
DC Characteristics  
Supply Current, Automatic  
Powerdown  
All RIN open, FORCEON = GND, FORCEOFF = VCC  
+25  
-
1.0  
10  
µA  
Supply Current, Powerdown  
FORCEOFF = GND  
+25  
+25  
-
-
1.0  
0.3  
10  
µA  
Supply Current,  
All outputs unloaded, FORCEON = FORCEOFF = VCC  
1.0  
mA  
Automatic Powerdown Disabled  
Logic and Transmitter Inputs and Receiver Outputs  
Input Logic Threshold Low  
Input Logic Threshold High  
T
T
IN, FORCEON, FORCEOFF  
IN, FORCEON,  
Full  
Full  
Full  
Full  
Full  
Full  
-
2.0  
2.4  
-
-
0.8  
V
V
V
VCC = 3.3V  
CC = 5.0V  
-
-
-
FORCEOFF  
V
-
Input Leakage Current  
Output Leakage Current  
Output Voltage Low  
Output Voltage High  
Receiver Inputs  
T
IN, FORCEON, FORCEOFF  
±0.01  
±0.05  
-
±1.00 µA  
FORCEOFF = GND, ICL3245E only  
-
±10  
0.4  
-
µA  
V
I
I
OUT = 1.6mA  
OUT = -1.0mA  
-
Full VCC - 0.6 VCC - 0.1  
V
Input Voltage Range  
Input Threshold Low  
Full  
+25  
+25  
+25  
+25  
+25  
+25  
-25  
0.6  
0.8  
-
-
25  
-
V
V
V
CC = 3.3V  
1.2  
1.5  
1.5  
1.8  
0.5  
5
VCC = 5.0V  
-
V
Input Threshold High  
V
V
CC = 3.3V  
CC = 5.0V  
2.4  
2.4  
-
V
-
V
Input Hysteresis  
-
V
Input Resistance  
3
7
kΩ  
Transmitter Outputs  
Output Voltage Swing  
Output Resistance  
All transmitter outputs loaded with 3kΩ to Ground  
Full  
Full  
Full  
±5.0  
±5.4  
10M  
±35  
-
-
-
V
V
CC = V+ = V- = 0V, transmitter output = ±2V  
300  
Ω
Output Short-Circuit Current  
Output Leakage Current  
-
-
±60 mA  
V
OUT = ±12V, VCC = 0V or 3V to 5.5V, automatic powerdown Full  
±25  
µA  
or FORCEOFF = GND  
Mouse Driveability  
Transmitter Output Voltage  
(See Figure 20 on page 20)  
T1IN = T2IN = GND, T3IN = VCC, T3OUT loaded with 3kΩ to  
GND, T1OUT and T2OUT loaded with 2.5mA each  
Full  
±5  
-
-
V
Enhanced Automatic Powerdown (FORCEON = GND, FORCEOFF = VCC)  
Receiver Input Thresholds to  
INVALID High  
See Figure 15 on page 17  
Full  
Full  
Full  
-2.7  
-0.3  
-
-
-
2.7  
0.3  
0.4  
-
V
V
Receiver Input Thresholds to  
INVALID Low  
See Figure 15 on page 17  
INVALID, READY Output Voltage IOUT = 1.6mA  
Low  
-
V
INVALID, READY Output Voltage IOUT = -1.0mA  
High  
Full VCC - 0.6  
-
V
Receiver Positive or Negative  
+25  
-
1
-
µs  
Threshold to INVALID High Delay  
(tINVH  
)
FN4900 Rev.13.00  
May.2.19  
Page 8 of 28  
ICL3225E, ICL3227E, ICL3245E  
2. Specifications  
Test conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; unless otherwise specified. Typicals are at TA = +25°C (Continued)  
Temp  
Parameter  
Test Conditions  
(°C)  
Min  
Typ  
Max Unit  
Receiver Positive or Negative  
+25  
-
30  
-
µs  
Threshold to INVALID Low Delay  
(tINVL  
)
Receiver or Transmitter Edge to  
Transmitters Enabled Delay (tWU  
(Note 5)  
(Note 5)  
25  
-
100  
30  
-
µs  
)
Receiver or Transmitter Edge to  
Transmitters Disabled Delay  
Full  
15  
60  
sec  
(tAUTOPWDN  
)
Timing Characteristics  
Maximum Data Rate  
RL = 3kΩ, one transmitter  
switching  
CL = 1000pF  
Full  
Full  
Full  
250  
1000  
1000  
-
-
-
-
-
-
kbps  
kbps  
kbps  
V
CC = 3V to 4.5V, CL = 250pF  
V
CC = 4.5V to 5.5V,  
CL = 1000pF  
tPHL  
Receiver Propagation Delay  
Receiver input to receiver  
output, CL = 150pF  
+25  
+25  
+25  
+25  
+25  
+25  
+25  
-
-
0.15  
0.15  
200  
200  
25  
-
-
-
-
-
-
µs  
µs  
ns  
ns  
ns  
ns  
tPLH  
Receiver Output Enable Time  
Receiver Output Disable Time  
Transmitter Skew  
Normal operation (ICL3245E only)  
Normal operation (ICL3245E only)  
-
-
t
PHL - tPLH (Note 6)  
tPHL - tPLH (Note 6)  
CC = 3.3V, RL = 3kΩ to 7kΩ, measured from 3V to -3V or  
-
Receiver Skew  
-
50  
Transition Region Slew Rate  
V
24  
-
150 V/µs  
-3V to 3V, CL = 150pF to 1000pF  
ESD Performance  
RS-232 Pins (TOUT, RIN  
)
Human body model  
+25  
-
-
-
-
-
-
-
±15  
±8  
-
-
-
-
-
-
-
kV  
kV  
kV  
kV  
kV  
kV  
kV  
IEC61000-4-2 contact discharge  
IEC61000-4-2 air gap discharge  
+25  
+25  
+25  
±15  
±2  
All Other Pins  
ICL3245E  
Human body model (HBM)  
Charged Device Model (CDM) +25  
±1.5  
±4  
ICL3225E, ICL3227E  
Human body model (HBM)  
+25  
Charged Device Model (CDM) +25  
±2  
Notes:  
5. An “edge” is defined as a transition through the transmitter or receiver input thresholds.  
6. Skews are measured at the receiver input switching points (1.4V).  
FN4900 Rev.13.00  
May.2.19  
Page 9 of 28  
ICL3225E, ICL3227E, ICL3245E  
3. Typical Performance Curves  
3. Typical Performance Curves  
VCC = 3.3V, TA = +25°C  
6
110  
90  
70  
50  
30  
V
+
OUT  
4
2
+SLEW  
1 Transmitter at 1Mbps  
Other Transmitters at 30kbps  
0
-SLEW  
-2  
-4  
V
-
OUT  
10  
0
-6  
0
1000  
2000  
3000  
4000  
5000  
0
1000  
2000  
3000  
4000  
5000  
Load Capacitance (pF)  
Load Capacitance (pF)  
Figure 4. Transmitter Output Voltage vs Load  
Capacitance  
Figure 5. Slew Rate vs Load Capacitance  
90  
90  
80  
70  
60  
50  
ICL3225E  
80  
ICL3227E  
1Mbps  
1Mbps  
70  
60  
50  
250kbps  
120kbps  
40  
40  
30  
250kbps  
30  
120kbps  
20  
10  
20  
10  
4000  
5000  
2000  
3000  
1000  
0
0
1000  
2000  
3000  
4000  
5000  
Load Capacitance (pF)  
Load Capacitance (pF)  
Figure 6. Supply Current vs Load Capacitance When  
Transmitting Data  
Figure 7. Supply Current vs Load Capacitance When  
Transmitting Data  
FN4900 Rev.13.00  
May.2.19  
Page 10 of 28  
ICL3225E, ICL3227E, ICL3245E  
3. Typical Performance Curves  
VCC = 3.3V, TA = +25°C (Continued)  
90  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
No Load  
All Outputs Static  
1Mbps  
ICL3245E  
80  
70  
60  
50  
250kbps  
40  
30  
120kbps  
20  
10  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
0
1000  
2000  
3000  
4000  
5000  
Supply Voltage (V)  
Load Capacitance (pF)  
Figure 9. Supply Current vs Supply Voltage  
Figure 8. Supply Current vs Load Capacitance When  
Transmitting Data  
FN4900 Rev.13.00  
May.2.19  
Page 11 of 28  
ICL3225E, ICL3227E, ICL3245E  
4. Application Information  
4. Application Information  
The ICL3225E, ICL3227E, and ICL3245E (ISL32xxE) operate from a single +3V to +5.5V supply, ensure a 1Mbps  
minimum data rate, require only four small external 0.1µF capacitors, feature low power consumption, and meet  
all ElA RS-232C and V.28 specifications.  
4.1  
Charge Pump  
The ICL32xxE use regulated on-chip dual charge pumps as voltage doublers, and voltage inverters to generate  
±5.5V transmitter supplies from a V supply as low as 3.0V, which allows these devices to maintain RS-232  
CC  
compliant output levels over the ±10% tolerance range of 3.3V powered systems. The efficient on-chip power  
supplies require only four small, external 0.1µF capacitors for the voltage doubler and inverter functions at  
V
= 3.3V. See the Capacitor Selection, and Table 6 on page 19 for capacitor recommendations for other  
CC  
operating conditions. The charge pumps operate discontinuously (turning off when the V+ and V- supplies are  
pumped up to the nominal values), resulting in significant power savings.  
4.1.1 Charge Pump Abs Max Ratings  
These 3V to 5V RS-232 transceivers have been fully characterized for 3.0V to 3.6V operation and for critical  
points at 4.5V to 5.5V operation. Furthermore, load conditions were favorable using static logic states only.  
The specified maximum values for V+ and V- are +7V and -7V, respectively. These limits apply for V values set  
CC  
to 3.0V and 3.6V (see Table 2). For V values set to 4.5V and 5.5V, the maximum values for V+ and V- can  
CC  
approach +9V and -7V, respectively (Table 3 on page 13). The breakdown characteristics for V+ and V- were  
measured with ±13V.  
Table 2. V+ and V- Values for V = 3.0V to 3.6V  
CC  
V+ (V)  
V- (V)  
T1IN  
C1 (μF)  
C2, C3, C4 (μF)  
Load  
(Logic State)  
VCC = 3.0V  
5.80  
5.80  
5.80  
5.88  
5.76  
6.00  
5.68  
5.68  
5.68  
5.76  
5.68  
5.84  
5.88  
5.88  
5.80  
5.88  
5.88  
5.92  
VCC = 3.6V  
6.56  
6.56  
6.56  
6.60  
6.36  
6.64  
6.00  
6.00  
6.00  
6.08  
6.04  
6.16  
6.24  
6.28  
6.20  
6.44  
6.04  
6.40  
VCC = 3.0V  
-5.60  
-5.60  
-5.60  
-5.56  
-5.56  
-5.64  
-5.60  
-5.60  
-5.60  
-5.64  
-5.60  
-5.64  
-5.60  
-5.60  
-5.60  
-5.64  
-5.64  
-5.64  
VCC = 3.6V  
-5.88  
-5.88  
-5.88  
-5.92  
-5.76  
-5.96  
-5.60  
-5.60  
-5.60  
-5.64  
-5.60  
-5.72  
-5.60  
-5.64  
-5.60  
-5.72  
-5.64  
-5.64  
0.1  
0.1  
Open  
H
L
2.4kbps  
3kΩ // 1000pF  
Open  
H
L
2.4kbps  
0.047  
0.33  
H
L
2.4kbps  
3kΩ // 1000pF  
Open  
H
L
2.4kbps  
1
1
H
L
2.4kbps  
H
3kΩ // 1000pF  
L
2.4kbps  
FN4900 Rev.13.00  
May.2.19  
Page 12 of 28  
ICL3225E, ICL3227E, ICL3245E  
4. Application Information  
Table 3. V+ and V- Values for V = 4.5V to 5.5V  
CC  
V+ (V)  
VCC = 4.5V  
V- (V)  
T1IN  
(Logic State)  
C1 (μF)  
C2, C3, C4 (μF)  
Load  
VCC = 5.5V  
8.48  
8.48  
8.48  
8.88  
8.00  
8.84  
6.88  
6.88  
6.88  
7.28  
6.60  
7.16  
7.60  
7.60  
7.56  
8.16  
6.84  
7.76  
VCC = 4.5V  
-6.16  
-6.16  
-6.17  
-6.36  
-5.76  
-6.40  
-5.80  
-5.84  
-5.80  
-5.92  
-5.52  
-5.92  
-5.76  
-5.76  
-5.72  
-5.80  
-5.64  
-5.80  
VCC = 5.5V  
-6.40  
-6.44  
-6.44  
-6.72  
-5.76  
-6.64  
-5.88  
-5.88  
-5.88  
-6.04  
-5.52  
-5.96  
-5.76  
-5.76  
-5.76  
-5.92  
-6.84  
-5.80  
0.1  
0.1  
Open  
H
7.44  
7.44  
7.44  
7.76  
7.08  
7.76  
6.44  
6.48  
6.44  
6.64  
6.24  
6.72  
6.84  
6.88  
6.92  
7.28  
6.44  
7.08  
L
2.4kbps  
3kΩ // 1000pF  
Open  
H
L
2.4kbps  
0.047  
0.33  
H
L
2.4kbps  
3kΩ // 1000pF  
Open  
H
L
2.4kbps  
1
1
H
L
2.4kbps  
H
3kΩ // 1000pF  
L
2.4kbps  
The resulting new maximum voltages at V+ and V- are listed in Table 4.  
Table 4. New Measured Withstanding Voltages  
V+, V- to Ground  
V+ to V-  
±13V  
20V  
4.2  
Transmitters  
The transmitters are proprietary, low dropout, inverting drivers that translate TTL/CMOS inputs to EIA/TIA-232  
output levels. The transmitters are coupled with the on-chip ±5.5V supplies to deliver true RS-232 levels over a  
wide range of single supply system voltages.  
Transmitter outputs disable and assume a high impedance state when the device enters the powerdown mode  
(see Table 5 on page 15). The outputs can be driven to ±12V when disabled.  
All devices ensure a 1Mbps data rate for full load conditions (3kΩ and 250pF), V ≥ 3.0V, with one transmitter  
CC  
operating at full speed. Under more typical conditions of V ≥ 3.3V, R = 3kΩ, and C = 250pF, one transmitter  
CC  
L
L
easily operates at 1.4Mbps. Transmitter skew is extremely low on these devices, and is specified at the receiver  
input trip points (1.4V), rather than the arbitrary 0V crossing point typical of other RS-232 families.  
Transmitter inputs float if they remain unconnected and can increase I . Connect unused inputs to GND for best  
CC  
performance.  
FN4900 Rev.13.00  
May.2.19  
Page 13 of 28  
ICL3225E, ICL3227E, ICL3245E  
4. Application Information  
4.3  
Receivers  
All the ICL32xxE devices contain standard inverting receivers, but only the ICL3245E receivers can tri-state using  
the FORCEOFF control line. The ICL3245E includes a noninverting (monitor) receiver (denoted by the R  
OUTB  
label) that is always active regardless of the state of any control lines. Both receiver types convert RS-232 signals  
to CMOS output levels and accept inputs up to ±25V while presenting the required 3kΩ to 7kΩ input impedance  
(see Figure 10) even if the power is off (V = 0V). The receivers’ Schmitt trigger input stage uses hysteresis to  
CC  
increase noise immunity and decrease errors due to slow input signal transitions.  
V
CC  
R
R
XOUT  
XIN  
GND ≤ V  
≤ V  
CC  
-25V ≤ V  
≤ +25V  
5kΩ  
ROUT  
RIN  
GND  
Figure 10. Inverting Receiver Connections  
The ICL3245E inverting receivers disable during forced (manual) powerdown, but not during automatic  
powerdown (see Table 5). Conversely, the monitor receiver remains active even during manual powerdown,  
which makes it extremely useful for Ring Indicator monitoring. Standard receivers driving powered down  
peripherals must be disabled to prevent current flow through the peripheral’s protection diodes (see Figures 11  
and 12). When powered down, they cannot be used for wake-up functions, but the corresponding monitor receiver  
can be dedicated to this task as shown in Figure 12.  
V
CC  
V
CC  
Transition  
Detector  
V
CC  
To  
Wake-Up  
Logic  
ICL3245E  
Current  
Flow  
V
CC  
V
CC  
V
= V  
CC  
OUT  
R2  
OUTB  
Rx  
R
T
V
= HI-Z  
Powered  
Down  
UART  
X
OUT  
R2  
OUT  
Powered  
Down  
UART  
R2  
IN  
Tx  
T1  
X
IN  
Old  
RS-232 Chip  
SHDN = GND  
GND  
T1  
OUT  
FORCEOFF = GND  
Figure 11. Power Drain Through Powered Down Peripheral  
Figure 12. Disabled Receivers Prevent Power Drain  
FN4900 Rev.13.00  
May.2.19  
Page 14 of 28  
ICL3225E, ICL3227E, ICL3245E  
4. Application Information  
4.4  
Powerdown Functionality  
The 3V ICL32xxE devices require a nominal supply current of 0.3mA during normal operation (not in powerdown  
mode). This current is considerably less than the 5mA to 11mA current required of 5V RS-232 devices. The  
already low current requirement drops significantly when the device enters powerdown mode. In powerdown,  
supply current drops to 1µA, because the on-chip charge pump turns off (V+ collapses to V , V- collapses to  
CC  
GND), and the transmitter outputs tri-state. Inverting receiver outputs may or may not disable in powerdown; see  
Table 5 for details. This micro-power mode makes these devices ideal for battery powered and portable  
applications.  
Table 5. Powerdown Logic Truth Table  
RCVR or  
XMTR  
RS-232  
Level  
EDGE  
ROUTB  
Outputs  
(Note 7)  
Present at  
Receiver  
Input?  
Within 30 FORCEOFF FORCEON  
Sec?  
Transmitter  
Outputs  
Receiver  
Outputs  
INVALID  
Output  
Input  
Input  
Mode of Operation  
ICL3225E, ICL3227E  
No  
No  
Yes  
Yes  
No  
No  
X
H
H
H
H
H
H
L
H
H
L
Active  
Active  
Active  
Active  
High-Z  
High-Z  
High-Z  
High-Z  
Active  
Active  
Active  
Active  
Active  
Active  
Active  
Active  
N.A.  
N.A.  
N.A.  
N.A.  
N.A.  
N.A.  
N.A.  
N.A.  
No  
Yes  
No  
L
H
L
Normal Operation (Enhanced  
Auto Powerdown Disabled)  
Normal Operation (Enhanced  
Auto Powerdown Enabled)  
L
Yes  
No  
H
L
L
Powerdown Due to Enhanced  
Auto Powerdown Logic  
L
Yes  
No  
H
L
X
X
Manual Powerdown  
X
L
Yes  
H
ICL322XE - INVALID Driving FORCEON and FORCEOFF (Emulates Automatic Powerdown)  
X
Note 8  
Note 8  
Note 8  
Note 8  
Active  
Active  
Active  
N.A.  
N.A.  
Yes  
No  
H
L
Normal Operation  
X
ICL3245E  
No  
High-Z  
Forced Auto Powerdown  
H
H
H
H
H
H
L
H
H
L
Active  
Active  
Active  
Active  
High-Z  
High-Z  
High-Z  
High-Z  
Active  
Active  
Active  
Active  
Active  
Active  
High-Z  
High-Z  
Active  
Active  
Active  
Active  
Active  
Active  
Active  
Active  
No  
Yes  
No  
L
H
L
Normal Operation (Enhanced  
Auto Powerdown Disabled)  
No  
Yes  
Yes  
No  
Normal Operation (Enhanced  
Auto Powerdown Enabled)  
L
Yes  
No  
H
L
L
Powerdown Due to Enhanced  
Auto Powerdown Logic  
No  
L
Yes  
No  
H
L
X
X
X
Manual Powerdown  
X
L
Yes  
H
ICL3245E - INVALID Driving FORCEON and FORCEOFF (Emulates Automatic Powerdown)  
X
X
Note 8  
Note 8  
Note 8  
Note 8  
Active  
Active  
Active  
Active  
Yes  
No  
H
L
Normal Operation  
High-Z  
High-Z  
Forced Auto Powerdown  
Notes:  
7. Applies only to the ICL3245E.  
8. Input is connected to INVALID Output.  
FN4900 Rev.13.00  
May.2.19  
Page 15 of 28  
ICL3225E, ICL3227E, ICL3245E  
4. Application Information  
4.4.1 Software Controlled (Manual) Powerdown  
The ICL32xxE devices allow you to force the IC into the low power, standby state, and use a two pin approach  
where the FORCEON and FORCEOFF inputs determine the IC’s mode. For always enabled operation,  
FORCEON and FORCEOFF are both strapped high. Under logic or software control, only the FORCEOFF input  
needs to be driven to switch between active and power-down modes. The FORCEON state is not critical because  
FORCEOFF overrides FORCEON. However, if strictly manual control over power-down is needed, you must strap  
FORCEON high to disable the automatic powerdown circuitry. The ICL3245E inverting (standard) receiver  
outputs also disable when the device is in powerdown, and eliminate the possible current path through a  
shutdown peripheral’s input protection diode (see Figures 11 and 12).  
Connecting FORCEOFF and FORCEON together disables the enhanced automatic powerdown feature, which  
enables them to function as a manual SHUTDOWN input (see Figure 13).  
With any of the above control schemes, the time required to exit powerdown and resume transmission is only  
100µs.  
FORCEOFF  
Power  
FORCEON  
Management  
Logic  
INVALID  
ICL32xxE  
I/O  
UART  
CPU  
Figure 13. Connections for Manual Powerdown When No Valid Receiver Signals are Present  
When using both manual and enhanced automatic powerdown (FORCEON = 0), the ICL32xxE devices do not  
power up from manual powerdown until both FORCEOFF and FORCEON are driven high, or until a transition  
occurs on a receiver or transmitter input. Figure 14 shows a circuit for ensuring that the ICL32xxE powers up as  
soon as FORCEOFF switches high. The rising edge of the master powerdown signal forces the device to power  
up, and the ICL32xxE returns to enhanced automatic powerdown mode an RC time constant after this rising  
edge. The time constant is not critical, because the ICL32xxE remains powered up for 30 seconds after the  
FORCEON falling edge, even if there are no signal transitions. The delay gives slow-to-wake systems (such as a  
mouse) plenty of time to start transmitting, and as long as it starts transmitting within 30 seconds both systems  
remain enabled.  
Master Powerdown Line  
0.1µF  
Power  
Management  
Unit  
1MΩ  
FORCEOFF  
FORCEON  
ICL32xxE  
Figure 14. Circuit to Ensure Immediate Power Up When Exiting Forced Powerdown  
4.4.2 INVALID Output  
Table 5 on page 15 on the INVALID output always indicates whether 30µs have elapsed with invalid RS-232  
signals (see Figures 15 and 17) persisting on all of the receiver inputs, and provides you a way to determine when  
FN4900 Rev.13.00  
May.2.19  
Page 16 of 28  
ICL3225E, ICL3227E, ICL3245E  
4. Application Information  
the interface block should power down. Invalid receiver levels occur whenever the driving peripheral’s outputs are  
shut off (powered down) or when the RS-232 interface cable is disconnected. If an interface cable is disconnected  
and all the receiver inputs are floating (but pulled to GND by the internal receiver pull down resistors), the  
INVALID logic detects the invalid levels and drives the output low. The power management logic then uses this  
indicator to power down the interface block. Reconnecting the cable restores valid levels at the receiver inputs,  
INVALID switches high, and the power management logic wakes up the interface block. INVALID can also be  
used to indicate the DTR or RING INDICATOR signal, as long as the other receiver inputs are floating, or driven to  
GND (as in the case of a powered down driver).  
Valid RS-232 Level - INVALID = 1  
2.7V  
Indeterminate  
0.3V  
Invalid Level - INVALID = 0  
-0.3V  
Indeterminate  
-2.7V  
Valid RS-232 Level - INVALID = 1  
Figure 15. Definition of Valid RS-232 Receiver Levels  
4.4.3 Enhanced Automatic Powerdown  
Even greater power savings are available by using the ICL32xxE's enhanced automatic powerdown function.  
When the enhanced powerdown logic determines that no transitions have occurred on any of the transmitter or  
receiver inputs for 30 seconds, the charge pump and transmitters powerdown, and reduces supply current to 1µA.  
The ICL32xxE devices automatically power back up whenever they detect a transition on one of these inputs. The  
automatic powerdown feature provides additional system power savings without changes to the existing operating  
system.  
Enhanced automatic powerdown operates when the FORCEON input is low and the FORCEOFF input is high.  
Tying FORCEON high disables automatic powerdown, but manual powerdown is always available using the  
overriding FORCEOFF input. Table 5 on page 15 summarizes the enhanced automatic powerdown functionality.  
Figure 16 shows the enhanced powerdown control logic. Note: When the ICL32xxE enters powerdown (manually  
or automatically), the 30 second timer remains timed out (set), keeping the ICL32xxE powered down until  
FORCEON transitions high, or until a transition occurs on a receiver or transmitter input.  
FORCEOFF  
Edge  
T_IN  
Detect  
S
30s  
AUTOSHDN  
Timer  
Edge  
R_IN  
Detect  
R
FORCEON  
Figure 16. Enhanced Automatic Powerdown Logic  
The INVALID output signal switches low to indicate that invalid levels have persisted on all of the receiver inputs  
for more than 30µs (see Figure 17), but this has no direct effect on the state of the ICL32xxE (see the next  
sections for methods of using INVALID to power down the device). INVALID switches high 1µs after detecting a  
valid RS-232 level on a receiver input. INVALID operates in all modes (forced or automatic powerdown, or forced  
on), so it is also useful for systems employing manual powerdown circuitry.  
FN4900 Rev.13.00  
May.2.19  
Page 17 of 28  
ICL3225E, ICL3227E, ICL3245E  
4. Application Information  
FORCEON  
ICL32xxE  
INVALID  
FORCEOFF  
I/O  
UART  
CPU  
Figure 17. Connections for Automatic Powerdown When No Valid Receiver Signals are Present  
The time to recover from automatic powerdown mode is typically 100µs.  
4.4.4 Emulating Standard Automatic Powerdown  
If enhanced automatic powerdown is not desired, you can implement the standard automatic powerdown feature  
(mimics the function on the ICL3221E/ICL3223E/ICL3243E) by connecting the INVALID output to the FORCEON  
and FORCEOFF inputs, as shown in Figure 18. After 30µs of invalid receiver levels, INVALID switches low and  
drives the ICL32xxE into a forced powerdown condition. INVALID switches high as soon as a receiver input  
senses a valid RS-232 level, forcing the ICL32xxE to power on. See “ICL322XE - INVALID Driving FORCEON  
and FORCEOFF (Emulates Automatic Powerdown)” on page 15 for an operational summary. This operational  
mode is perfect for handheld devices that communicate with another computer through a detachable cable.  
Detaching the cable allows the internal receiver pull-down resistors to pull the inputs to GND (an invalid RS-232  
level), causing the 30µs timer to time out and drive the IC into powerdown. Reconnecting the cable restores valid  
levels and causes the IC to power back up.  
Receiver  
Inputs  
Invalid  
Region  
}
Transmitter  
Inputs  
Transmitter  
Outputs  
t
INVH  
INVALID  
Output  
t
INVL  
t
AUTOPWDN  
t
WU  
t
WU  
t
AUTOPWDN  
READY  
Output  
V+  
V
CC  
0
V-  
Figure 18. Enhanced Automatic Powerdown, INVALID and READY Timing Diagrams  
FN4900 Rev.13.00  
May.2.19  
Page 18 of 28  
ICL3225E, ICL3227E, ICL3245E  
4. Application Information  
4.4.5 Hybrid Automatic Powerdown Options  
For devices that communicate only through a detachable cable, you can connect INVALID to FORCEOFF (with  
FORCEON = 0). While the cable is attached, INVALID and FORCEOFF remain high, so the enhanced automatic  
powerdown logic powers down the RS-232 device whenever there is 30 seconds of inactivity on the receiver and  
transmitter inputs. Detaching the cable allows the receiver inputs to drop to an invalid level (GND), so INVALID  
switches low and forces the RS-232 device to power down. The ICL32xxE remains powered down until the cable  
is reconnected (INVALID = FORCEOFF = 1), and a transition occurs on a receiver or transmitter input (see  
Figure 16 on page 17). For immediate power up when the cable is reattached, connect FORCEON to  
FORCEOFF through a network similar to that shown in Figure 14 on page 16.  
4.5  
READY Output (ICL3225E and ICL3227E Only)  
The READY output indicates that the ICL322xE is ready to transmit. READY switches low whenever the device  
enters powerdown, and switches back high during power-up when V- reaches -4V or lower.  
4.6  
Capacitor Selection  
The charge pumps require 0.1µF capacitors for 3.3V operation. For other supply voltages see Table 6 for  
capacitor values. Do not use values smaller than those listed in Table 6. Increasing the capacitor values (by a  
factor of 2) reduces ripple on the transmitter outputs and slightly reduces power consumption. C , C , and C can  
2
3
4
be increased without increasing C ’s value, however, do not increase C without also increasing C , C , and C to  
1
1
2
3
4
maintain the proper ratios (C to the other capacitors).  
1
When using minimum required capacitor values, make sure that capacitor values do not degrade excessively with  
temperature. If in doubt, use capacitors with a larger nominal value. The capacitor’s Equivalent Series Resistance  
(ESR) usually rises at low temperatures and it influences the amount of ripple on V+ and V-.  
Table 6. Required Capacitor Values  
VCC (V)  
3.0 to 3.6  
4.5 to 5.5  
3.0 to 5.5  
C1 (µF)  
0.1  
C2, C3, C4 (µF)  
0.1  
0.047  
0.1  
0.33  
0.47  
4.7  
Power Supply Decoupling  
In most circumstances a 0.1µF bypass capacitor is adequate. In applications that are particularly sensitive to  
power supply noise, decouple V to ground with a capacitor of the same value as the charge-pump capacitor C .  
CC  
1
Connect the bypass capacitor as close as possible to the IC.  
4.8  
Operation Down to 2.7V  
The ICL32xxE transmitter outputs meet RS-562 levels (±3.7V), at full data rate, with V as low as 2.7V. RS-562  
CC  
levels typically ensure interoperability with RS-232 devices.  
4.9  
Transmitter Outputs when Exiting Powerdown  
Figure 19 on page 20 shows the response of two transmitter outputs when exiting powerdown mode. As they  
activate, the two transmitter outputs properly go to opposite RS-232 levels, with no glitching, ringing, or  
undesirable transients. Each transmitter is loaded with 3kΩ in parallel with 2500pF. Note: The transmitters enable  
only when the magnitude of the supplies exceed approximately 3V.  
FN4900 Rev.13.00  
May.2.19  
Page 19 of 28  
ICL3225E, ICL3227E, ICL3245E  
4. Application Information  
5V/Div  
FORCEOFF  
T1  
V
C
= +3.3V  
- C = 0.1µF  
4
CC  
1
2V/Div  
5V/Div  
T2  
READY  
Time (20µs/Div)  
Figure 19. Transmitter Outputs When Exiting Powerdown  
4.10 Mouse Driveability  
The ICL3245E is specifically designed to power a serial mouse while operating from low voltage supplies.  
Figure 20 shows the transmitter output voltages under increasing load current. The on-chip switching regulator  
ensures the transmitters supply at least ±5V during worst case conditions (15mA for paralleled V+ transmitters,  
7.3mA for single V- transmitter).  
6
5
V
+
4
3
OUT  
V
= 3.0V  
CC  
2
T1  
1
V
+
OUT  
0
T2  
T3  
-1  
-2  
-3  
-4  
-5  
-6  
ICL3245E  
V
V
-
CC  
OUT  
V
-
OUT  
8
0
1
2
3
4
5
6
7
9
10  
Load Current per Transmitter (mA)  
Figure 20. Transmitter Output Voltage vs Load Current  
(per Transmitter, For Example, Double Current Axis for Total VOUT+ Current)  
4.11 High Data Rates  
The ICL32xxE maintain the RS-232 ±5V minimum transmitter output voltages even at high data rates. Figure 21  
on page 21 shows a transmitter loopback test circuit, and Figure 22 on page 21 shows the loopback test result at  
250kbps. For this test, all transmitters were simultaneously driving RS-232 loads in parallel with 1000pF, at  
250kbps. Figure 23 on page 21 shows the loopback results for a single transmitter driving 250pF and an RS-232  
load at 1Mbps. The static transmitters were also loaded with an RS-232 receiver.  
FN4900 Rev.13.00  
May.2.19  
Page 20 of 28  
ICL3225E, ICL3227E, ICL3245E  
4. Application Information  
V
CC  
+
0.1µF  
V
CC  
V+  
V-  
+
C1+  
C1-  
C2+  
C2-  
+
C
1
2
C
3
4
ICL32xxE  
+
C
+
C
T
T
IN  
OUT  
C
L
R
IN  
R
OUT  
FORCEON  
5k  
V
CC  
FORCEOFF  
Figure 21. Transmitter Loopback Test Circuit  
5V/Div  
5V/Div  
T1  
T1  
IN  
IN  
T1  
T1  
OUT  
OUT  
OUT  
OUT  
R1  
R1  
V
= +3.3V  
V
= +3.3V  
CC  
CC  
C
- C = 0.1µF  
4
C
- C = 0.1µF  
4
1
1
2µs/Div  
0.5µs/Div  
Figure 22. Loopback Test at 250kbps (CL = 1000pF)  
Figure 23. Loopback Test at 1Mbps (CL = 250pF)  
4.12 Interconnection with 3V and 5V Logic  
The ICL32xxE directly interfaces with 5V CMOS and TTL logic families. The AC, HC, and CD4000 outputs can  
drive the ICL32xxE inputs with the ICL32xxE at 3.3V and the logic supply at 5V, but ICL32xxE outputs do not  
reach the minimum V for these logic families. See Table 7 for more information.  
IH  
Table 7. Logic Family Compatibility with Various Supply Voltages  
System Power-Supply  
Voltage (V)  
V
CC Supply Voltage (V)  
Compatibility  
Compatible with all CMOS families.  
3.3  
5
3.3  
5
Compatible with all TTL and CMOS logic families.  
5
3.3  
Compatible with ACT and HCT CMOS, and with TTL. ICL32xxE outputs are  
incompatible with AC, HC, and CD4000 CMOS inputs.  
FN4900 Rev.13.00  
May.2.19  
Page 21 of 28  
ICL3225E, ICL3227E, ICL3245E  
5. ±15kV ESD Protection  
5. ±15kV ESD Protection  
All pins on the ICL32xxE devices include ESD protection structures, but the ICL32xxE family incorporates  
advanced structures that allow the RS-232 pins (transmitter outputs and receiver inputs) to survive ESD events  
up to ±15kV. The RS-232 pins are particularly vulnerable to ESD damage because they typically connect to an  
exposed port on the exterior of the finished product. Touching the port pins, or connecting a cable, can cause an  
ESD event that might destroy unprotected ICs. The ESD structures protect the device whether or not it is powered  
up, protect without allowing any latchup mechanism to activate, and do not interfere with RS-232 signals as large  
as ±25V.  
5.1  
Human Body Model (HBM) Testing  
The Human Body Model (HBM) test method emulates the ESD event delivered to an IC during human handling.  
The tester delivers the charge through a 1.5kΩ current limiting resistor, so the test is less severe than the  
IEC61000 test, which uses a 330Ω limiting resistor. The HBM method determines an IC’s ability to withstand the  
ESD transients typically present during handling and manufacturing. Due to the random nature of these events,  
each pin is tested with respect to all other pins. The RS-232 pins on “E” family devices can withstand HBM ESD  
events to ±15kV.  
5.2  
IEC61000-4-2 Testing  
The IEC61000 test method applies to finished equipment, rather than to an individual IC. Therefore, the pins most  
likely to suffer an ESD event are those that are exposed to the outside world (the RS-232 pins in this case), and  
the IC is tested in its typical application configuration (power applied) rather than testing each pin-to-pin  
combination. The lower current limiting resistor coupled with the larger charge storage capacitor yields a test that  
is much more severe than the HBM test. The extra ESD protection built into this device’s RS-232 pins allows the  
design of equipment meeting Level 4 criteria without the need for additional board level protection on the RS-232  
port.  
5.3  
Air-Gap Discharge Test Method  
For the air-gap discharge test method, a charged probe tip moves toward the IC pin until the voltage arcs to it.  
The current waveform delivered to the IC pin depends on factors such as approach speed, humidity, and  
temperature, so it is difficult to obtain repeatable results. The “E” device RS-232 pins withstand ±15kV air-gap  
discharges.  
5.4  
Contact Discharge Test Method  
During the contact discharge test, the probe contacts the tested pin before the probe tip is energized, and  
eliminates the variables associated with the air-gap discharge. The result is a more repeatable and predictable  
test, but equipment limits prevent testing devices at voltages higher than ±8kV. All “E” family devices survive ±8kV  
contact discharges on the RS-232 pins.  
FN4900 Rev.13.00  
May.2.19  
Page 22 of 28  
ICL3225E, ICL3227E, ICL3245E  
6. Die Characteristics  
6. Die Characteristics  
Substrate Potential (Powered Up)  
Transistor Count  
GND  
ISL3225E: 937  
ISL3227E: 825  
ISL3245E: 1109  
Process  
Si Gate CMOS  
FN4900 Rev.13.00  
May.2.19  
Page 23 of 28  
ICL3225E, ICL3227E, ICL3245E  
7. Revision History  
7. Revision History  
Rev.  
Date  
Description  
13  
May.2.19  
Updated to latest formatting.  
Updated Ordering information table by adding active tape and reel information, updated notes, and removed  
retired parts  
Added “Charge Pump Abs Max Ratings” on page 12.  
Removed About Intersil section.  
Removed PDIP, TSSOP, and SOIC information throughout document.  
Updated disclaimer.  
12  
Dec.12.15  
Updated entire datasheet applying Intersil’s new standards.  
Updated Ordering information table on page 2.  
-Updated Tape and Reel note.  
-Updated Note 2.  
-Added MSL note.  
-Removed all non-compliant products.  
In the “Electrical Specifications” table under “ESD Performance” on page 9, Updated All Other pins section by  
changing typical value for the ICL3245E from “±3” to “±2” and adding ICL3225E and ICL3227E information.  
11  
10  
Dec.3.15  
Updated Ordering Information Table on page 2: Added replacement part numbers for ICL3245ECBZ and  
ICL3245ECVZ.  
Aug.31.15  
Ordering Information Table on page 2.  
Added Revision History.  
Added About Intersil Verbiage.  
Updated POD M28.3 to latest revision changes: Added land pattern.  
FN4900 Rev.13.00  
May.2.19  
Page 24 of 28  
ICL3225E, ICL3227E, ICL3245E  
8. Package Outline Drawings  
For the most recent package outline drawing, see M16.209.  
8. Package Outline Drawings  
M16.209 (JEDEC MO-150-AC ISSUE B)  
16 Lead Shrink Small Outline Plastic Package (SSOP  
N
INCHES  
MILLIMETERS  
INDEX  
SYMBOL  
MIN  
MAX  
0.078  
-
MIN  
-
MAX  
2.00  
-
NOTES  
0.25(0.010)  
M
B M  
H
AREA  
E
A
A1  
A2  
B
-
-
GAUGE  
PLANE  
-B-  
0.002  
0.065  
0.009  
0.004  
0.233  
0.197  
0.05  
1.65  
0.22  
0.09  
5.90  
5.00  
-
0.072  
0.014  
0.009  
0.255  
0.220  
1.85  
0.38  
0.25  
6.50  
5.60  
-
1
2
3
9
L
C
-
0.25  
0.010  
SEATING PLANE  
A
D
3
-A-  
D
E
4
e
0.026 BSC  
0.65 BSC  
-
-C-  
0.292  
0.022  
0.322  
0.037  
7.40  
0.55  
8.20  
0.95  
-
H
A2  
e
A1  
L
6
C
B
N
a
16  
16  
7
0.10(0.004)  
0°  
8°  
0°  
8°  
-
0.25(0.010) M  
C
A M B S  
Rev. 3 6/05  
Notes:  
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of  
Publication Number 95.  
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
3. Dimension “D” does not include mold flash, protrusions or gate burrs.  
Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078  
inch) per side.  
4. Dimension “E” does not include interlead flash or protrusions. Interlead  
flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side.  
5. The chamfer on the body is optional. If it is not present, a visual index  
feature must be located within the crosshatched area.  
6. “L” is the length of terminal for soldering to a substrate.  
7. “N” is the number of terminal positions.  
8. Terminal numbers are shown for reference only.  
9. Dimension “B” does not include dambar protrusion. Allowable dambar  
protrusion shall be 0.13mm (0.005 inch) total in excess of “B”  
dimension at maximum material condition.  
10. Controlling dimension: MILLIMETER. Converted inch dimensions are  
not necessarily exact.  
FN4900 Rev.13.00  
May.2.19  
Page 25 of 28  
ICL3225E, ICL3227E, ICL3245E  
8. Package Outline Drawings  
For the most recent package outline drawing, see M20.209.  
M20.209 (JEDEC MO-150-AE ISSUE B)  
20 Lead Shrink Small Outline Plastic Package (SSOP)  
N
INCHES  
MIN  
MILLIMETERS  
INDEX  
M
M
B
0.25(0.010)  
H
AREA  
SYMBOL  
MAX  
0.078  
0.008’  
0.070’  
0.015  
0.008  
0.289  
0.212  
MIN  
1.73  
0.05  
1.68  
0.25  
0.09  
7.07  
5.20’  
MAX  
1.99  
0.21  
1.78  
0.38  
0.20’  
7.33  
5.38  
NOTES  
E
GAUGE  
PLANE  
A
A1  
A2  
B
0.068  
0.002  
0.066  
0.010’  
0.004  
0.278  
0.205  
-B-  
1
2
3
9
L
0.25  
0.010  
SEATING PLANE  
A
C
-A-  
D
3
4
D
E
-C-  
e
0.026 BSC  
0.65 BSC  
0.301  
0.025  
0.311  
0.037  
7.65  
0.63  
7.90’  
0.95  
A2  
e
H
A1  
C
L
6
7
B
0.10(0.004)  
N
a
20  
20  
M
M
S
B
0.25(0.010)  
C
A
0 deg.  
8 deg.  
0 deg.  
8 deg.  
Rev. 3 11/02  
Notes:  
1. Symbols are defined in the “MO Series Symbol List” in Section  
2.2 of Publication Number 95.  
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
3. Dimension “D” does not include mold flash, protrusions or gate  
burrs. Mold flash, protrusion and gate burrs shall not exceed  
0.20mm (0.0078 inch) per side.  
4. Dimension “E” does not include interlead flash or protrusions.  
Interlead flash and protrusions shall not exceed 0.20mm (0.0078  
inch) per side.  
5. The chamfer on the body is optional. If it is not present, a visual  
index feature must be located within the crosshatched area.  
6. “L” is the length of terminal for soldering to a substrate.  
7. “N” is the number of terminal positions.  
8. Terminal numbers are shown for reference only.  
9. Dimension “B” does not include dambar protrusion. Allowable  
dambar protrusion shall be 0.13mm (0.005 inch) total in excess  
of “B” dimension at maximum material condition.  
10. Controlling dimension: MILLIMETER. Converted inch  
dimensions are not necessarily exact.  
FN4900 Rev.13.00  
May.2.19  
Page 26 of 28  
ICL3225E, ICL3227E, ICL3245E  
8. Package Outline Drawings  
For the most recent package outline drawing, see M28.209.  
M28.209 (JEDEC MO-150-AH ISSUE B)  
28 Lead Shrink Small Outline Plastic Package (SSOP)  
N
INDEX  
AREA  
0.25(0.010)  
M
B M  
H
INCHES  
MILLIMETERS  
E
GAUGE  
PLANE  
SYMBOL  
MIN  
MAX  
0.078  
-
MIN  
-
MAX  
2.00  
-
NOTES  
-B-  
A
A1  
A2  
B
-
-
0.002  
0.065  
0.009  
0.004  
0.390  
0.197  
0.05  
1.65  
0.22  
0.09  
9.90  
5.00  
-
1
2
3
0.072  
0.014  
0.009  
0.413  
0.220  
1.85  
0.38  
0.25  
10.50  
5.60  
-
L
0.25  
0.010  
SEATING PLANE  
A
9
-A-  
C
D
E
-
D
3
-C-  
4
e
0.026 BSC  
0.65 BSC  
-
A2  
e
A1  
C
H
L
0.292  
0.022  
0.322  
0.037  
7.40  
0.55  
8.20  
0.95  
-
B
0.10(0.004)  
6
0.25(0.010) M  
C
A M B S  
N
28  
28  
7
Notes:  
0°  
8°  
0°  
8°  
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2  
of Publication Number 95.  
Rev. 2 6/05  
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
3. Dimension “D” does not include mold flash, protrusions or gate  
burrs. Mold flash, protrusion and gate burrs shall not exceed  
0.20mm (0.0078 inch) per side.  
4. Dimension “E” does not include interlead flash or protrusions.  
Interlead flash and protrusions shall not exceed 0.20mm (0.0078  
inch) per side.  
5. The chamfer on the body is optional. If it is not present, a visual  
index feature must be located within the crosshatched area.  
6. “L” is the length of terminal for soldering to a substrate.  
7. “N” is the number of terminal positions.  
8. Terminal numbers are shown for reference only.  
9. Dimension “B” does not include dambar protrusion. Allowable  
dambar protrusion shall be 0.13mm (0.005 inch) total in excess of  
“B” dimension at maximum material condition.  
10. Controlling dimension: MILLIMETER. Converted inch dimensions  
are not necessarily exact.  
FN4900 Rev.13.00  
May.2.19  
Page 27 of 28  
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ICL3245IVZ

1 Microamp, 3V to 5.5V, 1Mbps, RS-232 Transceivers with Enhanced Automatic Powerdown
RENESAS

ICL3245IVZ-T

1 Microamp, 3V to 5.5V, 1Mbps, RS-232 Transceivers with Enhanced Automatic Powerdown
RENESAS

ICL3310

+3V to +5.5V, 1 Microamp, 250kbps, RS-232 Transmitter/Receiver
INTERSIL

ICL3310CB

+3V to +5.5V, 1 Microamp, 250kbps, RS-232 Transmitter/Receiver
INTERSIL