FSAV430QSCX [ROCHESTER]

QUAD 2-CHANNEL, AUDIO/VIDEO SWITCH, PDSO16, 0.150 INCH, MO-137AB, QSOP-16;
FSAV430QSCX
型号: FSAV430QSCX
厂家: Rochester Electronics    Rochester Electronics
描述:

QUAD 2-CHANNEL, AUDIO/VIDEO SWITCH, PDSO16, 0.150 INCH, MO-137AB, QSOP-16

光电二极管 输出元件
文件: 总12页 (文件大小:1549K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
September 2010  
FSAV430  
Low Voltage 1.1GHz, 4-Channel, 2:1 Video Switch  
Features  
Description  
The FSAV430 is a high performance Quad Single-Pole,  
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
-40dB Off Isolation at 30MHz  
Double  
Throw  
(SPDT)  
(2-to-1  
multiplexer  
/
-60dB Non-Adjacent Channel Crosstalk at 30MHz  
3dB Bandwidth: 1.1GHz  
demultiplexer) video switch designed specifically for  
switching high definition YPbPr and computer RGB (up  
to UXGA) signals. The bandwidth of this device is  
1.1GHz (typical) which allows signals to pass with  
minimal edge and phase distortion. Image integrity is  
maintained with low crosstalk, high off-isolation and low  
differential gain and phase. The low on resistance (4.5Ω  
typical) minimizes signal insertion loss. Low voltage  
operation (3V), low power consumption (1µA maximum)  
and small scale packaging (including leadless DQFN)  
make this device ideal for a broad range of applications.  
On Resistance: 4.5Ω (Typical)  
Low Power Consumption: 1µA (Maximum)  
Control Input TTL Compatible  
Bidirectional Operation  
Applications  
ƒ
RGB Video Switch in LCD, Plasma and Projector  
Displays  
ƒ
DVD-RW  
Ordering Information  
Operating  
Temperature Range  
Packing  
Part Number  
Package  
Method  
16-Terminal Depopulated Quad Very-Thin Flat Pack  
No Leads (DQFN), JEDEC MO-241, 2.5 x 3.5mm  
FSAV430BQX  
FSAV430MTCX  
FSAV430QSCX  
-40 to +85°C  
Tape and Reel  
Tape and Reel  
Tape and Reel  
16-Lead, Thin Shrink Small Outline Package  
(TSSOP), JEDEC MO-153, 4.4mm Wide  
-40 to +85°C  
-40 to +85°C  
16-Lead, Quarter Size Outline Package (QSOP),  
JEDEC MO-137, 0.150 inch Wide  
Figure 1. Typical Application Diagram  
© 2004 Fairchild Semiconductor Corporation  
FSAV430 • Rev. 1.02  
www.fairchildsemi.com  
Pin Configurations  
Figure 2. Analog Symbol  
Figure 3. QSOP and TSSOP Pin Assignments  
Figure 4. DQFN Pin Assignments  
Pin Descriptions  
Pin #  
Name  
/OE  
S
Description  
Bus Switch Enabled  
Select Input  
15  
1
4, 7, 9, 12  
A
Bus A  
2, 3, 5, 6, 10, 11,13, 14  
B1-B2  
GND  
VCC  
Bus B  
8
Ground  
16  
Supply Voltage  
Truth Table  
S
/OE  
HIGH  
LOW  
LOW  
Function  
Disconnected  
A=B1  
Don’t Care  
LOW  
HIGH  
A=B2  
© 2004 Fairchild Semiconductor Corporation  
FSAV430 • Rev. 1.0.2  
www.fairchildsemi.com  
2
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device  
reliability. The absolute maximum ratings are stress ratings only.  
Symbol  
VCC  
Parameter  
Min.  
-0.5  
-0.5  
-0.5  
-50  
Max.  
+4.6  
Unit  
V
Supply Voltage  
VS  
DC Switch Voltage  
DC Input Voltage(1)  
VCC+0.5  
+4.6  
V
VIN  
V
IIK  
DC Input Diode Current, VIN< 0V  
DC Output Sink Current  
mA  
mA  
mA  
°C  
V
IOUT  
128  
ICC/IGND  
TSTG  
ESD  
DC VCC / GND Current  
±100  
+150  
4000  
Storage Temperature Range  
Human Body Model, JESD22-A114  
-65  
Note:  
1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are  
observed.  
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended  
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not  
recommend exceeding them or designing to Absolute Maximum Ratings.  
Symbol  
VCC  
Parameter  
Min.  
3.0  
0
Max.  
3.6  
Unit  
V
Power Supply  
Input Voltage  
Output Voltage  
VIN  
VCC  
VCC  
5
V
VOUT  
0
V
Switch Control Input  
Switch I/O  
0
tr, tf  
Input Rise and Fall Time  
ns/V  
°C  
0
DC  
+85  
TA  
Operating Temperature, Free Air  
-40  
Note:  
2. Unused control inputs must be held HIGH or LOW; they may not float.  
© 2004 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSAV430 • Rev. 1.0.2  
3
DC Electrical Characteristics  
Typical values are at TA= +25°C.  
TA= -40 to +85°C  
Min. Typ. Max. Units  
Symbol  
Parameter  
Conditions  
VCC (V)  
VANALOG Analog Signal Range  
0
2
V
V
VIK  
VIH  
VIL  
II  
Clamp Diode Voltage  
IIN=-18mA  
3.0  
3.0 to 3.6  
3.0 to 3.6  
3.6  
-1.2  
High-Level Input Voltage  
Low-Level Input Voltage  
Input Leakage Current  
Off-State Leakage Current  
2.0  
V
0.8  
±1.0  
±1.0  
7.0  
V
µA  
µA  
0 VIN 3.6V  
IOFF  
3.6  
0 A, B VCC  
3.0  
5.0  
4.5  
1
VIN=1.0V, RI=75Ω, ION=13mA  
VIN=2.0V, RI=75Ω, ION=26mA  
IOUT=13mA, VIN=0 to VCC  
VIN=VCC or GND, IOUT=0  
RON  
Switch On Resistance(3)  
Ω
3.0  
6.0  
RFLAT(ON) On Resistance Flatness(4)  
3.0  
ICC  
Quiescent Supply Current  
3.6  
1
µA  
One Input at 3.0V  
Other Inputs at VCC or GND  
Increase in ICC per Input  
3.6  
30  
mA  
ΔICC  
Notes:  
3. Measured by the voltage drop between the A and B pins at the indicated current through the switch. On  
resistance is determined by the lower of the voltages on the A or B pins.  
4. Flatness is defined as the difference between the maximum and minimum value on resistance over the specified  
range of conditions.  
AC Electrical Characteristics  
Typical values are at VCC=3.3V and TA= +25°C.  
TA=-40 to+85°C  
Symbol  
Parameter  
Conditions  
VCC  
Units Figure  
Min.  
Typ.  
Max.  
Turn On Time  
S to Bus A  
Bn=2V  
4.8  
7.0  
Figure 12,  
ns  
tON  
3.0 to 3.6  
Figure 13  
Output Enable  
Time OE to A  
4.5  
2.2  
6.8  
4.0  
Turn Off Time  
S to Bus A  
Bn=2V  
Figure 12,  
ns  
tOFF  
3.0 to 3.6  
Figure 13  
Output Disable  
Time OE to A  
2.2  
3.5  
Figure 6,  
Figure 7  
DG  
DP  
Differential Gain  
3.0 to 3.6  
3.0 to 3.6  
3.0 to 3.6  
3.0 to 3.6  
0.2  
0.1  
-40  
-60  
%
RL=75Ω, f=3.58MHz  
RL=75Ω, f=3.58MHz  
RL=75Ω, f=30MHz  
RL=75Ω, f=30MHz  
Figure 6,  
Figure 7  
Differential Phase  
°
Non-Adjacent  
Off Isolation  
Figure 8,  
dB  
OIRR  
XTALK  
Figure 14  
Non-Adjacent  
Channel Crosstalk  
Figure 9,  
dB  
Figure 15  
1.1  
800  
650  
600  
GHz  
RL=50Ω (DQFN)  
RL=50Ω (QSOP/TSSOP)  
RL=75Ω (DQFN)  
Figure 5,  
Figure 16  
BW  
-3dB Bandwidth  
3.0 to 3.6  
MHz  
RL=75Ω (QSOP/TSSOP)  
Capacitance  
Typical values are at VCC= 3.3V and TA=+25°C.  
Symbol  
CIN  
Parameter  
Control Pin Input Capacitance  
A/B On Capacitance  
Conditions  
Typ.  
Units  
pF  
VCC=0V  
2.5  
12.0  
4.0  
CON  
VCC=3.3V, /OE=0V  
VCC= /OE=3.3V  
pF  
COFF  
Port B Off Capacitance  
pF  
© 2004 Fairchild Semiconductor Corporation  
FSAV430 • Rev. 1.0.2  
www.fairchildsemi.com  
4
AC Characteristics  
Figure 5. Gain vs. Frequency  
Figure 6. Differential Gain vs. DC bias  
Figure 7. Differential Phase vs. DC bias  
Figure 8. Off Isolation  
© 2004 Fairchild Semiconductor Corporation  
FSAV430 • Rev. 1.0.2  
www.fairchildsemi.com  
5
AC Characteristics  
Figure 9. Off Crosstalk vs. Frequency  
RON Switch Characteristics  
Figure 10. RON Switch On Resistance, ION=13mA, VCC=3.0V  
Figure 11.  
RON Switch On Resistance, ION=26mA, VCC=3.0V  
© 2004 Fairchild Semiconductor Corporation  
FSAV430 • Rev. 1.0.2  
www.fairchildsemi.com  
6
AC Loadings and Waveforms  
Notes:  
5. Input drive by 50Ω source terminated in 50Ω.  
6. CL includes load and stray capacitance.  
7. Input PRR=1.0MHz, tW=500ns.  
Figure 12. AC Test Circuit  
Figure 13. AC Waveforms  
Figure 14. Off Isolation Test  
Figure 15. Crosstalk  
Figure 16. Bandwidth  
© 2004 Fairchild Semiconductor Corporation  
FSAV430 • Rev. 1.0.2  
www.fairchildsemi.com  
7
Physical Dimensions  
Figure 17. 16-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify  
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically  
the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:  
http://www.fairchildsemi.com/ms/MS/MS-522.pdf.  
© 2004 Fairchild Semiconductor Corporation  
FSAV430 • Rev. 1.0.2  
www.fairchildsemi.com  
8
Physical Dimensions (Continued)  
LAND PATTERN  
TOP VIEW  
RECOMMENDATION  
END VIEW  
SIDE VIEW  
DETAIL A  
Figure 18. 16-Lead, Quarter Size Outline Package (QSOP)  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify  
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically  
the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:  
http://www.fairchildsemi.com/products/analog/pdf/qsop16_tr.pdf.  
© 2004 Fairchild Semiconductor Corporation  
FSAV430 • Rev. 1.0.2  
www.fairchildsemi.com  
9
Physical Dimensions (Continued)  
5.00±0.10  
4.55  
5.90  
4.45 7.35  
0.65  
4.4±0.1  
1.45  
5.00  
0.11  
12°  
MTC16rev4  
Figure 19. 16-Lead, Thin Shrink Small Outline Package (TSSOP)  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify  
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically  
the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging.  
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:  
http://www.fairchildsemi.com/products/analog/pdf/tssop16_tr.pdf.  
© 2004 Fairchild Semiconductor Corporation  
FSAV430 • Rev. 1.0.2  
www.fairchildsemi.com  
10  
© 2004 Fairchild Semiconductor Corporation  
FSAV430 • Rev. 1.0.2  
www.fairchildsemi.com  
11  

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