CS5201-3GT3 [ROCHESTER]
暂无描述;
Rochester Electronics 
CS5201−3
1.0 A, 3.3 V Fixed Linear
Regulator
The CS5201−3 linear regulator provides 1.0 A @ 3.3 V reference at
1.0 A with an output voltage accuracy of ±1.5%.
This regulator is intended for use as a post regulator and
microprocessor supply. The fast loop response and low dropout
voltage make this regulator ideal for applications where low voltage
operation and good transient response are important.
The circuit is designed to operate with dropout voltages less than 1.2 V
at 1.0 A output current.
http://onsemi.com
The maximum quiescent current is only 10 mA at full load. Device
protection includes overcurrent and thermal shutdown.
The CS5201−3 is pin compatible with the LT1086 family of linear
regulators.
The regulator is available in TO−220−3, surface mount D , and
SOT−223 packages.
TO−220−3
T SUFFIX
CASE 221A
2
1
3
2
Tab = V
OUT
3
Pin 1. GND
2
2. V
D PAK−3
OUT
3. V
DP SUFFIX
CASE 418AB
IN
Features
• Pb−Free Package is Available
• Output Current to 1.0 A
1
2
• Output Accuracy to ±1.5% Overtemperature
• Dropout Voltage (typical) 1.0 V @ 1.0 A
• Fast Transient Response
SOT−223
ST SUFFIX
CASE 318E
1
2
3
• Fault Protection
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
♦ Current Limit
♦ Thermal Shutdown
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 6 of this data sheet.
V
V
OUT
IN
3.3 V @ 1.0 A
CS5201−3
GND
10 mF
22 mF
5.0 V
5.0 V
Figure 1. Applications Diagram
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
September, 2006 − Rev. 8
CS5201−3/D
CS5201−3
MAXIMUM RATINGS
Parameter
Value
7.0
Unit
V
Supply Voltage, V
IN
Operating Temperature Range
Junction Temperature
−40 to +70
150
°C
°C
°C
Storage Temperature Range
Lead Temperature Soldering:
−60 to +150
Wave Solder (through hole styles only) (Note 1)
Reflow (SMD styles only) (Note 2)
260 Peak
230 Peak
°C
°C
ESD Damage Threshold (Human Body Model)
2.0
kV
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. 10 second maximum.
2. 60 second maximum above 183°C.
ELECTRICAL CHARACTERISTICS (C = 10 mF, C
= 22 mF Tantalum, V
+ V
< V < 7.0 V, 0°C ≤ T ≤ 70°C,
IN
OUT
OUT
DROPOUT
IN
A
T ≤ +150°C, unless otherwise specified, I
J
= 1.0 A)
full load
Characteristic
Fixed Output Voltage
Test Conditions
Min
Typ
Max
Unit
Reference Voltage (Notes 3 and 4)
V
− V
= 1.5 V;
3.250
3.300
3.350
V
IN
OUT
0 ≤ I
≤ 1.0 A
(−1.5%)
(+1.5%)
OUT
Line Regulation
2.0 V ≤ V − V
≤ 3.7 V; I = 10 mA
OUT
−
−
0.02
0.04
1.0
0.20
0.4
1.2
−
%
%
IN
OUT
Load Regulation (Notes 3 and 4)
Dropout Voltage (Note 5)
Current Limit
V
− V
= 2.0 V; 10 mA ≤ I
≤ 1.0 A
IN
OUT
OUT
I
= 1.0 A
−
V
OUT
V
− V
= 3.0 V
1.0
−
3.1
A
IN
OUT
Quiescent Current
I
= 10 mA
5.0
10
mA
%/W
dB
OUT
Thermal Regulation (Note 6)
Ripple Rejection (Note 6)
30 ms Pulse, T = 25°C
−
0.002
80
0.020
−
A
f = 120 Hz; I
= 1.0 A; V − V = 3.0 V;
OUT
−
OUT
IN
V
= 1.0 V
RIPPLE
PP
Thermal Shutdown (Note 7)
−
−
150
180
25
210
°C
°C
Thermal Shutdown Hysteresis (Note 7)
−
−
3. Load regulation and output voltage are measured at a constant junction temperature by low duty cycle pulse testing. Changes in output
voltage due to temperature changes must be taken into account separately.
4. Specifications apply for an external Kelvin sense connection at a point on the output pin 1/4” from the bottom of the package.
5. Dropout voltage is a measurement of the minimum input/output differential at full load.
6. Guaranteed by design, not 100% tested in production.
7. Thermal shutdown is 100% functionally tested in production.
PACKAGE PIN DESCRIPTION
Package Pin Number
2
TO−220−3 D PAK−3 SOT−223
Pin Symbol
Function
1
2
3
1
2
3
1
2
3
GND
Ground connection.
V
Regulated output voltage (case).
Input voltage.
OUT
V
IN
http://onsemi.com
2
CS5201−3
V
OUT
V
IN
Output
Current
Limit
Thermal
Shutdown
−
+
Error
Amplifier
Bandgap
Reference
GND
Figure 2. Block Diagram
TYPICAL PERFORMANCE CHARACTERISTICS
1.00
0.95
0.90
0.85
0.10
0.08
0.06
T
= 0°C
CASE
T
= 25°C
0.04
0.02
CASE
0.00
−0.02
−0.04
−0.06
−0.08
−0.10
−0.12
T
CASE
= 125°C
0.80
0.75
0
200
400
600
(mA)
800
1000
0
10 20 30 40 50 60 70 80 90 100 110 120 130
I
T (°C)
J
OUT
Figure 3. Dropout Voltage vs. Output
Current
Figure 4. Reference Voltage vs.
Temperature
0.100
0.075
0.050
0.025
0.000
85
75
65
55
45
35
25
15
T
= 25°C
= 1.0 A
CASE
I
OUT
(V − V ) = 3.0 V
V
T
= 25°C
IN
OUT
CASE
= 1.0 V
PP
RIPPLE
T
CASE
= 125°C
T
= 0°C
CASE
1
2
3
4
5
6
0
1
2
10
10
10
10
10
10
Output Current (A)
Frequency (Hz)
Figure 5. Load Regulation vs. Output
Current
Figure 6. Ripple Rejection vs. Frequency
http://onsemi.com
3
CS5201−3
3.5
300
200
100
0
3.3
3.1
2.9
2.7
2.5
2.3
2.1
1.9
−100
−200
1000
500
0
1.7
1.5
0
1
2
3
4
5
6
7
8
9
10
1.0
1.5
2.0
2.5
− V
3.0
3.5
4.0
Time (mS)
= C = 22 mF Tantalum
V
(V)
IN
OUT
C
OUT
IN
Figure 7. Transient Response
Figure 8. Short Circuit Current vs.
IN − VOUT
V
APPLICATIONS INFORMATION
The CS5201−3 linear regulator provides a fixed 3.3 V
output voltage at currents up to 1.0 A. The regulator is
protected against overcurrent conditions and includes
thermal shutdown.
ceramic capacitors in parallel. This reduces the overall ESR
and reduces the instantaneous output voltage drop under
transient load conditions. The output capacitor network
should be as close to the load as possible for the best results.
The CS5201−3 has a composite PNP−NPN output
transistor and requires an output capacitor for stability. A
detailed procedure for selecting this capacitor is included in
the Stability Considerations section.
Protection Diodes
When large external capacitors are used with a linear
regulator it is sometimes necessary to add protection diodes.
If the input voltage of the regulator gets shorted, the output
capacitor will discharge into the output of the regulator. The
discharge current depends on the value of the capacitor, the
Stability Considerations
The output compensation capacitor helps determine three
main characteristics of a linear regulator: startup delay, load
transient response, and loop stability.
output voltage and the rate at which V drops. In the
IN
CS5201−3 linear regulator, the discharge path is through a
large junction and protection diodes are not usually needed.
If the regulator is used with large values of output
capacitance and the input voltage is instantaneously shorted
to ground, damage can occur. In this case, a diode connected
as shown in Figure 9 is recommended.
The capacitor value and type is based on cost, availability,
size and temperature constraints. A tantalum or aluminum
electrolytic capacitor is best, since a film or ceramic
capacitor with almost zero ESR can cause instability. The
aluminum electrolytic capacitor is the least expensive
solution. However, when the circuit operates at low
temperatures, both the value and ESR of the capacitor will
vary considerably. The capacitor manufacturer’s data sheet
provides this information.
IN4002 (Optional)
V
V
IN
OUT
V
V
OUT
IN
A 22 mF tantalum capacitor will work for most
applications, but with high current regulators such as the
CS5201−3 the transient response and stability improve with
higher values of capacitance. The majority of applications
for this regulator involve large changes in load current so the
output capacitor must supply the instantaneous load current.
The ESR of the output capacitor causes an immediate drop
in output voltage given by:
CS5201−3
C
1
C
2
GND
Figure 9. Protection Diode Scheme for Large
Output Capacitors
DV + DI ESR
For microprocessor applications it is customary to use an
output capacitor network consisting of several tantalum and
http://onsemi.com
4
CS5201−3
Output Voltage Sensing
The maximum power dissipation for a regulator is:
Since the CS5201−3 is a three terminal regulator, it is not
possible to provide true remote load sensing. Load
regulation is limited by the resistance of the conductors
connecting the regulator to the load. For best results the
regulator should be connected as shown in Figure 10.
{
}
I
P
+ V
* V
) V
I
D(max)
IN(max)
OUT(min) OUT(max)
IN(max) Q
(2)
where:
V
V
is the maximum input voltage,
IN(max)
OUT(min)
OUT(max)
Conductor Parasitic
Resistance
is the minimum output voltage,
R
C
I
is the maximum output current, for the
V
V
V
OUT
IN
IN
application
CS5201−3
I is the maximum quiescent current at I
.
OUT(max)
Q
R
LOAD
A heatsink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment has a thermal resistance. Like series
electrical resistances, these resistances are summed to
Figure 10. Conductor Parasitic Resistance Effects
Can Be Minimized With the Above Grounding
Scheme For Fixed Output Regulators
determine R , the total thermal resistance between the
qJA
junction and the surrounding air.
1. Thermal Resistance of the junction−to−case, R
(°C/W)
qJC
Calculating Power Dissipation and Heatsink
Requirements
2. Thermal Resistance of the case to heatsink, R
qCS
The CS5201−3 linear regulator includes thermal
shutdown and current limit circuitry to protect the device.
High power regulators such as these usually operate at high
junction temperatures so it is important to calculate the
power dissipation and junction temperatures accurately to
ensure that an adequate heatsink is used.
(°C/W)
3. Thermal Resistance of the heatsink to the ambient air,
(°C/W)
R
qSA
These are connected by the equation:
(3)
R
qJA
+ R
qJC
) R ) R
qCS qSA
The case is connected to V
on the CS5201−3,
OUT
electrical isolation may be required for some applications.
Thermal compound should always be used with high current
regulators such as these.
The thermal characteristics of an IC depend on the
following four factors:
The value for R
result can be substituted in equation (1).
The value for R is 3.5°C/W for a given package type
based on an average die size. For a high current regulator
such as the CS5201−3 the majority of the heat is generated
in the power transistor section. The value for R
on the heatsink type, while R
package type, heatsink interface (is an insulator and thermal
grease used?), and the contact area between the heatsink and
the package. Once these calculations are complete, the
is calculated using equation (3) and the
qJA
qJC
1. Maximum Ambient Temperature T (°C)
A
depends
qSA
2. Power dissipation P (Watts)
D
depends on factors such as
qCS
3. Maximum junction temperature T (°C)
J
4. Thermal resistance junction to ambient R
(°C/W)
qJA
These four are related by the equation
maximum permissible value of R
can be calculated and
qJA
the proper heatsink selected. For further discussion on
heatsink selection, see application note “Thermal
Management,” document number AND8036/D, available
through the Literature Distribution Center or via our website
at http://onsemi.com.
T + T ) P R
qJA
(1)
J
A
D
The maximum ambient temperature and the power
dissipation are determined by the design while the
maximum junction temperature and the thermal resistance
depend on the manufacturer and the package type.
http://onsemi.com
5
CS5201−3
ORDERING INFORMATION
Device
†
Type*
Package
Shipping
CS5201−3GT3
1.0 A, 3.3 V Output
1.0 A, 3.3 V Output
1.0 A, 3.3 V Output
1.0 A, 3.3 V Output
TO−220−3, STRAIGHT
50 Units / Rail
50 Units / Rail
2
CS5201−3GDP3
CS5201−3GDPR3
CS5201−3GDPR3G
D PAK−3
2
D PAK−3
750 / Tape & Reel
750 / Tape & Reel
2
D PAK−3
(Pb−Free)
SOT−223
SOT−223
CS5201−3GST3
CS5201−3GSTR3
1.0 A, 3.3 V Output
1.0 A, 3.3 V Output
80 Units / Rail
2500 / Tape & Reel
*Consult your local sales representative for other fixed output voltage versions.
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MARKING DIAGRAMS
2
TO−220−3
T SUFFIX
CASE 221A
D PAK−3
DP SUFFIX
CASE 418AB
SOT−223
ST SUFFIX
CASE 318E
CS
5201−3
ALYW
201−3
AWLYWW
CS
5201−3
AWLYWW
1
1
1
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
PACKAGE THERMAL DATA
2
TO−220
THREE LEAD
D PAK
3−PIN
Parameter
SOT−223
Unit
°C/W
°C/W
R
R
Typical
Typical
3.5
50
3.5
15
q
JC
JA
10−50*
156
q
* Depending on thermal properties of substrate. R
= R
+ R
q q
JC CA
q
JA
http://onsemi.com
6
CS5201−3
PACKAGE DIMENSIONS
TO−220
THREE LEAD
T SUFFIX
CASE 221A−08
ISSUE AA
NOTES:
SEATING
PLANE
−T−
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
F
−B−
C
T
INCHES
DIM MIN MAX
MILLIMETERS
S
MIN
14.23
9.66
3.56
0.64
3.53
MAX
15.87
10.66
4.82
A
B
C
D
F
0.560
0.380
0.140
0.025
0.139
0.625
0.420
0.190
0.035
0.155
4
Q
A
K
0.89
3.93
1
2
3
U
G
H
J
0.100 BSC
−−− 0.280
2.54 BSC
−−−
0.31
7.11
1.14
H
L
0.012
0.500
0.045
0.045
0.580
0.060
−Y−
K
L
12.70
1.15
14.73
1.52
N
Q
R
S
T
0.200 BSC
5.08 BSC
0.100
0.080
0.020
0.235
0.000
0.045
0.135
0.115
0.055
0.255
0.050
−−−
2.54
2.04
0.51
5.97
0.00
1.15
3.42
2.92
1.39
6.47
1.27
−−−
R
J
V
G
U
V
D 3 PL
M
M
0.25 (0.010)
B
Y
N
D2PAK−3
DP SUFFIX
CASE 418AB−01
ISSUE O
For D2PAK Outline and
Dimensions − Contact Factory
http://onsemi.com
7
CS5201−3
PACKAGE DIMENSIONS
SOT−223
ST SUFFIX
CASE 318E−04
ISSUE K
NOTES:
A
F
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
INCHES
DIM MIN MAX
MILLIMETERS
MIN
6.30
3.30
1.50
0.60
2.90
2.20
MAX
6.70
3.70
1.75
0.89
3.20
2.40
0.100
0.35
2.00
1.05
10
4
2
A
B
C
D
F
0.249
0.130
0.060
0.024
0.115
0.087
0.263
0.145
0.068
0.035
0.126
0.094
S
B
1
3
G
H
J
0.0008 0.0040 0.020
D
0.009
0.060
0.033
0
0.014
0.078
0.041
10
0.24
1.50
0.85
0
K
L
L
G
M
S
J
_
_
_
_
0.264
0.287
6.70
7.30
C
0.08 (0003)
M
H
K
SOLDERING FOOTPRINT*
3.8
0.15
2.0
0.079
6.3
0.248
2.3
0.091
2.3
0.091
2.0
0.079
mm
inches
ǒ
Ǔ
1.5
0.059
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
CS5201−3/D
相关型号：
©2020 ICPDF网 联系我们和版权申明