RT8809B [RICHTEK]
暂无描述;![RT8809B](http://pdffile.icpdf.com/pdf2/p00306/img/icpdf/RT8809B_1845476_icpdf.jpg)
型号: | RT8809B |
厂家: | ![]() |
描述: | 暂无描述 |
文件: | 总19页 (文件大小:287K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
![](http://public.icpdf.com/style/img/ads.jpg)
®
RT8809A/B
Multi-Phase PWM Controller for GPU Core Power Supply
General Description
Features
Dual-Phase PWM Controller
The RT8809A/B is a dual-phase synchronous buck PWM
controller with integrated drivers which are optimized for
high performance graphic microprocessor and computer
applications. The IC integrates a G-NAVPTM PWM
controller, two 12V MOSFET drivers with internal bootstrap
diodes, as well as output current monitoring and protection
functions into the WQFN-24L 4x4 package. The
RT8809A/B adoptsDCR and RDS(ON) current sensing. Load
line voltage positioning (droop) and over current protection
are accomplished through continuous inductorDCR current
sensing, while RDS(ON) current sensing is used for accurate
channel current balance. Using both methods of current
sampling utilizes the best advantages of each technique.
The RT8809A/B also features a one-bit VID control
operation in which the feedback voltage is regulated and
tracks external input reference voltage. Other features
include, adjustable operating frequency, external
compensation, and enable/shutdown functions.
Two Embedded MOSFET Drivers and Embedded
Switching Boot Diode
Green-NAVPTM (Green Native Adaptive Voltage
Positioning) Topology
Dynamic Auto Phase Control with Programmable
Threshold
Cross-talk Jitter Suspend (CJSTM)
Remote GND Detection for High Accuracy
Automatic Diode Emulation Mode/Or Ultrasonic
Mode at Light Load
Lossless RDS(ON) Current Sensing for Current Balance
Lossless DCR Current Sensing for AVP & OCP
Reference Voltage Output with 1% Accuracy
External Reference Input with Soft-Start (RISS)
Embedded One-Bit VID Control
Programmable OCP Threshold
Programmable Switching Frequency
Reference Tracking UVP/OVP Protection
Shoot Through Protection and Short Pulse Free
Technology
Applications
Middle to High End GPU Core Power
High End Desktop PC Memory Core Power
Low Voltage, High CurrentDC/DC Converter
Voltage Regulator Modules
RoHS Compliant and Halogen Free
Pin Configurations
(TOP VIEW)
Ordering Information
RT8809A/B
Package Type
QW : WQFN-24L 4x4 (W-Type)
24 23 22 21 20 19
1
2
3
4
5
6
18
17
16
15
14
13
VSET
VREF
EN/MSEL
RMPSET
COMP
VCC
VDD
LGATE1
PHASE1
UGATE1
BOOT1
Lead Plating System
G : Green (Halogen Free and Pb Free)
Z : ECO (Ecological Element with
Halogen Free and Pb free)
PGND
25
FB
A : With Droop Function
7
8
9 10 11 12
B : Without Droop Function
Note :
Richtek products are :
WQFN-24L 4x4
RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS8809A/B-03 January 2016
www.richtek.com
1
RT8809A/B
Marking Information
RT8809AGQW
RT8809BGQW
07= : Product Code
08= : Product Code
YMDNN : Date Code
YMDNN : Date Code
07=YM
08=YM
DNN
DNN
RT8809AZQW
RT8809BZQW
07 : Product Code
08 : Product Code
YMDNN : Date Code
YMDNN : Date Code
07 YM
08 YM
DNN
DNN
Typical Application Circuit
V
IN
RT8809A/B
12V
R3 1
C9
0.1µF
Q1
17
2
18
VDD
VCC
C8
C6
C7
10µF/16V x 5
10µF
10µF
C4
Optional
R6 0
13
14
BOOT1
VREF
UGATE1
R18
11k
C5
1.2nF
L1
R5 0
15
V
OUT
1
PHASE1
VSET
RSET
1.1V
0.36µH
/0.8m
VRTN
Q2
R7
NC
C12
NC
16
23
LGATE1
VID
C
C
11
10
820µF
/2.5V
R19
15k
24
10µF
x
4
/6.3V x 10
R4
Option
GPIO
R10
9.1k
al
C14
0.1µF
Q3
V
IN
R21 43k
R9 0
C13
9
22
21
OCP
BOOT2
10µF
/16V x 5
L2
UGATE2
R22 56k
0.36µH/0.8m
12
4
R8 0
PS
20
19
PHASE2
LGATE2
Q4
R16 160k
R11
9.1k
R13 NC
R12
NC
RMPSET
C15
NC
R20 160k
8
3
V
TON
C3 0.1µF
IN
11
10
CSP
CSN
R1
7 100
C2
1.5nF
C1
2.2nF
EN/MODE
EN/MSEL
R15
100
R14
100
5
COMP
V
CC_SNS
R2
R1
2k
pad)
25 (Exposed
PGND
3.9k
6
7
FB
VRTN
V
SS_SNS
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
2
DS8809A/B-03 January 2016
RT8809A/B
Functional Pin Description
Pin No.
Pin Name
Pin Function
Output Voltage Setting. Connect a voltage divider from VREF to VSET to set the
output voltage.
1
VSET
Reference Voltage Output (2V). RT8809A/B generates a 2V reference voltage from
VREF pin to VRTN.
2
3
4
VREF
Chip Enable and Mode Selection. This pin is a tri-state input. Pull up this pin to
exceed than 4.2V, controller operation into DEM mode. Pull up this pin to between
1.2V to 3V, controller operation into ASM mode. Pull down this pin to GND,
controller will shutdown.
EN/MSEL
RMPSET
Internal Ramp Slew Rate Setting. Connect a resistor (R
) from RMPSET to GND
RMP
to the ramp slew rate. The value of R
must be set equal to R
.
RMP
TON
5
6
COMP
FB
Compensation Pin. This pin is the output node of the error amplifier.
Feedback Pin. This pin is the negative input node of the error amplifier.
Remote Differential Feedback, Invert Input. This pin is the negative node of the
differential remote voltage sensing.
7
8
9
VRTN
TON
On Time (Switching Frequency) Setting. Connect a resistor (R
) from TON to
TON
VIN to set the switching frequency. The value of R
must be set equal to R
.
RMP
TON
OCP Level Setting. Connect a resistor from OCP to GND to set the current limit
threshold.
OCP
10
11
CSN
CSP
This pin is negative input of current sensing.
This pin is positive input of current sensing.
Dynamic Phase Control Input. Connect a resistor from PS to GND to set the auto
down phase threshold.
12
13
14
PS
BOOT1
UGATE1
Bootstrap Power Pin of PHASE1. This pin powers the high side MOSFET driver.
Upper Gate Driver of PHASE1. This pin provides the gate drive for the converter's
high side MOSFET. Connect this pin to the high side MOSFET gate.
This pin is return node of the high side driver of PHASE1. Connect this pin to high
side MOSFET sources together with the low side MOSFET drain and the inductor.
15
16
PHASE1
LGATE1
Lower Gate Driver of PHASE1. This pin provides the gate drive for the converter's
low side MOSFET. Connect this pin to the low side MOSFET gate.
Internal Regulator Power. The regulated voltage provides power supply for all low
voltage circuits.
17
18
19
VDD
VCC
Chip/Driver Power Pin. Connect this pin to GND by a ceramic cap larger than 1F.
Lower Gate Driver of PHASE2. This pin provides the gate drive for the converter's
low side MOSFET. Connect this pin to the low side MOSFET gate.
LGATE2
This pin is return node of the high side driver of PHASE2. Connect this pin to high
side MOSFET sources together with the low side MOSFET drain and the inductor.
20
PHASE2
Upper Gate Driver of PHASE2. This pin provides the gate drive for the converter's
high side MOSFET. Connect this pin to the high side MOSFET gate.
21
22
23
UGATE2
BOOT2
VID
Bootstrap Power Pin of PHASE2. This pin powers the high side MOSFET driver.
Programming Output Voltage Control. When VID pin is logic high, internal
N-MOSFET that connected to RSET pin is turn on.
Output Voltage Setting. Connect a resistor from RSET pin to VSET pin, the output
voltage can be switched two level by driving VID pin.
24
RSET
PGND
25
The exposed pad must be soldered to a large PCB and connected to GND for
maximum power dissipation.
(Exposed Pad)
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS8809A/B-03 January 2016
www.richtek.com
3
RT8809A/B
Function Block Diagram
RT8809A (With Droop Function)
VID
RSET
VREF
VCC
Reference
Output Gen.
Internal
Regulator&BG
VDD
Power On Reset
& Central Logic
VSET
UV Trip Point
OV Trip Point
+
-
Control & Protection Logic
+
-
Boot-Phase
Detection 1
Ramp
Gen
RMPSET
Boot-Phase
Detection 2
V
SETA
Soft-Start &
Slew Rate
Control
+
-
BOOT1
UGATE1
PHASE1
VRTN
FB
TON
Gen 1
+
+
-
+
+
PWM
CMP
+
+
+
+
ERROR
AMP
PWM1
LGATE1
LPF
+
Driver
Logic
COMP
+
BOOT2
TON
UGATE2
PHASE2
To Power
on Reset
Gen 2
EN/Mode
Select
To driver Logic
PWM2
ZCD
EN/MSEL
TON
To Power on
Reset
PHASE1 To driver Logic
LGATE2
PGND
V
IN
Detection
-
S/H
S/H
GM
+
5
Current
Balance
-
GM
+
VB
PS
Phase
shedding
+
APS
1/2
+
+
+
-
CSP
CSN
OCP
AOC
sum
I
To Protection Logic
OCP
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
4
DS8809A/B-03 January 2016
RT8809A/B
RT8809B (Without Droop Function)
VID
RSET
VREF
VCC
Reference
Output Gen.
Internal
Regulator&BG
VDD
Power On Reset
& Central Logic
VSET
UV Trip Point
OV Trip Point
+
-
Control & Protection Logic
+
-
Boot-Phase
Detection 1
Ramp
Gen
RMPSET
Boot-Phase
Detection 2
V
SETA
Soft-Start
+
-
BOOT1
UGATE1
PHASE1
VRTN
FB
TON
Gen 1
+
-
+
PWM
CMP
+
+
+
ERROR
AMP
PWM1
LGATE1
LPF
+
Driver
Logic
COMP
+
BOOT2
UGATE2
PHASE2
TON
Gen 2
To Power
on Reset
EN/Mode
Select
To driver Logic
To Power on
Reset
PWM2
ZCD
EN/MSEL
TON
PHASE1 To driver Logic
LGATE2
PGND
V
IN
Detection
-
S/H
S/H
GM
+
Current
Balance
-
GM
+
PS
Phase
shedding
+
APS
1/2
+
+
+
-
CSP
CSN
OCP
AOC
sum
I
To Protection Logic
OCP
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS8809A/B-03 January 2016
www.richtek.com
5
RT8809A/B
Absolute Maximum Ratings (Note 1)
VDD, VSEN, COMP, VSET, VREF, EN/MSEL, PS, OCP, CSN,
CSP, RSET, VID, RMPSET to PGND------------------------------------------------------------ −0.3V to 6V
VCC, TON to PGND --------------------------------------------------------------------------------- −0.3V to 15V
VRTNto PGND ---------------------------------------------------------------------------------------- −0.3V to 0.3V
BOOTx to PHASEx ---------------------------------------------------------------------------------- −0.3V to 15V
PHASEx to PGND
DC-------------------------------------------------------------------------------------------------------- −3V to 15V
<20ns --------------------------------------------------------------------------------------------------- −5V to 30V
UGATEx to PHASEx
DC-------------------------------------------------------------------------------------------------------- −0.3V to BOOTx − PHASEx
<20ns --------------------------------------------------------------------------------------------------- −5V to (BOOTx − PHASEx + 5V)
LGATEx to PGND
DC-------------------------------------------------------------------------------------------------------- −0.3V to PVCC+ 0.3V
<20ns --------------------------------------------------------------------------------------------------- −5V to (VCC + 5V)
Power Dissipation, PD @ TA = 25°C
WQFN-24L 4x4 --------------------------------------------------------------------------------------- 1.923W
Package Thermal Resistance (Note 2)
WQFN-24L 4x4, θJA ---------------------------------------------------------------------------------- 52°C/W
WQFN-24L 4x4, θJC --------------------------------------------------------------------------------- 7°C/W
Junction Temperature -------------------------------------------------------------------------------- 150°C
Lead Temperature (Soldering, 10 sec.)---------------------------------------------------------- 260°C
Storage Temperature Range ----------------------------------------------------------------------- −65°C to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Mode) ------------------------------------------------------------------------- 2kV
MM (Machine Mode) --------------------------------------------------------------------------------- 200V
Recommended Operating Conditions (Note 4)
Supply Voltage, VCC --------------------------------------------------------------------------------- 4.5V to 13.2V
Junction Temperature Range----------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range----------------------------------------------------------------------- −40°C to 85°C
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
6
DS8809A/B-03 January 2016
RT8809A/B
Electrical Characteristics
(VCC = 12V, No Load, TA = 25°C, unless otherwise specified)
Parameter
Supply Input
Symbol
Test Conditions
Min
Typ Max Unit
Supply Current
IVCC + IPVCC EN = 3.3V, Not Switching
ICC + IPVCC EN = 0V
--
--
4
--
mA
Shutdown Current
Power On Reset
--
500
A
VCC POR Threshold
VVCC_th
VCC Rising
--
--
4.2
0.4
--
--
V
Power On Reset Hysteresis VVCC_hys
V
Reference
(No Load, Active Mode )
Accuracy
--
2
--
Reference Output
VREF
VSET
V
V
1%
--
1%
VSET pin (this max. voltage will affect
VCOMP max.)
Reference Input Range
0.5
--
2
Start Up Delay
Initial Soft-Start time
tb
tc
Initially, VOUT = 0.1V to 1.2V
VOUT = 1.2V to Set Voltage
--
--
1.5
--
--
ms
Reference Change Delay
Time
Internal VID Change Slew
Rate (RT8809A Only)
300
s
td
--
10
-- mV/s
Error Amplifier
Input Offset Voltage
DC Gain
VOSEA
8
--
--
8
--
--
mV
dB
RL = 47k
80
10
Gain Bandwidth Product
GBW
SR
CLOAD = 5pF
--
MHz
CLOAD = 10pF (Gain = 4,
Rf = 47k, VOUT = 0.5V to 3V)
Slew Rate
--
5
--
V/s
Output Voltage Range
MAX Source Current
VCOMP
IOUTEA
RL = 47k (max. depend on VSET max.) 0.5
--
2
V
VCOMP = 2V
--
250
--
A
Current Sense Amplifier (for Droop and OCP and Phase Shedding)
Input Offset Voltage
VOSCS
RCSN
RCSP
1
1
--
--
--
5
1
--
mV
M
M
Impedance at Neg. Input
Impedance at Pos Input
1
--
RT8809A
DC Gain
--
--
V/V
mV
RT8809B
--
0
--
Input range
VCSP VCSN
50
--
100
TON Setting
TON Pin Output Voltage
ON-Time Setting
VTON
TON
IRTON = 62A
IRTON = 62A
--
--
VSET --
V
350
--
ns
TON Input Current Range
IRTON
25
--
280
A
Protection
Under Voltage Lockout
Threshold
VUVLO
Falling edge
--
3.8
--
V
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS8809A/B-03 January 2016
www.richtek.com
7
RT8809A/B
Parameter
Symbol
Test Conditions
Min
2.1
2.6
Typ Max Unit
Absolute Over
Voltage Protection
Threshold
RT8809A/BGQW
RT8809A/BZQW
2.2
2.9
--
--
VOVABS With Respect to VOUT(MAX)
V
Relative Over Voltage Protection
Threshold
VREL_OV With Respect to VOUT
Measured at VSENS with Respect
--
--
138
--
--
%
%
Under Voltage Protection Threshold VUV
50%
to Unloaded Output Voltage (UOV)
Negative Voltage Protection
Threshold
VNV
50
--
8
--
mV
Current Source by OCP Pin
Logic Inputs
IOCP
7.2
8.8
A
EN Threshold Voltage
VIL
Low Level (SD) (Hysteresis)
ASM Mode
--
--
--
--
--
0.5
3
V
V
1.2
4.2
1
EN Pin Mode Select Voltage
DEM Mode
--
Leakage Current of EN
Auto Phase Control
Current Source by PSI Pin
Maximum Duty Cycle
UGATE Min. Off Time
Gate Driver
5
A
IPS
--
--
8
--
--
A
500
ns
Upper Driver Source
IUGATEsr VBOOTx VPHASEx = 6V
--
--
1.2
2
--
--
A
VUGATEx VPHASEx = 0.1V,
Upper Driver Sink
RUGATEsk
IUGATEx = 50Ma
Lower Driver Source
Lower Driver Sink
ILGATEsr VCC VLGATEx = 6V
--
--
1.2
1.4
--
--
A
RLGATEsk VLGATEx = 0.1V, ILGATEx = 50mA
Internal Boost Charging Switch
On-Resistance
RBOOT
PVCC to BOOTx
--
20
--
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
8
DS8809A/B-03 January 2016
RT8809A/B
Typical Operating Characteristics
Efficiency vs. Load Current
Efficiency vs. Load Current
100
100
90
80
70
60
50
40
30
20
10
0
90
80
Phase 2 Active
70
60
50
40
30
20
10
VIN = VCC = 12V, VOUT = 1.1V
10
VIN = VCC = 12V, VOUT = 1.1V
0
0
5
10 15 20 25 30 35 40 45 50 55 60
Load Current (A)
0.01
0.1
1
Load Current (A)
TON vs. Temperature
VREF vs. Temperature
360
355
350
345
340
335
330
325
320
315
2.04
2.03
2.02
2.01
2.00
1.99
1.98
1.97
1.96
VIN = VCC = 12V, No Load
VIN = VCC = 12V, No Load
50 75 100 125
-50
-25
0
25
50
75
100
125
-50
-25
0
25
Temperature (°C)
Temperature (°C)
Inductor Current vs. Output Current
Power On from EN
35
30
25
20
15
10
5
RT8809A, VIN = VCC = 12V, IOUT = 50A
VEN
(10V/Div)
Phase 1
Phase 2
VOUT
(1V/Div)
UGATE1
(50V/Div)
UGATE2
(50V/Div)
VIN = VCC = 12V
45 50 55 60
0
20
25
30
35
40
Time (1ms/Div)
Output Current (A)
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS8809A/B-03 January 2016
www.richtek.com
9
RT8809A/B
Power On from EN
Power Off from EN
RT8809B, VIN = VCC = 12V, IOUT = 50A
VIN = VCC = 12V, IOUT = 50A
VEN
VEN
(10V/Div)
(10V/Div)
VOUT
VOUT
(1V/Div)
(1V/Div)
UGATE1
(50V/Div)
UGATE1
(50V/Div)
UGATE2
(50V/Div)
UGATE2
(50V/Div)
Time (1ms/Div)
Time (1ms/Div)
Power On from VCC
Power On from VCC
RT8809A, VIN = VCC = 12V, IOUT = 50A
RT8809B, VIN = VCC = 12V, IOUT = 50A
VCC
VCC
(10V/Div)
(10V/Div)
VOUT
VOUT
(1V/Div)
(1V/Div)
UGATE1
(50V/Div)
UGATE1
(50V/Div)
UGATE2
(50V/Div)
UGATE2
(50V/Div)
Time (1ms/Div)
Time (1ms/Div)
Power Off from VCC
Dynamic Output Voltage Control
RT8809A, VSET = 0.78V to 1.15V, IOUT = 40A
VIN = VCC = 12V, IOUT = 50A
VSET
(1V/Div)
VCC
(10V/Div)
VOUT
(1V/Div)
VOUT
(1V/Div)
UGATE1
(50V/Div)
UGATE1
(50V/Div)
UGATE2
(50V/Div)
UGATE2
(50V/Div)
Time (1ms/Div)
Time (40μs/Div)
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
10
DS8809A/B-03 January 2016
RT8809A/B
Dynamic Output Voltage Control
Dynamic Output Voltage Control
RT8809B, VSET = 0.78V to 1.15V, IOUT = 40A
RT8809A, VSET = 1.15V to 0.78V, IOUT = 40A
VSET
(1V/Div)
VSET
(1V/Div)
VOUT
(1V/Div)
VOUT
(1V/Div)
UGATE1
(50V/Div)
UGATE1
(50V/Div)
UGATE2
(50V/Div)
UGATE2
(50V/Div)
Time (200μs/Div)
Time (40μs/Div)
Load Transient Response
Dynamic Output Voltage Control
RT8809A, VIN = VCC = 12V, RLL = 1.5mΩ
RT8809B, VSET = 1.15V to 0.78V, IOUT = 40A
VOUT
(500mV/Div)
VSET
(1V/Div)
VOUT
(1V/Div)
IOUT
(50A/Div)
UGATE1
(50V/Div)
UGATE1
(50V/Div)
UGATE2
(50V/Div)
UGATE2
(50V/Div)
Time (10μs/Div)
Time (200μs/Div)
Load Transient Response
Load Transient Response
RT8809B, VIN = VCC = 12V
RT8809A, VIN = VCC = 12V, RLL = 1.5mΩ
VOUT
(500mV/Div)
VOUT
(500mV/Div)
IOUT
(50A/Div)
IOUT
(50A/Div)
UGATE1
(50V/Div)
UGATE1
(50V/Div)
UGATE2
(50V/Div)
UGATE2
(50V/Div)
Time (10μs/Div)
Time (10μs/Div)
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS8809A/B-03 January 2016
www.richtek.com
11
RT8809A/B
OVP
Load Transient Response
VIN = VCC = 12V, IOUT = 25A
RT8809B, VIN = VCC = 12V
VOUT
(500mV/Div)
VOUT
(1V/Div)
IOUT
(50A/Div)
UGATE1
(20V/Div)
UGATE1
(50V/Div)
LGATE1
(10V/Div)
UGATE2
(50V/Div)
Time (20μs/Div)
Time (10μs/Div)
UVP
Short Circuit
VIN = VCC = 12V
VIN = VCC = 12V, IOUT = 50A
VOUT
(1V/Div)
VOUT
(1V/Div)
IL1
(20A/Div)
UGATE1
(20V/Div)
IL2
LGATE1
(20A/Div)
(10V/Div)
Time (10μs/Div)
Time (10ms/Div)
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
12
DS8809A/B-03 January 2016
RT8809A/B
Application Information
Finally, if the pin is pulled to GND the RT8809A/B will
shutdown.
RT8809A/B is a dual-phase synchronous buck PWM
controller with integrated drivers which is optimized for
high-performance graphic microprocessor and computer
applications. ACOT (Constant-On-Time) PWM controller
and two 12V MOSFET drivers with internal bootstrap
diodes are integrated so that the external circuit is easily
designed and the component count is reduced.
Power On Reset
The POR (power on reset) circuit monitors the supply
voltage of the controller (VCC). When VCC exceeds the
POR rising threshold, the controller will be enable.During
soft-star period, the output voltage will first boot to around
1V, and then change to the set level when using RT8809A.
For RT8809B, output voltage will directly ramp to the set
level. If VCC falls below the POR falling threshold during
normal operation, all MOSFETs stop switching and the
controller resets. The POR rising and falling threshold has
a hysteresis to prevent noise mis-trigger.
RT8809A/B adopts G-NAVPTM (Green-Native Adaptive
Voltage Positioning), which is Richtek's proprietary
topology derived from finite DC gain compensator with
current mode control for RT8809A, the load line can be
easily programmed by setting the DC gain of the error
amplifier for RT8809B, the load line is fixed to zero.
Soft-Start
RT8809A/B also adopts losslessDCR and RDS(ON) current
sensing. Voltage positioning (only for RT8809A), dynamic
phase control and current limit are accomplished through
continuous inductor DCR current sensing, while RDS(ON)
current sensing is used for accurate channel current
balance.
RT8809A/B provides soft-start function. The soft-start
function is used to prevent large inrush current while
converter is being powered-up.An internal current source
charges the internal soft-start capacitor such that the
internal soft-start voltage ramps up in a monotone to a
VBOOT voltage RT8809A or the set level (RT8809B). The
FB voltage will track the internal soft-start voltage during
soft-start interval. Therefore, the duty cycle of the UGATE
signal at power up as well as the input current limited.
During the soft-start period, the controller will be in dual-
phase operation by default to ensure enough charge during
start-up.
RT8809A/B supports dynamic mode transition function
with various operating states, which include dual-phase,
single phase, diode emulation and audio skipping modes.
These different operating states make the system
efficiency as high as possible.
RT8809A/B provides a one-bit VID control operation in
which the feedback voltage is regulated and tracks external
input reference voltage. It also features complete fault
protection functions including over voltage, under voltage
and current limit.
One-Bit VID and Dynamic Output Voltage Control
The output voltage is determined by the applied voltage
on the VSET pin. RT8809A/B generates a 2V reference
voltage from VREF to VRTN. As shown in Figure 1,
connecting a resistor divider from the VREF pin to the
VSET pin can set the output voltage according to below
calculation :
DEM/ASM Mode Selection
DEM (Diode Emulation Mode) and ASM (Audio Skipping
Mode) operation can be enabled by driving the tri-state
EN/MSEL pin to a logic high level. The RT8809A/B can
switch operation into DEM when EN/MSEL pin is pulled
up to above 4.2V. In DEM operation, RT8809A/B
automatically reduces the operation frequency at light load
conditions for saving power loss. If EN/MSEL is pulled
between 1.2V to 3V, the controller will switch operation
into ASM. In ASM operation, the minimum switching
frequency is limited to 30 kHz to avoid the acoustic noise.
R2
R1 R2
VOUT = 2V
RT8809A/B also features a one-bit VIDcontrol through an
internalN-MOSFET also shown in Figure 1. By connect a
resistor (R3) from RSET pin to VSET pin, the output voltage
can be switched between two levels by controlling the
VID pin. When the VID pin is logic high, the internal N-
MOSFET turns on to set the output voltage to a lower
level. The output voltage can be calculated as below :
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS8809A/B-03 January 2016
www.richtek.com
13
RT8809A/B
Where
(R2//R3)
V
= 2V
OUT
R1 (R2//R3)
fS : Switching frequency
RTON : TON setting resistor
One-Bit VID and Dynamic Output Voltage Control
C : Capacitance for on time compute (13.7pF)
VREF : Reference voltage for on time compute
IL : Inductor current
In RT8809A, the dynamic VIDslew rate is fixed to 10mV/
μs. For RT8809B, it can be set lower than 10mV/μs by
CVSET as shown in Figure 1. That is, assume the ΔV
=
OUT
300mV, R1=11kΩ, R2 = R3 = 27kΩ, the desired slew
rate at falling is SRF = 10mV/μs, and the CVSET can be
calculated by below formula.
RDS(ON)_L-MOS : RDS(ON) of Low Side MOSFET
RDS(ON)_H-MOS : RDS(ON) of High Side MOSFET
RDC : DCR of inductor
V
OUT
C
1nF
VSET
5 R1 // R2 // R3 SR
F
RLL : Load line resistance
And then, the rising slew rate SRR will be
The value of RTON can be selected using Figure 3 and the
V
OUT
SR
7.67mV/μS
value of RRMP must be set equal to RTON
.
R
5 R1 // R2 C
VSET
R
TON
R1
C1
TON
V
IN
CCRCOT
On-Time
Computer
VREF REF Generator
(2V)
RMPSET
R1
R2
VSET
R
RMP
On-Time
R3
C
VSET
RSET
VID
Figure 2. On-Time Setting with RC Filter
GPIO
Frequency vs. RTON
700
650
600
550
500
450
400
350
300
250
200
150
Figure 1. Output Voltage Setting with One Bit VID
Control
Adjustable Switching Frequency
Switching frequency is a trade-off between efficiency and
converter size. Higher operation frequency allows the use
of smaller components. This is common in ultra portable
devices where the load currents are lower and the
controller is powered from a lower voltage supply. On the
other, lower frequency operation offers higher overall
efficiency at the expense of component size and board
space. Figure 2 shows the On-Time Setting Circuit.
Connect a resistor (RTON) from TON to VIN and a resistor
(RRMP) from RMPSET to GND to set the switching
frequency according to below formula :
0
50
100
150
200
250
300
R
TON (kΩ)
Figure 3. Frequency vs. RTON
Current Sense Setting (with Temperature
Compensation)
V
IN VSET
The RT8809A/B uses continuous inductor current sensing
to make the controller less noise sensitive. Low offset
amplifiers are used for loop control and over current
detection. The CSP and CSN denote the positive and
RTON
=
fS C VREF
VSET IL (RDS(ON)_L-MOS RDC RLL
IN IL (RDS(ON)_L-MOS RDS(ON)_H-MOS
)
V
)
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
14
DS8809A/B-03 January 2016
RT8809A/B
negative input of the current sense amplifier of any phase.
Since theDCR of the inductor is temperature dependent,
it affects the down phase threshold, OCP threshold and
output voltage accuracy, especially at heavy load.
Temperature compensation is recommended for the
lossless inductor DCR current sense method. Figure 4
shows a simple but effective way to compensate the un-
wanted temperature variations of the inductorDCR by using
anNTC thermistor.
where R25°C is the thermistor's nominal resistance at room
temperature, β (beta) is the thermistor's material constant
in Kelvins, and T is the thermistor's actual temperature in
Celsius.
To calculateDCR value at different temperatures, can use
the equation below :
DCRT°C = DCR25°C x [1 + 0.00393 x ( T − 25) ]
(4)
where the 0.00393 is the temperature coefficient of copper.
CX can be obtained by below formula,
V
OUT
L1
L2
DCR
DCR
PHASE1
PHASE2
R
S
L 2
R
S
R
EQU_25C
C
OUT
(5)
C
=
X
R
NTC
R DCR
S
25C
R
P
R
S
R
X
X
Loop Control
CSP
CSN
C
+
X
-
The RT8809A/B adopts Richtek's proprietaryG-NAVPTM
topology.G-NAVPTM is based on the finite-gain peak current
mode with CCRCOT (Constant Current Ripple Constant
On Time; CCRCOT) topology. For RT8809A, the output
voltage will decrease with increasing output load current.
For RT8809B, the output voltage is independent with output
load current. The control loop consists of PWM
modulators with power stages, current sense amplifiers
and an error amplifier as shown in Figure 5.
V
Figure 4. InductorDCR Sensing
The RT8809A/B observes the voltage VX, across the CSP
and CSN pins for inductor current information. To design
VX without regard to the temperature coefficient, refer to
below formula :
RS
2
V
IN
REQU_TH
RS
DCRTH
DCRTL
V
OUT
(1)
=
UGATE1
PHASE1
LGATE1
2
L1
DCR
DCR
REQU_TL
CCRCOT
PWM
Driver
where REQU_TH is equal to RP + RNTC // RX at high
temperature and REQU_TL is equal to RP + RNTC // RX at low
temperature. Usually, RX is set to equal RNTC (25°C). RP
and RX are selected to linearize the NTC's temperature
characteristic. For a given NTC and RP, the design is to
first obtain RS and then CX. Usually, set RX = RNTC. To
solve (1), RS must first be obtained as below :
V
C
OUT
IN
R
X
Logic
UGATE2
PHASE2
L2
LGATE2
CMP
R
X
V
CS
CSP
RT8809A
+
C
GM
X
-
CSN
RT8809B
C3
C2
R2
C1
R1
VSEN
2(-1)
RS
=
(2)
1
COMP
FB
REQU_TH REQU_TL
+
GM
VRTN
-
Where α is equal toDCRTH/DCRTL
VRTN
V
REF
The standard formula for the resistance of the NTC
thermistor as a function of temperature is given by :
Figure 5. Simplified Schematic for Droop and Remote
Sense in CCM
1
1
T273 278
(3)
R
= R
e
25C
NTC, TC
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS8809A/B-03 January 2016
www.richtek.com
15
RT8809A/B
Similar to the peak current mode control with finite
compensator gain, the HS_FET on-time is determined by
the CCRCOT ON-Time generator. When the load current
increases, VCS increases, the steady state COMP voltage
also increases and VOUT decreases, achieving Active
Voltage Positioning (AVP). RT8809A/B internally cancels
the inherent output offset of the finite gain peak current
mode controller.
to determine the resistive feedback components of the
error amplifier gain, C1 and C2 must be calculated for the
compensation. The target is to achieve the constant
resistive output impedance over the widest possible
frequency range. The pole frequency, fP, of the compensator
must be set to compensate the output capacitor ESR
zero :
1
f
P
=
(8)
2 R C
C
Droop Setting
where C is the capacitance of the output capacitor, and
RC is the ESR of output capacitor. C2 can be calculated
as follows :
Due to the native droop characteristics, theActive Voltage
Positioning (AVP) can be conveniently achieved by
properly setting the error amplifier gain. The target is to
have
RC C
(9)
C2 =
R2
VOUT = VREF − ILOAD x RLL
(6)
The zero of compensator has to be placed at half of the
switching frequency to filter the switching related noise,
Then solving the switching condition VCOMP2 = VCS in
Figure 5 yields the desired error amplifier gain as
such that,
1
5
2
C1 =
(10)
DCR
R1 f
R2
R1
(7)
S
AV
=
=
RLL
Dynamic Phase Number Control
where RLL is the equivalent load line resistance as well as
the desired static output impedance. For a given R1, the
design is to get R2 according to (7). And the R2 should
be greater than 1.4kΩ.
The RT8809A/B controls the operation phase number
according to the total current. Figure 7 shows the dynamic
phase number control circuit. By connecting a resistor
(RPS) from the PS pin to GND, the phase transition
threshold can be set. The formula is :
V
OUT
A
V2
> A
V1
DCRI
5
SUM
R
PS
=
1
where ISUM is the sum of the inductor valley current. For
example, if DCR is 0.74mΩ, and the desired up phase
threshold is 15A, the value of RPS will be
A
A
V2
V1
0.74103 155
RPS
=
55.5k
0
Load Current
1106
Figure 6. ErrorAmplifierGain (AV) Influence on VOUT
Once the total inductor valley current is higher than the
threshold, the controller will transit to dual-phase operation.
when the total current becomes lower than the setting
threshold minus around 5A hysteresis, the active phase
number will return to single phase. If the PS pin is set
floating, the controller will force to dual-phase operation.
Accuracy
Note that the droop function is not available for the
RT8809B
Loop Compensation
Optimized compensation of the RT8809A/B allows for best
possible load step response of the regulator's output. A
type-I compensator with a single pole and single zero is
adequate for a proper compensation. Figure 5 shows the
compensation circuit. Prior design procedure shows how
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
16
DS8809A/B-03 January 2016
RT8809A/B
Over Voltage Protection
The RT8809A/B monitors the output voltage via the CSN
pin for Over Voltage Protection (OVP). Once the output
voltage exceeds the OVP threshold, OVP is triggered.
The RT8809A/B will try to turn on low side MOSFETs and
turn off high side MOSFETs to protect the load until the
OVP situation is removed. A 4μs delay is used in the
OVP detection circuit to prevent false trigger.
V
CMP
PS
PS
Active
Phase
Number
+
-
R
PS
L1
L2
DCR
DCR
R
X
C
OUT
R
X
C
X
CSN
CSP
-
V
CX
gm
+
Under Voltage Protection
The voltage on CSN pin is also monitored for under voltage
protection. If the output voltage is lower than the UVP
threshold, UVP will be triggered. The RT8809A/B will then
turn off both high side and low side MOSFETs. When
UVP is triggered, The RT8809A/B will enter hiccup mode
and continuously try to restart until the UVP situation is
cleared.
Figure 7. Dynamic PhaseNumber Control Circuit
Current Balance
The RT8809A/B implements internal current balance
mechanism in the current loop. The RT8809A/B senses
per phase current signal and compares it with the average
current. If the sensed current of any particular phase is
higher than average current, the on-time of this phase will
be adjusted to be shorter.
Inductor Selection
The switching frequency and ripple current determine the
inductor value as follows :
V
V
OUT
IN
L
=
T
ON
Current Limit Setting
(MIN)
I
RIPPLE(MAX)
The RT8809A/B includes a built-in builds-in current limit
protection function. Figure 8 shows the protection circuit.
The current limit threshold is programmable by an external
resistor, ROC, at the OCP pin. The value of ROC can be
set according to the following formula :
where TON is the UGATE turn on period.
Higher inductance results in achieves lower ripple current
and hence in higher efficiency but with a slower load
transient response as a, trade off. Thus, a need for more
output capacitors may be required, driving the cost up.
The RT8809A/B adopts inductorDCR sensing for dynamic
phase control and current limit circuit. For ensure sufficient
inductor current sensing signal, the minimum DC
resistance of inductor must be greater than 0.8mΩ. The
core must be large enough not to be saturated at the
peak inductor current.
DCRI
6
SUM
R
OC
=
8
where ISUM is the desired current limit threshold. Once
the sensed total current exceeds the current limit
threshold, the driver will be forced to turn off UGATE until
the OCP situation is removed.
Output Capacitor Selection
Output capacitors are used to maintain high performance
for the output beyond the bandwidth of the converter itself.
Two different kinds of output capacitors can be found, bulk
capacitors closely located to the inductors and ceramic
output capacitors in close proximity to the load. Latter
ones are for mid frequency decoupling with especially
small ESR and ESL values while the bulk capacitors have
to provide enough stored energy to overcome the low-
frequency bandwidth gap between the regulator and the
GPU.
V
CMP
OCP
OC
-
+
OCP
L1
L2
DCR
DCR
R
OC
R
X
C
OUT
R
X
C
X
CSN
CSP
-
V
CX
gm
+
Figure 8. Over Current Protection Circuit
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS8809A/B-03 January 2016
www.richtek.com
17
RT8809A/B
Thermal Considerations
Layout Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
Careful PC board layout is critical to achieving low
switching losses and clean, stable operation. The
switching power stage requires particular attention. If
possible, mount all of the power components on the top
side of the board with their ground terminals flushed
against one another. Follow these guidelines for optimum
PC board layout :
PD(MAX) = (TJ(MAX) − TA) / θJA
Keep the high current paths short, especially at the
ground terminals.
where TJ(MAX) is the maximum junction temperature, TAis
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
Keep the power traces and load connections short. This
is essential for high efficiency.
For recommended operating condition specifications of
the RT8809A/B, the maximum junction temperature is
125°C and TA is the ambient temperature. The junction to
ambient thermal resistance, θJA, is layout dependent. For
WQFN-24L 4x4 package, the thermal resistance, θJA, is
52°C/W on a standard JEDEC 51-7 four-layer thermal test
board. The maximum power dissipation at TA = 25°C can
be calculated by the following formula :
When trade-offs in trace lengths must be made, it’s
preferable to allow the inductor charging path to be made
longer than the discharging path.
Place the current sense components close to the
controller. CSP and CSN connections for current limit
and voltage positioning must be made using Kelvin sense
connections to guarantee the current sense accuracy.
The PCB trace from the sense nodes should be
paralleled back to the controller.
PD(MAX) = (125°C − 25°C) / (52°C/W) = 1.923W for
WQFN-24L 4x4 package
Route high speed switching nodes away from sensitive
analog areas (COMP, FB, CSP, CSN, etc...)
The maximum power dissipation depends on the operating
ambient temperature for fixed TJ(MAX) and thermal
resistance, θJA. For the RT8809A/B package, the derating
curve in Figure 9 allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
2.0
Four-Layer PCB
1.6
1.2
0.8
0.4
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 9. Derating Curves for the RT8809A/B Package
Copyright 2016 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
18
DS8809A/B-03 January 2016
RT8809A/B
Outline Dimension
D2
SEE DETAIL A
L
D
1
E
E2
1
2
1
2
e
b
DETAILA
A
Pin #1 ID and Tie Bar Mark Options
A3
A1
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
A1
A3
b
0.700
0.000
0.175
0.180
3.950
2.300
3.950
2.300
0.800
0.050
0.250
0.300
4.050
2.750
4.050
2.750
0.028
0.000
0.007
0.007
0.156
0.091
0.156
0.091
0.031
0.002
0.010
0.012
0.159
0.108
0.159
0.108
D
D2
E
E2
e
0.500
0.020
L
0.350
0.450
0.014
0.018
W-Type 24L QFN 4x4 Package
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
DS8809A/B-03 January 2016
www.richtek.com
19
©2020 ICPDF网 联系我们和版权申明