IRF7821 [RICHTEK]
6A, 24V, 600kHz Step-Down Converter with Synchronous Gate Driver; 6A ， 24V ， 600kHz的降压转换器与同步闸极驱动器
| 型号： | IRF7821 |
| 厂家： | 
RICHTEK TECHNOLOGY CORPORATION |
| 描述： | 6A, 24V, 600kHz Step-Down Converter with Synchronous Gate Driver |
| 文件： | 总18页 (文件大小：330K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
RT8298
6A, 24V, 600kHz Step-Down Converter with Synchronous
Gate Driver
General Description
Features
z 4.5V to 24V Input Voltage Range
The RT8298 is a synchronous step-downDC/DC converter
with an integrated high side internal power MOSFET and
a gate driver for a low side external power MOSFET. It
can deliver up to 6A output current from a 4.5V to 24V
input supply. The RT8298's current mode architecture
allows the transient response to be optimized over a wider
input voltage and load range. Cycle-by-cycle current limit
provides protection against shorted outputs and soft-start
eliminates input current surge during start-up. The RT8298
is synchronizable to an external clock with frequency
ranging from 300kHz to 1.5MHz.
z 6A Output Current
z 45mΩ Internal High Side N-MOSFET
z Current Mode Control
z 600kHz Switching Frequency
z Adjustable Output from 0.8V to 15V
z Up to 95% Efficiency
z Internal Compensation
z Stable with Ceramic Capacitors
z Synchronous External Clock : 300kHz to 1.5MHz
z Cycle-by-Cycle Current Limit
z Input Under Voltage Lockout
z Output Under Voltage Protection
z Power Good Indicator
The RT8298 is available in WDFN-14L 4x3 and SOP-8
(Exposed Pad) packages.
z Thermal Shutdown Protection
z RoHS Compliant and Halogen Free
Applications
z Point of Load Regulator in Distributed Power System
z Digital Set top Boxes
z PersonalDigital Recorders
z Broadband Communications
z Flat Panel TVs and Monitors
Simplified Application Circuit
RT8298
VIN
V
BOOT
IN
C
C
C
IN
BOOT
L
SW
BG
V
OUT
VCC
Q1
R1
R2
VCC
C
OUT
FB
Power Good
Chip Enable
PGOOD
EN/SYNC
GND
Copyright 2011 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS8298-01 November 2011
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1
RT8298
Ordering Information
Marking Information
RT8298
RT8298ZQW
Package Type
04 : Product Code
QW : WDFN-14L 4x3 (W-Type)
SP : SOP-8 (Exposed Pad-Option 2)
YMDNN : Date Code
04 YM
DNN
Lead Plating System
Z : ECO (Ecological Element with
Halogen Free and Pb free)
Note :
RT8298ZSP
Richtek products are :
RT8298ZSP : Product Number
YMDNN : Date Code
RT8298
ZSPYMDNN
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
Pin Configurations
(TOP VIEW)
14
13
12
11
10
9
FB
PGOOD
EN/SYNC
1
2
3
4
5
6
7
GND
BG
8
SW
VIN
VCC
2
3
4
7
6
5
BOOT
VCC
BG
EN/SYNC
FB
GND
BOOT
SW
SW
SW
VIN
VIN
VIN
NC
GND
9
GND
15
8
WDFN-14L 4x3
SOP-8 (Exposed Pad)
Copyright 2011 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
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2
DS8298-01 November 2011
RT8298
Functional Pin Description
Pin No.
Pin Name
Pin Function
SOP-8
(Exposed Pad)
WDFN-14L 4x3
Feedback Input. This pin is connected to the converter output. It
is used to set the output of the converter to regulate to the
desired value via an external resistive divider. The feedback
reference voltage is 0.808V typically.
1
6
FB
Power Good Indicator with Open Drain. (for RT8298ZQW only)
A 100kΩ pull-high resistor is needed. The output of this pin is
pulled to low when the FB is lower than 0.75V; otherwise it is
high impedance.
2
3
--
PGOOD
Enable or External Frequency Synchronization Input. A
logic-high (2V < EN < 5.5V) enables the converter; a logic-low
EN/SYNC forces the IC into shutdown mode reducing the supply current to
less than 3μA. For external frequency synchronization operation,
the available frequency range is from 300kHz to 1.5MHz.
7
Power Input. The available input voltage range is from 4.5V to
4, 5, 6
7
8
--
1
VIN
NC
SW
24V. A 22μF or larger input capacitor is needed to reduce
voltage spikes at the input.
No Internal Connection.
Switching Node. Output of the internal high side MOSFET.
Connect this pin to external low-side N-MOSFET, inductor and
bootstrap capacitor.
8, 9, 10
Bootstrap for High side Gate Driver. Connect a 1μF ceramic
capacitor between the BOOT pin and SW pin.
11
12
2
3
BOOT
VCC
BG
BG Driver Bias Supply. Decouple with a 1μF X5R/X7R ceramic
capacitor between the VCC pin and GND.
Gate Driver Output. Connect this pin to the gate of the external
low-side N-MOSFET.
13
4
14,
5,
Ground. The exposed pad must be soldered to a large PCB and
connected to GND for maximum thermal dissipation.
GND
15 (Exposed Pad) 9 (Exposed Pad)
Copyright 2011 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
DS8298-01 November 2011
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3
RT8298
Function Block Diagram
VIN
V
CC
VCC
Internal
Regulator
OSC
Enable
Comparator
Slope
Compensator
Current Sense
Amplifier
+
1.7V
+
-
R
SENSE
-
EN/SYNC
Foldback
Control
5k
3V
V
CC
OTP
BOOT
SW
UV Comparator
45m
Switch
Controller
+
-
V
0.4V
CC
Current
Signal
6nA
+
-
+
+
-
0.808V
COMP
EA
BG
Driver
V
SS
Current
Comparator
BG
15pF
54pF
300k
FB
PGOOD
Comparator
1pF
PGOOD
0.75V
+
-
GND
Operation
side MOSFET. The output under voltage protection is
designed to operate in Hiccup mode.
The RT8298 is a synchronous high voltage Buck Converter
that can support the input voltage range from 4.5V to 24V
and the output current can be up to 6A. The RT8298 uses
a constant frequency, current mode architecture. In normal
operation, the high side N-MOSFET is turned on when
the Switch Controller is set by the oscillator (OSC) and is
turned off when the current comparator resets the Switch
Controller. While theN-MOSFET is turned off, the external
low side N-MOSFET is turned on by BG Driver with 5V
driving voltage from Internal Regulator (VCC) until next
cycle begins.
Oscillator (OSC) : The internal oscillator runs at nominal
frequency 600kHz and can be synchronized by an external
clock in the range between 300kHz and 1.5MHz from EN/
SYNC pin.
PGOOD Comparator : This function is available for
RT8298ZQW only. When the feedback voltage (VFB) is
higher than threshold voltage 0.75V, the PGOOD open
drain output will be high impedance.
Enable Comparator : Internal 5kΩ resistor and Zener diode
are used to clamp the input signal to 3V. A1.7V reference
voltage is for EN logic-high threshold voltage. The EN pin
can be connected to VIN through a 100kΩ resistor for
automatic startup.
High side MOSFET peak current is measured by internal
RSENSE. The Current Signal is where Slope Compensator
works together with sensing voltage of RSENSE. The error
amplifier EA adjusts COMP voltage by comparing the
feedback signal (VFB) from the output voltage with the
internal 0.808V reference. When the load current
increases, it causes a drop in the feedback voltage relative
to the reference, the COMP voltage then rises to allow
higher inductor current to match the load current.
Foldback Control : When VFB is lower than 0.7V, the
oscillation frequency will be proportional to the feedback
voltage.
Soft-Start (SS) : An internal current source (6nA) charges
an internal capacitor (15pF) to build the soft-start ramp
voltage (VSS). The VFB voltage will track the internal ramp
voltage during soft-start interval. The typical soft-start time
is 2ms.
UV Comparator : If the feedback voltage (VFB) is lower
than threshold voltage 0.4V, the UV Comparator's output
will go high and the Switch Controller will turn off the high
Copyright 2011 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
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4
DS8298-01 November 2011
RT8298
Absolute Maximum Ratings (Note 1)
z Supply Input Voltage, VIN ------------------------------------------------------------------------------------------ –0.3V to 26V
z Switching Voltage, SW -------------------------------------------------------------------------------------------- –0.3V to (VIN + 0.3V)
z BOOT to SW --------------------------------------------------------------------------------------------------------- –0.3V to 6V
z All Other Voltage ---------------------------------------------------------------------------------------------------- −0.3V to 6V
z Power Dissipation, PD @ TA = 25°C
WDFN-14L 4x3 ------------------------------------------------------------------------------------------------------- 1.667W
SOP-8 (Exposed Pad) --------------------------------------------------------------------------------------------- 1.333W
z Package Thermal Resistance (Note 2)
WDFN-14L 4x3, θJA ------------------------------------------------------------------------------------------------- 60°C/W
WDFN-14L 4x3, θJC ------------------------------------------------------------------------------------------------- 7.5°C/W
SOP-8 (Exposed Pad), θJA ---------------------------------------------------------------------------------------- 75°C/W
SOP-8 (Exposed Pad), θJC --------------------------------------------------------------------------------------- 15°C/W
z Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------------- 260°C
z Junction Temperature ----------------------------------------------------------------------------------------------- 150°C
z Storage Temperature Range -------------------------------------------------------------------------------------- –65°C to 150°C
z ESD Susceptibility (Note 3)
HBM (Human Body Mode) ---------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ------------------------------------------------------------------------------------------------ 200V
Recommended Operating Conditions (Note 4)
z Supply Input Voltage, VIN ------------------------------------------------------------------------------------------ 4.5V to 24V
z Junction Temperature Range-------------------------------------------------------------------------------------- −40°C to 125°C
z Ambient Temperature Range-------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 12V, TA = 25°C, unless otherwise specified)
Parameter
Shutdown Supply Current
Supply Current
Symbol
Test Conditions
Min
--
Typ
1
Max Unit
V
V
= 0V
--
--
μA
mA
V
EN
EN
= 3V, V = 1V
--
0.9
FB
Feedback Reference Voltage
Feedback Current
V
REF
4.5V ≤ V ≤ 24V
0.796 0.808 0.82
IN
I
V
= 0.8V
FB
--
--
--
--
--
--
--
4
10
45
--
--
nA
mΩ
A
FB
High-Side Switch On Resistance
High-Side Switch Current Limit
Oscillation Frequency
R
DS(ON)
BOOT − SW = 4.8V
10
--
f
600
190
90
--
kHz
kHz
%
OSC1
Short Circuit Oscillation Frequency
Maximum Duty Cycle
f
V
V
V
= 0V
--
OSC2
FB
FB
FB
D
MAX
= 0.6V
= 1V
--
Minimum On-Time
t
100
4.2
--
ns
ON
Input Under Voltage Lockout Threshold
V
UVLO
4.4
V
Input Under Voltage Lockout Threshold
Hysteresis
ΔV
--
400
--
mV
V
UVLO
Logic-High
Logic-Low
V
IH
2
--
--
5.5
0.4
EN Threshold
Voltage
V
IL
--
Copyright 2011 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
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5
RT8298
Parameter
Symbol
Test Conditions
Min
0.3
--
Typ
--
Max
Unit
MHz
μs
μA
°C
°C
V
Sync Frequency Range
f
1.5
Sync
EN Turn-Off Delay
t
10
1
--
--
OFF
EN Pull Low Current
V
= 2V
--
EN
Thermal Shutdown
T
--
150
20
0.75
40
--
--
SD
Thermal Shutdown Hysteresis
Power Good Threshold Rising
Power Good Threshold Hysteresis
Power Good Pin Level
ΔT
--
--
SD
--
--
--
--
mV
V
PGOOD Sink 10mA
--
0.125
--
BG Driver Bias Supply Voltage
Gate Driver Sink Impedance
Gate Driver Source Impedance
V
4.5
--
5
V
CC
R
Sink
0.9
3.3
--
Ω
R
Source
--
--
Ω
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright 2011 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
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6
DS8298-01 November 2011
RT8298
Typical Application Circuit
For WDFN-14L 4x3 Package
RT8298
4, 5, 6
V
11
IN
VIN
BOOT
4.5V to 24V
C
IN
C
1µF
BOOT
22µF
L
2.2µH
8, 9, 10
13
V
3.3V
OUT
SW
BG
12
VCC
Q1
C
VCC
R1
62k
1µF
R3
100k
C
OUT
1
FB
22µF x 3
R2
20k
2
3
Power Good
Chip Enable
PGOOD
14, 15 (Exposed Pad)
GND
EN/SYNC
For SOP-8 (Exposed Pad) Package
RT8298
8
3
V
2
IN
VIN
BOOT
4.5V to 24V
C
22µF
C
1µF
IN
BOOT
L
2.2µH
1
4
V
3.3V
OUT
SW
BG
VCC
Q1
C
1µF
R1
VCC
62k
C
OUT
6
FB
22µF x 3
Chip Enable
R2
20k
5, 9 (Exposed Pad)
7
GND
EN/SYNC
Table 1. Recommended Component Selection
R1 (kΩ)
62
R2 (kΩ)
127
50.5
30
L (μH)
1.5
VOUT (V)
COUT (μF)
22μF x 3
22μF x 3
22μF x 3
22μF x 3
22μF x 3
22μF x 3
1.2
1.8
2.5
3.3
5
62
1.5
62
2.2
62
20
2.2
93
18
2.8
8
120
13.5
3.6
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RT8298
Typical Operating Characteristics
Output Voltage vs. Input Voltage
Efficiency vs. Output Current
3.33
3.32
3.31
3.30
3.29
3.28
3.27
100
90
80
VIN = 6V
70
60
50
40
30
20
10
0
VIN = 12V
IN = 24V
V
VOUT = 3.3V
5 6
VIN = 4.5V to 24V, VOUT = 3.3V, IOUT = 0A
4
6
8
10 12 14 16 18 20 22 24
Input Voltage (V)
0
1
2
3
4
Output Current (A)
Output Voltage vs. Temperature
Output Voltage vs. Output Current
3.40
3.38
3.36
3.34
3.32
3.30
3.28
3.26
3.24
3.22
3.20
3.40
3.38
3.36
3.34
3.32
3.30
3.28
3.26
3.24
3.22
3.20
VIN = 6V
VIN = 12V
VIN = 24V
VIN = 12V, VOUT = 3.3V, IOUT = 0A
25 50 75 100 125
VOUT = 3.3V
4.5 5.5 6
-50
-25
0
0
0.5
1
1.5
2
2.5
3
3.5
4
5
Temperature (°C)
Output Current (A)
Switching Frequency vs. Input Voltage
Switching Frequency vs. Temperature
650
640
630
620
610
600
590
580
570
560
550
650
640
630
620
610
600
590
580
570
560
550
VIN = 12V, VOUT = 3.3V, IOUT = 0A
VOUT = 3.3V, IOUT = 0A
-50
-25
0
25
50
75
100
125
4
6
8
10 12 14 16 18 20 22 24
Input Voltage (V)
Temperature (°C)
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DS8298-01 November 2011
RT8298
Current Limit vs. Temperature
Load Transient Response
12.0
11.5
11.0
10.5
10.0
9.5
VOUT
(100mV/Div)
IOUT
(5A/Div)
9.0
8.5
VIN = 12V, VOUT = 3.3V, IOUT = 0A to 6A
VIN = 12V, VOUT = 3.3V
8.0
-50
-25
0
25
50
75
100
125
Time (250μs/Div)
Temperature (°C)
Load Transient Response
Output Ripple Voltage
VOUT
(10mV/Div)
VOUT
(100mV/Div)
VSW
(10V/Div)
IOUT
(5A/Div)
IL
(2A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 3A
VIN = 12V, VOUT = 3.3V, IOUT = 3A to 6A
Time (250μs/Div)
Time (1μs/Div)
Output Ripple Voltage
Power On from VIN
VOUT
(10mV/Div)
VIN
(5V/Div)
VSW
(10V/Div)
VOUT
(2V/Div)
IL
IL
(5A/Div)
(5A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 6A
VIN = 12V, VOUT = 3.3V, IOUT = 6A
Time (2.5ms/Div)
Time (1μs/Div)
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RT8298
Power On from EN
Power Off from VIN
VEN
(5V/Div)
VIN
(5V/Div)
VOUT
(2V/Div)
VOUT
(2V/Div)
IL
IL
(5A/Div)
(5A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 6A
Time (5ms/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 6A
Time (2.5ms/Div)
Power Off from EN
External SYNC
Clock
(5V/Div)
VEN
(5V/Div)
VLX
(10V/Div)
VOUT
(2V/Div)
IL
(5A/Div)
IL
VOUT
(5V/Div)
(5A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 6A, Clock = 800kHz
Time (500ns/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 6A
Time (5ms/Div)
Copyright 2011 Richtek Technology Corporation. All rights reserved.
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DS8298-01 November 2011
RT8298
Application Information
the device again. For external timing control, the EN pin
can also be externally pulled high by adding a REN resistor
and CEN capacitor from the VIN pin (see Figure 3).
Output Voltage Setting
The resistive divider allows the FB pin to sense the output
voltage as shown in Figure 1.
EN
R
EN
V
IN
EN
V
OUT
RT8298
GND
C
EN
R1
FB
RT8298
GND
R2
Figure 3. Enable Timing Control
An external MOSFET can be added to implement digital
control on the EN pin, as shown in Figure 4. In this case,
a 100kΩ pull-up resistor, REN, is connected between VIN
pin and the ENpin. MOSFET Q2 will be under logic control
to pull down the EN pin.
Figure 1. Output Voltage Setting
The output voltage is set by an external resistive voltage
divider according to the following equation :
R1
R2
⎛
⎝
⎞
⎟
⎠
VOUT = VREF 1+
⎜
R
EN
100k
Where VREF is the feedback reference voltage (0.808V
V
EN
IN
typ.).
RT8298
GND
Q2
EN
External Bootstrap Diode
Connect a 1μF low ESR ceramic capacitor between the
BOOT pin and SW pin. This capacitor provides the gate
driver voltage for the high side MOSFET.
Figure 4. Digital Enable Control Circuit
The chip starts to operate when VIN rises to 4.2V (UVLO
threshold). During the VIN rising period, if an 8V output
voltage is set, VIN is lower than the VOUT target value and
it may cause the chip to shut down. To prevent this
situation, a resistive voltage divider can be placed between
the input voltage and ground and connected to the ENpin
to adjust enable threshold, as shown in Figure 5. For
example, the setting VOUT is 8V and VIN is from 0V to
12V, when VIN is higher than 10V, the chip is triggered to
enable the converter. Assume REN1 = 50kΩ. Then,
It is recommended to add an external bootstrap diode
between an external 5V and BOOT pin for efficiency
improvement when input voltage is lower than 5.5V or duty
ratio is higher than 65% .The bootstrap diode can be a
low cost one such as IN4148 or BAT54. The external 5V
can be a 5V fixed input from system or a 5V output of the
RT8298.Note that the external boot voltage must be lower
than 5.5V.
5V
(R
(V
x V
)
)
EN1
EN_T
R
EN2
=
− V
IN_S
EN_T
BOOT
where VEN_T is the enable comparator's logic-high reference
threshold voltage (1.7V) and VIN_S is the target turn on
input voltage (10V in this example). According to the
equation, the suggested resistor REN2 is 10.2kΩ.
RT8298
1µF
SW
Figure 2. External Bootstrap Diode
Chip Enable Operation
R
EN1
V
IN
EN
R
The EN pin is the chip enable input. Pulling the EN pin
low (<0.4V) will shutdown the device. During shutdown
mode, the RT8298 quiescent current drops to lower than
3μA. Driving the ENpin high (2V < EN< 5.5V) will turn on
EN2
RT8298
GND
Figure 5. ResistorDivider for Lockout Threshold Setting
Copyright 2011 Richtek Technology Corporation. All rights reserved.
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RT8298
Soft-Start
Over Temperature Protection
The RT8298 provides soft-start function. The soft-start
function is used to prevent large inrush current while
converter is being powered-up.An internal current source
(6nA) charges an internal capacitor (15pF) to build a soft-
start ramp voltage. The VFB voltage will track the internal
ramp voltage during soft-start interval. The typical soft-
start time is calculated as follows :
The RT8298 features an Over Temperature Protection
(OTP) circuitry to prevent from overheating due to
excessive power dissipation. The OTP will shut down
switching operation when junction temperature exceeds
150°C. Once the junction temperature cools down by
approximately 20°C, the converter will resume operation.
To maintain continuous operation, the maximum junction
temperature should be lower than 125°C.
(0.808V× 15pF)
t
=
= 2ms
SS
6nA
Under Voltage Protection
Operating Frequency and Synchronization
For the RT8298, it provides Hiccup Mode Under Voltage
Protection (UVP). When the VFB voltage drops below 0.4V,
the UVP function will be triggered to shut down switching
operation. If the UV condition remains for a period, the
RT8298 will retry every 2ms. When the UV condition is
removed, the converter will resume operation. The UVP
is disabled during soft-start period.
The internal oscillator runs at 600kHz (typ.) when the EN/
SYNC pin is at logic-high level (>2V). If the EN pin is
pulled to low-level for 10μs above, the IC will shut down.
The RT8298 can be synchronized with an external clock
ranging from 300kHz to 1.5MHz applied to the EN/SYNC
pin. The external clock duty cycle must be from 10% to
90%.
Hiccup Mode
10µs
3.5ms (Start-up period)
VIN = 12V, IOUT = Short
EN/SYNC
VOUT
(1V/Div)
V
FB
CLK
External CLK
IL
Foldback
600kHz
(5A/Div)
Figure 6. Startup Sequence Using External Sync Clock
Time (2.5ms/Div)
Figure 7. Hiccup Mode Under Voltage Protection
Figure 6 shows the synchronization operation in startup
period. When the EN/SYNC is triggered by an external
clock, the RT8298 enters soft-start phase and the output
voltage starts to rise. When VFB is lower than 0.7V, the
oscillation frequency will be proportional to the feedback
voltage. With higher VFB, the switching frequency is
relatively higher. After startup period about 3.5ms, the IC
operates with the same frequency as the external clock.
Duty Cycle Limitation
The RT8298 has a maximum duty cycle 90%. The
minimum input voltage is determined by the maximum
duty cycle and its minimum operating voltage 4.5V. The
voltage drops of high side MOSFET and low side MOSFET
also must be considered for the minimum input voltage.
The minimum duty cycle can be calculated by the following
equation :
Duty Cycle(min) = fSW x tON(min)
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DS8298-01 November 2011
RT8298
where fsw is the switching frequency, tON (min) is the
minimum switch on time (100ns). This equation shows
that the minimum duty cycle increases when the switching
frequency is increased. Therefore, slower switching
frequency is necessary to achieve high VIN/VOUT ratio
application.
For the ripple current selection, the value of ΔIL= 0.24(IMAX)
will be a reasonable starting point. The largest ripple
current occurs at the highest VIN. To guarantee that the
ripple current stays below the specified maximum, the
inductor value should be chosen according to the following
equation :
⎡
⎤ ⎡
× 1−
⎤
V
f × ΔI
V
OUT
V
IN(MAX)
OUT
L =
⎢
⎥ ⎢
⎥
External N-MOSFET Selection
L(MAX)
⎣
⎦ ⎣
⎦
The RT8298 is designed to operate using an external low
side N-MOSFET. Important parameters for the power
MOSFETs are the breakdown voltage (BVDSS), threshold
voltage (VGS_TH), on-resistance (RDS(ON)), total gate charge
(Qg) and maximum current (ID(MAX)). The gate driver voltage
is from internal regulator (5V, VCC). Therefore logic level
N-MOSFET must be used in the RT8298 application. The
total gate charge (Qg) must be less than 50nC, lower Qg
characteristics results in lower power losses.Drain-source
on-resistance (RDS(ON)) should be as small as possible,
less than 30mΩ is desirable. Lower RDS(ON) results in
higher efficiency.
The inductor's current rating (cause a 40°C temperature
rising from 25°C ambient) should be greater than the
maximum load current and its saturation current should
be greater than the short circuit peak current limit. Please
see Table 3 for the inductor selection reference.
Table 3. Suggested Inductors for Typical
Application Circuit
Component
Supplier
Dimensions
(mm)
Series
10 x 10 x 4
6 x 6 x 3
Zenithtek
ZPWM
WE
74477
10 x 10 x 4
8 x 10 x 4
Table 2. External N-MOSFET Selection
TAIYOYUDEN
NR8040
Part No.
Si7114
Manufacture
Vishay
CIN and COUT Selection
A04474
ALPHA & OMEGA
Fairchild
The input capacitance, CIN, is needed to filter the
trapezoidal current at the source of the high side MOSFET.
To prevent large ripple current, a low ESR input capacitor
sized for the maximum RMS current should be used. The
approximate RMS current equation is given :
FDS6670AS
IRF7821
International Rectifier
Inductor Selection
The inductor value and operating frequency determine the
ripple current according to a specific input and output
voltage. The ripple current ΔIL increases with higher VIN
and decreases with higher inductance.
V
V
V
IN
V
OUT
OUT
I
= I
−1
RMS
OUT(MAX)
IN
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT / 2. This simple worst case condition is
commonly used for design because even significant
deviations do not offer much relief.
V
VOUT
⎡
OUT ⎤ ⎡
× 1−
⎥ ⎢
⎤
ΔIL =
⎢
⎣
⎥
⎦
f ×L
V
IN
⎦ ⎣
Having a lower ripple current reduces not only the ESR
losses in the output capacitors but also the output voltage
ripple. High frequency with small ripple current can reduce
voltage. For the highest efficiency operation, however, it
requires a large inductor to achieve this goal.
Choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to
meet size or height requirements in the design.
Copyright 2011 Richtek Technology Corporation. All rights reserved.
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13
RT8298
Table 4. Suggested Capacitors for CIN and COUT
Location
CIN
Component Supplier
Part No.
Capacitance (μF)
Case Size
1206
MURATA
TDK
GRM31CR61E106K
C3225X5R1E106K
TMK316BJ106ML
GRM31CR60J476M
C3225X5R0J476M
GRM32ER71C226M
C3225X5R1C22M
10
10
10
47
47
22
22
CIN
1206
CIN
TAIYO YUDEN
MURATA
TDK
1206
COUT
COUT
COUT
COUT
1206
1210
MURATA
TDK
1210
1210
For the input capacitor, two 10μF low ESR ceramic
capacitors are recommended. For the recommended
capacitor, please refer to Table 4 for more details.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step load change. When a
step load occurs, VOUT immediately shifts by an amount
equal to ΔILOAD x ESR also begins to charge or discharge
COUT generating a feedback error signal for the regulator
to return VOUT to its steady-state value. During this
recovery time, VOUT can be monitored for overshoot or
ringing that would indicate a stability problem.
The selection of COUT is determined by the required ESR
to minimize voltage ripple.
Moreover, the amount of bulk capacitance is also a key
for COUT selection to ensure that the control loop is stable.
Loop stability can be checked by viewing the load transient
response as described in a later section.
The output ripple, ΔVOUT , is determined by :
Thermal Considerations
1
⎡
⎤
ΔVOUT ≤ ΔIL ESR +
⎢
⎣
⎥
⎦
8fCOUT
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
The output ripple will be the highest at the maximum input
voltage since ΔIL increases with input voltage. Multiple
capacitors placed in parallel may be needed to meet the
ESR and RMS current handling requirement.
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. When a ceramic
capacitor is used at the input and the power is supplied
by a wall adapter through long wires, a load step at the
output can induce ringing at the input, VIN. This ringing
can couple to the output and be mistaken.Asudden inrush
of current through the long wires can potentially cause a
voltage spike at VIN large enough to damage the part.
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TAis
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications of
the RT8298, the maximum junction temperature is 125°C.
The junction to ambient thermal resistance, θJA, is layout
dependent. For SOP-8 (Exposed Pad) package, the
thermal resistance, θJA, is 75°C/W on a standard JEDEC
51-7 four-layer thermal test board.
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DS8298-01 November 2011
RT8298
For WDFN-14L 4x3 package, the thermal resistance, θJA,
is 60°C/W on a standard JEDEC 51-7 four-layer thermal
test board. The maximum power dissipation at TA = 25°C
can be calculated by the following formulas :
Layout Consideration
Follow the PCB layout guidelines for optimal performance
of the RT8298.
` Keep the traces of the main current paths as short and
PD(MAX) = (125°C − 25°C) / (75°C/W) = 1.333W for
wide as possible.
SOP-8 (Exposed Pad) package
` Put the input capacitor as close as possible to the device
PD(MAX) = (125°C − 25°C) / (60°C/W) = 1.667W for
pins (VINandGND).
WDFN-14L 4x3 package
` SW node is with high frequency voltage swing and
should be kept at small area. Keep analog components
away from the SW node to prevent stray capacitive noise
pick-up.
The maximum power dissipation depends on the operating
ambient temperature for fixed TJ(MAX) and thermal
resistance, θJA. For the RT8298 package, the derating
curves in Figure 8 allow the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
` Connect feedback network behind the output capacitors.
Keep the loop area small. Place the feedback
components near the RT8298.
1.8
` Connect all analog grounds to a common node and then
connect the common node to the power ground behind
the output capacitors.
Four-Layer PCB
1.6
1.4
1.2
` An example of PCB layout guide is shown in Figure 9
WDFN-14L 4x3
1.0
and Figure 10 for reference.
0.8
SOP-8 (Exposed Pad)
0.6
0.4
0.2
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 8.Derating Curves for RT8298 Package
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DS8298-01 November 2011
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RT8298
SW should be connected to inductor by
wide and short trace. Keep sensitive
components away from this trace.
Input capacitor must be placed
as close to the IC as possible.
V
IN
GND
The EN/SYNC must be kept
C
C
IN
OUT
away from noise. The trace
should be short and shielded
with a ground trace.
Q1
L
BG
SW
8
7
6
5
VIN
V
OUT
C
BOOT
2
3
4
BOOT
VCC
BG
GND
R1
EN/SYNC
FB
C
capacitor must
be placed as close to
the IC as possible.
VCC
GND
9
V
OUT
GND
R2
C
VCC
The feedback components
must be connected as close
to the device as possible.
GND
Figure 9. PCB Layout Guide for SOP-8 (Exposed Pad)
The feedback components
GND
must be connected as close
to the device as possible.
C
capacitor must
VCC
R2
FB
be placed as close to
the IC as possible.
V
OUT
R1
14
1
2
3
4
5
6
7
GND
R3
13
V
BG
PGOOD
C
VCC
CC
GND
V
12
11
EN/SYNC
VCC
BOOT
VIN
GND
SW should be connected
The EN/SYNC must be kept
away from noise. The trace
C
L
BOOT
10 SW
IN
VIN
VIN
NC
to inductor by wide and
short trace. Keep sensitive
components away from
this trace.
9
SW
should be short and shielded
with a ground trace.
V
OUT
C
15
IN
8
SW
BG
Q1
C
OUT
Input capacitor must be
placed as close to the
IC as possible.
GND
Figure 10. PCB Layout Guide for WDFN-14L 4x3
Copyright 2011 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
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16
DS8298-01 November 2011
RT8298
Outline Dimension
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
0.800
0.050
0.250
0.300
4.100
3.350
3.100
1.750
Min
Max
A
A1
A3
b
0.700
0.000
0.175
0.180
3.900
3.250
2.900
1.650
0.028
0.000
0.007
0.007
0.154
0.128
0.114
0.065
0.031
0.002
0.010
0.012
0.161
0.132
0.122
0.069
D
D2
E
E2
e
0.500
0.020
L
0.350
0.450
0.014
0.018
W-Type 14L DFN 4x3 Package
Copyright 2011 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
DS8298-01 November 2011
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17
RT8298
H
A
Y
M
EXPOSED THERMAL PAD
(Bottom of Package)
J
B
X
F
C
I
D
Dimensions In Millimeters Dimensions In Inches
Symbol
Min
Max
5.004
4.000
1.753
0.510
1.346
0.254
0.152
6.200
1.270
2.300
2.300
2.500
3.500
Min
Max
A
B
C
D
F
H
I
4.801
3.810
1.346
0.330
1.194
0.170
0.000
5.791
0.406
2.000
2.000
2.100
3.000
0.189
0.150
0.053
0.013
0.047
0.007
0.000
0.228
0.016
0.079
0.079
0.083
0.118
0.197
0.157
0.069
0.020
0.053
0.010
0.006
0.244
0.050
0.091
0.091
0.098
0.138
J
M
X
Y
X
Y
Option 1
Option 2
8-Lead SOP (Exposed Pad) Plastic Package
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
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DS8298-01 November 2011
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