ISL84582IVZ-T13 [RENESAS]
Differential Multiplexer;
| 型号： | ISL84582IVZ-T13 |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | Differential Multiplexer |
| 文件： | 总14页 (文件大小：396K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISL84582
®
Data Sheet
May 6, 2009
FN6213.3
Low-Voltage, Single and Dual Supply,
Differential 4-to-1 Multiplexer
Features
• Pb-Free (RoHS Compliant)
The Intersil ISL84582 device is made of precision,
bi-directional, analog switches configured as a differential
4-Channel multiplexer/demultiplexer. It is designed to operate
from a single +2V to +12V supply or from a ±2V to ±6V dual
supplies. The device has an inhibit pin to simultaneously open
all signal paths.
• Fully Specified at 3.3V, 5V, ±5V, and 12V Supplies for 10%
Tolerances
• ON-resistance (r ), V = ±4.5V. . . . . . . . . . . . . . . . 44Ω
ON
S
• ON-resistance (r ), V = +3V . . . . . . . . . . . . . . . . 175Ω
ON
S
• r
ON
Matching Between Channels, V = ±5V . . . . . . . . . <2Ω
S
ON-resistance of 39Ω with a ±5V supply and 125Ω with a
single +3.3V supply. Each switch can handle rail-to-rail
analog signals. The off-leakage current is only 0.02nA at
+25°C or 0.2nA at +85°C.
• Low Charge Injection, V = ±5V . . . . . . . . . . . . . 1pC (Max)
S
• Single Supply Operation. . . . . . . . . . . . . . . . . . . +2V to +12V
• Dual Supply Operation . . . . . . . . . . . . . . . . . . . . . ±2V to ±6V
All digital inputs have 0.8V to 2.4V logic thresholds, ensuring
TTL/CMOS logic compatibility when using a single 3.3V or
+5V supply or dual ±5V supplies.
• Low Power Consumption (P ). . . . . . . . . . . . . . . . . . . .<3µW
D
• Fast Switching Action (V = +5V)
S
- t
- t
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43ns
ON
The ISL84582 is a differential 4-to-1 multiplexer device.
Table 1 summarizes the performance of this part.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20ns
OFF
• Guaranteed Max Off-Leakage . . . . . . . . . . . . . . . . . . .2.5nA
• Guaranteed Break-Before-Make
TABLE 1. FEATURES AT A GLANCE
CONFIGURATION
±5V r
DIFF 4:1 Mux
39Ω
• TTL, CMOS Compatible
ON
±5V t /t
32ns/18ns
32Ω
ON OFF
Applications
12V r
ON
• Battery Powered, Handheld, and Portable Equipment
• Communications Systems
- Radios
12V t /t
ON OFF
23ns/15ns
65Ω
5V r
ON
- Telecom Infrastructure
5V t /t
43ns/20ns
125Ω
ON OFF
3.3V r
- ADSL, VDSL Modems
ON
3.3V t /t
• Test Equipment
70ns/32ns
16 Ld TSSOP
ON OFF
- Medical Ultrasound
- Magnetic Resonance Image
- CT and PET Scanners (MRI)
- ATE
Package
Related Literature
- Electrocardiograph
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Audio and Video Signal Routing
• Various Circuits
• Application Note AN557 “Recommended Test Procedures
for Analog Switches”
- +3V/+5V DACs and ADCs
- Sample and Hold Circuits
- Operational Amplifier Gain Switching Networks
- High Frequency Analog Switching
- High Speed Multiplexing
• Application Note AN520 “CMOS Analog Multiplexers and
Switches; Specifications and Application Considerations.”
• Application Note AN1034 “Analog Switch and Multiplexer
Applications”
- Integrator Reset Circuits
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005, 2006, 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL84582
Pinout
ISL84582
(16 LD TSSOP)
TOP VIEW
B0
B1
1
2
3
4
5
6
7
8
16 V+
15 A1
14 A2
COM
B
B3
13 COM
A
B2
INH
V-
12 A0
11 A3
10 ADDB
LOGIC
9
ADDA
GND
Truth Table
Pin Descriptions
ISL84582
PIN
FUNCTION
INH
1
ADDB
ADDA
SWITCH ON
NONE
V+
V-
Positive Power Supply Pin
X
0
0
1
1
X
0
1
0
1
Negative Power Supply Pin. Connect to GND for Single
Supply Configurations.
0
A0, B0
GND
INH
Ground Connection
0
A1, B1
Digital Control Input. Connect to GND for Normal
Operation. Connect to V+ to turn all switches off.
0
A2, B2
0
A3, B3
COMx Analog Mux Common Pin
Ax, Bx Analog Mux Signal Pin
ADDx Address Input Pin
NOTE: Logic “0” ≤0.8V. Logic “1” ≥2.4V, with V+ between 3V and
10V. X = Don’t Care.
Ordering Information
PART
NUMBER
(Note)
TEMP.
RANGE
(°C)
PART
MARKING
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL84582IVZ
84582 IVZ -40 to +85 16 Ld TSSOP M16.173
ISL84582IVZ-T* 84582 IVZ -40 to +85 16 Ld TSSOP M16.173
Tape and Reel
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish,
which is RoHS compliant and compatible with both SnPb and Pb-free
soldering operations). Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
FN6213.3
May 6, 2009
2
ISL84582
Absolute Maximum Ratings
Thermal Information
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 15V
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 15V
V- to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15 to 0.3V
Input Voltages
INH, NO, NC, ADD (Note 1). . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Output Voltages
Thermal Resistance (Typical, Note 2)
θ
(°C/W)
150
JA
16 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Plastic Package). . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
COM (Note 1). . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . ±30mA
Peak Current NO, NC, or COM
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . ±100mA
ESD Rating
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Human Body Model (Per Mil-STD-883, Method 3015.7) . . . >2kV
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. Signals on NC, NO, COM, ADD, INH exceeding V+ or V- are clamped by internal diodes. Limit forward diode current to maximum current ratings.
2. θ is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
Electrical Specifications: ±5V Supply Test Conditions: V
= ±4.5V to ±5.5V, GND = 0V, V
INH
Unless Otherwise Specified
= 2.4V, V
INL
= 0.8V (Note 3),
SUPPLY
TEMP
MIN
MAX
PARAMETER
TEST CONDITIONS
(°C) (Notes 4, 10) TYP (Notes 4, 10) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
ANALOG
(Note 9)
Full
25
V-
-
-
44
V+
60
80
4
V
Ω
ON-resistance, r
V
= ±4.5V, I
= 2mA, V
= 2mA, V
= 2mA, V
or V
or V
or V
= 3V,
ON
S
COM
NO
NO
NO
NC
NC
NC
(See Figure 5)
Full
25
-
-
Ω
r
Matching Between Channels,
V
V
= ±4.5V, I
= ±4.5V, I
= 3V, (Note 5)
= ±3V, 0.1V,
-
1.3
-
Ω
ON
Δr
S
S
COM
ON
Full
25
-
6
Ω
r
Flatness, R
-
7.5
-
9
Ω
ON
FLAT(ON)
COM
(Note 6)
Full
25
-
12
-
Ω
NO or NC OFF Leakage Current,
or I
V
= ±5.5V, V
= ±4.5V, V
= ±4.5V, V
or V
= +4.5V,
= +4.5V,
-
0.02
0.2
0.02
0.2
0.02
0.2
nA
nA
nA
nA
nA
nA
S
COM
COM
COM
NO
NO
NC
NC
I
(Note 7)
NO(OFF)
NC(OFF)
Full
25
-
-
COM OFF Leakage Current,
V
= ±5.5V, V
or V
-
-
S
I
(Note 7)
COM(OFF)
Full
25
-
-
COM ON Leakage Current,
V
= ±5.5V, V
= V
or V = ±4.5V, (Note 7)
NC
-
-
S
NO
I
COM(ON)
Full
-
-
DIGITAL INPUT CHARACTERISTICS
Input Voltage High, V
,
Full
2.4
-
-
V
INHH
V
ADDH
Input Voltage Low, V
, V
Full
Full
-
-
0.8
0.5
V
INHL ADDL
Input Current, I
, I
V
= ±5.5V, V
, V
= 0V or V+, (Note 9)
-0.5
0.03
µA
ADDH ADDL,
S
INH ADD
I
I
INHH, INHL
DYNAMIC CHARACTERISTICS
Inhibit Turn-ON Time, t
V
V
= ±4.5V, V
or V
= ±3V, R = 300Ω, C = 35pF,
25
Full
25
-
-
-
-
-
-
35
-
50
60
35
40
60
70
ns
ns
ns
ns
ns
ns
ON
S
NO
NC
L
L
= 0 to 3 (see Figure 1, Note 9)
IN
Inhibit Turn-OFF Time, t
V
V
= ±4.5V, V
NO
or V
= ±3V, R = 300Ω, C = 35pF,
22
-
OFF
S
NC
L
L
= 0 to 3 (see Figure 1, Note 9)
IN
Full
25
Address Transition Time, t
V
V
= ±4.5V, V
NO
or V
= ±3V, R = 300Ω, C = 35pF,
43
-
TRANS
S
NC
L
L
= 0 to 3 (see Figure 1, Note 9)
IN
Full
FN6213.3
May 6, 2009
3
ISL84582
Electrical Specifications: ±5V Supply Test Conditions: V
= ±4.5V to ±5.5V, GND = 0V, V
INH
Unless Otherwise Specified (Continued)
= 2.4V, V
INL
= 0.8V (Note 3),
SUPPLY
TEMP
MIN
MAX
PARAMETER
TEST CONDITIONS
(°C) (Notes 4, 10) TYP (Notes 4, 10) UNITS
Break-Before-Make Time, t
V
V
= ±5.5V, V
NO
or V
= 3V, R = 300Ω, C = 35pF, Full
2
7
-
ns
BBM
S
NC
L
L
= 0 to 3V (see Figure 3, Note 9)
IN
Charge Injection, Q
C
= 1.0nF, V = 0V, R = 0Ω (see Figure 2, Note 9)
25
25
25
25
-
-
-
-
0.3
3
1
-
pC
pF
pF
pF
L
G
NO
NO
NO
G
NO/NC OFF Capacitance, C
OFF
f = 1MHz, V
f = 1MHz, V
f = 1MHz, V
or V
or V
or V
= V
= 0V (see Figure 7)
= 0V (see Figure 7)
= 0V (see Figure 7)
NC
NC
NC
COM
COM
COM
COM OFF Capacitance, C
= V
= V
12
18
-
OFF
COM ON Capacitance,
-
C
COM(ON)
OFF-Isolation
R
= 50Ω, C = 15pF, f = 100kHz,
25
25
25
-
-
-
92
-
-
-
dB
dB
dB
L
L
V
= 1V
(see Figures 4, 6 and 19)
NOx
RMS
Crosstalk, (Note 8)
≤110
-105
All Hostile Crosstalk, (Note 8)
POWER SUPPLY CHARACTERISTICS
Power Supply Range
Full
Full
Full
±4.5
-1
-
-
-
±5.5
1
V
Positive Supply Current, I+
Negative Supply Current, I-
V
= ±5.5V, V
, V
= 0V or V+, Switch On or Off,
µA
µA
S
INH ADD
(Note 9)
-1
1
Electrical Specifications: 12V Supply Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, V
= 4V, V
INL
= 0.8V (Note 3),
INH
Unless Otherwise Specified.
TEMP
MIN
MAX
PARAMETER
TEST CONDITIONS
(°C) (Notes 4, 10) TYP (Notes 4, 10) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
ANALOG
(Note 9)
Full
25
0
-
-
37
-
V+
45
55
2
V
Ω
Ω
Ω
ON-resistance, r
ON
V+ = 10.8V, I
(See Figure 5)
= 1.0mA, V
or V
= 9V,
COM
NO
NC
Full
-
r
Matching Between Channels, V+ = 10.8V, I
= 1.0mA, V
or V
= 9V, (Note 5) Full
-
1.2
ON
Δr
COM
NO
NC
ON
r
Flatness, R
V+ = 10.8V, I
(Note 6)
= 1.0mA, V
or V = 3V, 6V, 9V,
NC
Full
-
5
-
Ω
ON
FLAT(ON)
COM
NO
NO or NC OFF Leakage Current, V+ = 13.2V, V
= 1V, 12V, V
or V
= 12V, 1V,
= 1V, 12V,
= 1V, 12V,
25
Full
25
-
-
-
-
-
-
0.02
0.2
-
-
-
-
-
-
nA
nA
nA
nA
nA
nA
COM
NO
NO
NC
I
or I
NC(OFF)
(Note 7)
NO(OFF)
COM OFF Leakage Current,
V+ = 13.2V, V
(Note 7)
= 12V, 1V, V
or V
0.02
0.2
COM
NC
I
COM(OFF)
Full
25
COM ON Leakage Current,
V+ = 13.2V, V
COM
= 1V, 12V, V
NO
or V
0.02
0.2
NC
I
or floating, (Note 7)
COM(ON)
Full
DIGITAL INPUT CHARACTERISTICS
Input Voltage High, V
Input Voltage Low, V
, V
INHH ADDH
Full
Full
Full
3.7
-
-
-
-
-
V
V
, V
INHL ADDL
0.8
0.5
Input Current, I
, I
ADDH ADDL,
V+ = 13.2V, V
, V
= 0V or V+
-0.5
µA
INH ADD
I
I
INHH, INHL
FN6213.3
May 6, 2009
4
ISL84582
Electrical Specifications: 12V Supply Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, V
Unless Otherwise Specified. (Continued)
= 4V, V
INL
= 0.8V (Note 3),
INH
TEMP
MIN
MAX
PARAMETER
TEST CONDITIONS
(°C) (Notes 4, 10) TYP (Notes 4, 10) UNITS
DYNAMIC CHARACTERISTICS
Inhibit Turn-ON Time, t
V+ = 10.8V, V
or V
= 10V, R = 300Ω, C = 35pF,
25
Full
25
-
-
24
-
40
45
30
35
50
55
-
ns
ns
ns
ns
ns
ns
ns
ON
NO
NC
L
L
V
= 0 to 4, (See Figure 1, Note 9)
IN
Inhibit Turn-OFF Time, t
V+ = 10.8V, V
or V
= 10V, R = 300Ω, C = 35pF,
-
15
-
OFF
NO
NC
L
L
V
= 0 to 4, (See Figure 1, Note 9)
IN
Full
25
-
Address Transition Time, t
TRANS
V+ = 10.8V, V
or V
= 10V, R = 300Ω, C = 35pF,
-
27
-
NO
NC
L
L
V
= 0 to 4, (See Figure 1, Note 9)
IN
Full
Full
-
Break-Before-Make Time Delay, t V+ = 13.2V, R = 300Ω, C = 35pF, V
or V
= 10V,
2
5
D
L
L
NO
NC
V
C
R
= 0 to 4, (See Figure 3, Note 9)
IN
Charge Injection, Q
= 1.0nF, V = 0V, R = 0Ω, (See Figure 2, Note 9)
25
25
25
25
25
-
-
-
-
-
2.7
92
5
-
pC
dB
dB
dB
pF
L
L
G
G
OFF-Isolation
= 50Ω, C = 15pF, f = 100kHz,
L
(See Figure 4, 6 and 19)
Crosstalk, (Note 8)
≤110
-105
3
-
All Hostile Crosstalk, (Note 8)
NO or NC OFF Capacitance,
-
f = 1MHz, V
f = 1MHz, V
f = 1MHz, V
or V
or V
or V
= V
= V
= V
= 0V, (See Figure 7)
= 0V, (See Figure 7)
= 0V, (See Figure 7)
-
NO
NO
NO
NC
NC
NC
COM
COM
COM
C
OFF
COM OFF Capacitance,
25
25
-
-
12
18
-
-
pF
pF
C
COM(OFF)
COM ON Capacitance, C
COM(ON)
POWER SUPPLY CHARACTERISTICS
Power Supply Range
Full
Full
10.8
-1
-
-
13.2
1
V
Positive Supply Current, I+
V+ = 13.2V, V
, V
= 0V or V+, all channels on or
µA
INH ADD
off (Note 9)
Electrical Specifications: 5V Supply Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, V
= 2.4V, V
= 0.8V (Note 3),
INL
INH
Unless Otherwise Specified.
TEMP
MIN
MAX
PARAMETER
TEST CONDITIONS
(°C) (Notes 4, 10) TYP (Notes 4, 10) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
ANALOG
(Note 9)
Full
25
0
-
-
81
-
V+
100
120
4
V
Ω
Ω
Ω
Ω
Ω
ON-Resistance, r
V+ = 4.5V, I
(See Figure 5)
= 1.0mA, V
or V
= 3.5V,
ON
COM
NO
NC
Full
25
-
r
Matching Between Channels,
V+ = 4.5V, I
= 1.0mA, V
or V
= 3V, (Note 5)
= 1V, 2V, 3V,
-
2.2
-
ON
Δr
COM
NO
NC
ON
Full
Full
-
6
r
Flatness, R
V+ = 4.5V, I
(Note 6)
= 1.0mA, V
or V
-
11.5
-
ON
FLAT(ON)
COM
NO
NC
DIGITAL INPUT CHARACTERISTICS
Input Voltage High, V
Input Voltage Low, V
, V
INHH ADDH
Full
Full
Full
2.4
-
-
-
-
-
V
V
, V
INHL ADDL
0.8
0.5
Input Current, I
, I
I
V+ = 5.5V, V
, V
INH ADD
= 0V or V+, (Note 9)
-0.5
µA
ADDH ADDL, INHH,
I
INHL
FN6213.3
May 6, 2009
5
ISL84582
Electrical Specifications: 5V Supply Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, V
Unless Otherwise Specified. (Continued)
= 2.4V, V
= 0.8V (Note 3),
INL
INH
TEMP
MIN
MAX
PARAMETER
TEST CONDITIONS
(°C) (Notes 4, 10) TYP (Notes 4, 10) UNITS
DYNAMIC CHARACTERISTICS
Inhibit Turn-ON Time, t
ON
V+ = 4.5V, V
or V
= 3V, R = 300Ω, C = 35pF,
25
Full
25
-
-
43
-
60
70
35
40
70
85
-
ns
ns
ns
ns
ns
ns
ns
NO
NC
L
L
V
= 0 to 3V (see Figure 1, Note 9)
IN
Inhibit Turn-OFF Time, t
OFF
V+ = 4.5V, V
or V
= 3V, R = 300Ω, C = 35pF,
-
20
-
NO
NC
L
L
V
= 0 to 3V (see Figure 1, Note 9)
IN
Full
25
-
Address Transition Time, t
V+ = 4.5V, V
or V
= 3V, R = 300Ω, C = 35pF,
-
51
-
TRANS
BBM
NO
NC
L
L
V
= 0 to 3V (see Figure 1, Note 9)
IN
Full
Full
-
Break-Before-Make Time, t
V+ = 5.5V, V
or V
= 3V, R = 300Ω, C = 35pF,
2
9
NO
NC
L
L
V
C
R
= 0 to 3V, (See Figure 3, Note 9)
IN
Charge Injection, Q
OFF-Isolation
= 1.0nF, V = 0V, R = 0Ω, (See Figure 2, Note 9)
25
25
25
25
-
-
-
-
0.6
92
1.5
pC
dB
dB
dB
L
G
G
= 50Ω, C = 15pF, f = 100kHz,
-
-
-
L
L
V
= 1V
(see Figures 4, 6 and 19)
NOx
RMS
Crosstalk, (Note 8)
≤110
-105
All Hostile Crosstalk, (Note 8)
POWER SUPPLY CHARACTERISTICS
Power Supply Range
Full
Full
4.5
-1
-
-
5.5
1
V
Positive Supply Current, I+
V+ = 5.5V, V- = 0V, V
, V
Switch On or Off, (Note 9)
= 0V or V+,
µA
INH ADD
Electrical Specifications: 3.3V Supply Test Conditions: V+ = +3V to +3.6V, V- = GND = 0V, V
= 2.4V, V
= 0.8V (Note 3) Unless
INL
INH
Otherwise Specified.
TEMP
MIN
MAX
PARAMETER
TEST CONDITIONS
(°C) (Notes 4, 10) TYP (Notes 4, 10) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
ANALOG
(Note 9)
Full
25
0
-
-
175
-
V+
180
200
8
V
Ω
Ω
Ω
Ω
Ω
ON-Resistance, r
V+ = 3.0V, I
(See Figure 5)
= 1.0mA, V
or V
= 1.5V
NC
ON
COM
NO
Full
25
-
r
Matching Between Channels, V+ = 3.0V, I
= 1.0mA, V
or V
= 1.5V, (Note 5)
or V = 0.5V, 1V, 2V,
NC
-
3.4
-
ON
Δr
COM
NO
NC
ON
Full
Full
-
10
-
r
Flatness, R
V+ = 3.0V, I
(Note 6)
= 1.0mA, V
-
55
ON
FLAT(ON)
COM
NO
DIGITAL INPUT CHARACTERISTICS
Input Voltage High, V
, V
INHH ADDH
Full
Full
Full
2.4
-
-
-
-
-
V
V
Input Voltage Low, V
, V
INHL ADDL
0.8
0.5
Input Current, I
, I
V+ = 3.6V, V
, V
= 0V or V+, (Note 9)
-0.5
µA
ADDH ADDL,
INH ADD
I
I
INHH, INHL
DYNAMIC CHARACTERISTICS
Inhibit Turn-ON Time, t
V+ = 3.0V, V
or V
= 1.5V, R = 300Ω, C = 35pF,
25
Full
25
-
-
-
-
-
-
82
-
100
120
50
ns
ns
ns
ns
ns
ns
ON
NO
NC
L
L
V
= 0 to 3V (see Figure 1, Note 9)
IN
Inhibit Turn-OFF Time, t
OFF
V+ = 3.0V, V
or V
= 1.5V, R = 300Ω, C = 35pF,
37
-
NO
NC
L
L
V
= 0 to 3V (see Figure 1, Note 9)
IN
Full
25
60
Address Transition Time, t
TRANS
V+ = 3.0V, V
or V
= 1.5V, R = 300Ω, C = 35pF,
96
-
120
145
NO
NC
L
L
V
= 0 to 3V (see Figure 1, Note 9)
IN
Full
FN6213.3
May 6, 2009
6
ISL84582
Electrical Specifications: 3.3V Supply Test Conditions: V+ = +3V to +3.6V, V- = GND = 0V, V
Otherwise Specified. (Continued)
= 2.4V, V
= 0.8V (Note 3) Unless
INL
INH
TEMP
MIN
MAX
PARAMETER
TEST CONDITIONS
(°C) (Notes 4, 10) TYP (Notes 4, 10) UNITS
Break-Before-Make Time, t
V+ = 3.6V, V
or V = 1.5V, R = 300Ω, C = 35pF, Full
3
13
-
ns
BBM
NO
NC
L
L
V
C
R
= 0 to 3V (see Figure 3, Note 9)
IN
Charge Injection, Q
OFF-Isolation
= 1.0nF, V = 0V, R = 0Ω, (See Figure 2, Note 9)
25
25
25
25
-
-
-
-
0.3
92
1
-
pC
dB
dB
dB
L
G
G
= 50Ω, C = 15pF, f = 100kHz,
L
L
V
or V
= 1V (see Figures 4, 6 and 19)
NO
NC
RMS
Crosstalk, (Note 8)
≤110
-105
-
All Hostile Crosstalk, (Note 8)
-
POWER SUPPLY CHARACTERISTICS
Power Supply Range
Full
Full
3.0
-1
-
-
3.6
1
V
Positive Supply Current, I+
V+ = 3.6V, V- = 0V, V
, V
Switch On or Off, (Note 9)
= 0V or V+,
µA
INH ADD
NOTES:
3. V = Input logic voltage to configure the device in a given state.
IN
4. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
5. Δr = r (MAX) - r (MIN).
ON ON
ON
6. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range.
7. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at +25°C.
8. Between any two switches.
9. Limits established by characterization and are not production tested.
10. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested.
Test Circuits and Waveforms
V+
V-
C
C
C
3V
0V
t < 20ns
r
t < 20ns
f
LOGIC
INPUT
50%
ISL84582
V+
NO0
V
x
OUT
t
ON
COM
x
NO1 -NO3
x
x
INH
V
OUT
ADDA-B
VNO0
0V
GND
90%
C
L
35pF
90%
R
300Ω
L
LOGIC
INPUT
SWITCH
OUTPUT
t
OFF
Logic input waveform is inverted for switches that have the opposite
logic sense.
Repeat test for other switches. C includes fixture and stray
L
capacitance.
R
L
----------------------------
V
= V
OUT
(NO or NC)
R
+ r
(ON)
L
FIGURE 1B. INHIBIT t /t
ON OFF
TEST CIRCUIT
FIGURE 1A. INHIBIT t /t
ON OFF
MEASUREMENT POINTS
FN6213.3
May 6, 2009
7
ISL84582
Test Circuits and Waveforms (Continued)
3V
t < 20ns
r
t < 20ns
f
V+
V-
LOGIC
INPUT
50%
C
C
C
0V
t
TRANS
V
V+
NO0
x
ISL84582
V
OUT
V-
NO3
x
COM
x
OUT
VNO0
0V
C
90%
NO1 -NO2
x
x
ADDA-B
SWITCH
OUTPUT
EN
GND
C
35pF
L
R
L
300Ω
LOGIC
INPUT
10%
VNO
X
t
TRANS
Logic input waveform is inverted for switches that have the opposite
logic sense.
Repeat test for other switches. C includes fixture and stray
L
capacitance.
R
L
-----------------------
V
= V
OUT
(NO or NC)
R
+ r
ON
L
FIGURE 1D. ADDRESS t
TEST CIRCUIT
FIGURE 1C. ADDRESS t
MEASUREMENT POINTS
TRANS
TRANS
FIGURE 1. SWITCHING TIMES
V+
V-
C
C
3V
V
OUT
OFF
OFF
LOGIC
INPUT
R
G
COM
INH
ON
NO OR NC
ADDX
0V
0Ω
SWITCH
OUTPUT
GND
ΔV
OUT
V
C
L
G
1nF
V
OUT
LOGIC
INPUT
Q = ΔV
x C
L
OUT
Repeat test for other switches.
FIGURE 2B. Q TEST CIRCUIT
FIGURE 2A. Q MEASUREMENT POINTS
FIGURE 2. CHARGE INJECTION
V+
V-
C
C
C
t < 20ns
r
t < 20ns
f
V
OUT
3V
0V
COM
x
LOGIC
INPUT
C
L
R
L
300Ω
NO0 -NO3
x
x
V+
35pF
ISL84582
ADDA-B
80%
SWITCH
OUTPUT
LOGIC
INPUT
INH
GND
V
OUT
0V
t
BBM
Repeat test for other switches. C includes fixture and stray
L
capacitance.
FIGURE 3A. t
BBM
MEASUREMENT POINTS
FIGURE 3B. t
TEST CIRCUIT
BBM
FIGURE 3. BREAK-BEFORE-MAKE TIME
FN6213.3
May 6, 2009
8
ISL84582
Test Circuits and Waveforms (Continued)
V+
V-
V+
V-
C
C
C
C
r
= V /1mA
1
ON
SIGNAL
GENERATOR
NO OR NC
NO OR NC
V
NX
0V OR V+
0V OR V+
0V OR V+
1mA
V
1
ADDX
ADDX
COM
ANALYZER
COM
INH
GND
INH
GND
R
L
FIGURE 4. OFF-ISOLATION TEST CIRCUIT
FIGURE 5. r
TEST CIRCUIT
ON
V+
V-
C
C
V+
C
V-
C
SIGNAL
GENERATOR
50Ω
NO OR NC
A
COM
A
A
NO OR NC
0V OR V+
ISL84582
ADDX
0V OR V+
ADDX
IMPEDANCE
ANALYZER
NO OR NC
B
NC
B
COM
ANALYZER
COM
INH
B
GND
INH
GND
R
L
FIGURE 7. CAPACITANCE TEST CIRCUIT
FIGURE 6. CROSSTALK TEST CIRCUIT
FN6213.3
May 6, 2009
9
ISL84582
Power-Supply Considerations
Detailed Description
The ISL84582 construction is typical of most CMOS analog
switches, in that they have three supply pins: V+, V-, and
GND. V+ and V- drive the internal CMOS switches and set
their analog voltage limits, so there are no connections
between the analog signal path and GND. Unlike switches
with a 13V absolute maximum voltage, the ISL84582 15V
absolute maximum voltage provides plenty of room for the
10% tolerance of 12V supplies (±6V or 12V single supply),
as well as room for overshoot and noise spikes.
The ISL84582 multiplexer offers precise switching capability
from a bipolar ±2V to ±6V or a single 2V to 12V supply with
low ON-resistance (39Ω) and high speed operation
(t
= 38ns, t = 19ns) with dual 5V supplies. The device
ON
OFF
is especially well suited to portable battery-powered
equipment thanks to the low operating supply voltage (2V),
low power consumption (3µW), low leakage currents (0.2nA).
High frequency applications also benefit from the wide
bandwidth, and the very high off-isolation and crosstalk
rejection.
The ISL84582 performs equally well when operated with
bipolar or single voltage supplies. The minimum
recommended supply voltage is 2V or ±2V. It is important to
note that the input signal range, switching times, and on-
resistance degrade at lower supply voltages. Refer to the
“Electrical Specification” tables beginning on page 5 and
“Typical Performance Curves” beginning on page 11 for
details.
Supply Sequencing and Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to V- (see
Figure 8). To prevent forward biasing these diodes, V+ and
V- must be applied before any input signals, and input signal
voltages must remain between V+ and V-. If these conditions
cannot be guaranteed, then one of the following two
protection methods should be employed.
V+ and GND power the internal logic (thus setting the digital
switching point) and level shifters. The level shifters convert
the logic levels to switched V+ and V- signals to drive the
analog switch gate terminals.
Logic inputs can easily be protected by adding a 1kΩ
resistor in series with the input (see Figure 8). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
Logic-Level Thresholds
V+ and GND power the internal logic stages, so V- has no
affect on logic thresholds. This ISL84582 is TTL compatible
(0.8V and 2.4V) over a V+ supply range of 2.7V to 10V. At
12V the V level is about 3.3V. This is still below the CMOS
IH
guaranteed high output minimum level of 4V, but noise
margin is reduced. For best results with a 12V supply, use a
This method is not applicable for the signal path inputs.
Adding a series resistor to the switch input defeats the
logic family that provides a V
OH
greater than 4V.
purpose of using a low r
switch, so two small signal
ON
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (see Figure 8). These
additional diodes limit the analog signal from 1V below V+ to
1V above V-. The low leakage current performance is
unaffected by this approach, but the switch resistance may
increase, especially at low supply voltages.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation.
High-Frequency Performance
In 50Ω systems, signal response is reasonably flat even past
100MHz (see Figures 17 and 18). Figures 17 and 18 also
illustrates that the frequency response is very consistent
over varying analog signal levels.
OPTIONAL
PROTECTION
OPTIONAL PROTECTION
DIODE
RESISTOR
FOR LOGIC
INPUTS
V+
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal feed
through from a switch’s input to its output. Off-Isolation is the
resistance to this feed-through, while Crosstalk indicates the
amount of feed through from one switch to another. Figure 19
details the high Off-Isolation and Crosstalk rejection
provided by this family. At 10MHz, Off-Isolation is about
55dB in 50Ω systems, decreasing approximately 20dB per
decade as frequency increases. Higher load impedances
decrease Off-Isolation and Crosstalk rejection due to the
voltage divider action of the switch OFF impedance and the
load impedance.
1kΩ
LOGIC
V
V
NO OR NC
COM
V-
OPTIONAL PROTECTION
DIODE
FIGURE 8. INPUT OVERVOLTAGE PROTECTION
FN6213.3
May 6, 2009
10
ISL84582
V+ or V- and the analog signal. This means their leakages
Leakage Considerations
will vary as the signal varies. The difference in the two diode
leakages to the V+ and V- pins constitutes the
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and V-. One
of these diodes conducts if any analog signal exceeds V+
or V-.
analog-signal-path leakage current. All analog leakage
current flows between each pin and one of the supply
terminals, not to the other switch terminal. This is why both
sides of a given switch can show leakage currents of the
same or opposite polarity. There is no connection between
the analog signal paths and GND.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or V-. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
Typical Performance Curves
T = +25°C, Unless Otherwise Specified.
A
70
120
110
100
90
80
70
V
I
= (V+) - 1V
V
= ±2V
COM
= 1mA
V- = -5V
S
I
= 1mA
COM
+85°C
60
COM
50
+25°C
-40°C
+85°C
40
30
+25°C
-40°C
60
50
90
80
70
60
50
40
30
20
400
V
= ±3V
S
+85°C
V- = 0V
+25°C
-40°C
300
200
100
0
60
50
40
30
20
+85°C
V
= ±5V
S
+85°C
-2
+25°C
+25°C
-40°C
-40°C
-4
3
4
5
6
7
8
9
10
11
12
2
-5
-3
-1
0
1
2
3
4
5
V+ (V)
V
(V)
COM
FIGURE 10. ON-RESISTANCE vs SWITCH VOLTAGE
FIGURE 9. ON-RESISTANCE vs SUPPLY VOLTAGE
60
225
200
I
= 1mA
COM
I
= 1mA
COM
55
50
45
40
35
30
25
20
175
150
V+ = 12V
V- = 0V
+85°C
125
100
+25°C
-40°C
V+ = 2.7V
V- = 0V
75
160
140
+85°C
+85°C
120
100
80
+25°C
-40°C
V+ = 3.3V
V- = 0V
60
+25°C
100
90
80
70
60
50
40
V+ = 5V V- = 0V
+85°C
1
+25°C
-40°C
10
-40°C
0
2
3
4
5
0
2
4
6
8
12
V
(V)
V
(V)
COM
COM
FIGURE 12. ON-RESISTANCE vs SWITCH VOLTAGE
FIGURE 11. ON-RESISTANCE vs SWITCH VOLTAGE
FN6213.3
May 6, 2009
11
ISL84582
Typical Performance Curves
T
= +25°C, Unless Otherwise Specified. (Continued)
A
200
500
V
= (V+) - 1V
V- = -5V
V
= (V+) - 1V
COM
V- = -5V
COM
-40°C
+25°C
400
-40°C
150
100
50
300
+25°C
+25°C
+85°C
200
+25°C
100
+85°C
-40°C
0
-40°C
0
250
100
V- = 0V
V- = 0V
200
150
100
50
80
60
40
20
0
+85°C
+85°C
+25°C
+25°C
-40°C
3
-40°C
3
0
2
4
5
6
7
8
9
10
11
12
2
4
5
6
7
8
9
10
11
12
V+ (V)
V+ (V)
FIGURE 14. INHIBIT TURN-OFF TIME vs SUPPLY VOLTAGE
FIGURE 13. INHIBIT TURN-ON TIME vs SUPPLY VOLTAGE
300
250
V
= (V+) - 1V
COM
V
= (V+) - 1V
COM
V- = 0V
250
200
150
100
50
200
150
100
50
+25°C
+25°C
+85°C
+85°C
7
-40°C
-40°C
0
0
2
2
3
4
5
6
3
4
5
6
8
9
10
11
12
13
V+ (V)
V± (V)
FIGURE 15. ADDRESS TRANS TIME vs SINGLE SUPPLY
VOLTAGE
FIGURE 16. ADDRESS TRANS TIME vs DUAL SUPPLY
VOLTAGE
V
= ±5V
V = ±3V
S
V
= 0.2V
P-P
to 4V
P-P
S
V
= 0.2V
to 5V
P-P P-P
IN
IN
3
0
3
0
GAIN
GAIN
-3
-3
0
0
PHASE
PHASE
45
45
90
90
135
180
135
180
R
= 50Ω
R
= 50Ω
L
L
1M
10M
100M
600M
1M
10M
100M
600M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 17. FREQUENCY RESPONSE
FIGURE 18. FREQUENCY RESPONSE
FN6213.3
May 6, 2009
12
ISL84582
Typical Performance Curves
T
= +25°C, Unless Otherwise Specified. (Continued)
A
3
-10
10
20
30
40
50
60
70
80
90
V+ = 3V to 12V or
-20
-30
-40
-50
-60
-70
-80
-90
V
= ±2V to ±5V
= 50Ω
S
2
R
L
V+ = 3.3V
V- = 0V
1
V+ = 12V
V- = 0V
0
V+ = 5V
V- = 0V
ISOLATION
-1
-2
-3
-4
V
= ±5V
CROSSTALK
S
-100
-110
100
110
ALL HOSTILE CROSSTALK
-5
0
5
10
12
-2.5
2.5
7.5
1k
10k
100k
1M
10M
100M 500M
FREQUENCY (Hz)
V
(V)
COM
FIGURE 19. CROSSTALK AND OFF-ISOLATION
FIGURE 20. CHARGE INJECTION vs SWITCH VOLTAGE
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
ISL84582: 193
PROCESS:
Si Gate CMOS
FN6213.3
May 6, 2009
13
ISL84582
Thin Shrink Small Outline Plastic Packages (TSSOP)
M16.173
N
16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE
INCHES MILLIMETERS
MIN
INDEX
AREA
0.25(0.010)
M
B M
E
E1
-B-
GAUGE
PLANE
SYMBOL
MAX
0.043
0.006
0.037
0.012
0.008
0.201
0.177
MIN
-
MAX
1.10
0.15
0.95
0.30
0.20
5.10
4.50
NOTES
A
A1
A2
b
-
-
0.002
0.033
0.0075
0.0035
0.193
0.169
0.05
0.85
0.19
0.09
4.90
4.30
-
1
2
3
-
L
0.25
0.010
0.05(0.002)
SEATING PLANE
A
9
-A-
c
-
D
D
3
-C-
E1
e
4
α
0.026 BSC
0.65 BSC
-
A2
e
A1
c
E
0.246
0.020
0.256
0.028
6.25
0.50
6.50
0.70
-
b
0.10(0.004)
L
6
0.10(0.004) M
C
A M B S
N
16
16
7
o
o
o
o
0
8
0
8
-
α
NOTES:
Rev. 1 2/02
1. These package dimensions are within allowable dimensions of
JEDEC MO-153-AB, Issue E.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.15mm (0.006
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact. (Angles in degrees)
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6213.3
May 6, 2009
14
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Ultra Low ON-Resistance, Low Voltage, Single Supply, Dual SPDT Analog Switch in Chipscale Package
INTERSIL
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