ISL83220ECA [RENESAS]
LINE TRANSCEIVER, PDSO16, PLASTIC, MO-150-AC, SSOP-16;
| 型号： | ISL83220ECA |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | LINE TRANSCEIVER, PDSO16, PLASTIC, MO-150-AC, SSOP-16 驱动 光电二极管 接口集成电路 驱动器 |
| 文件： | 总11页 (文件大小：175K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISL83220E
TM
Data Sheet
September 2001
File Number 6011.1
+/-15kV ESD Protected, +3V to +5.5V,
1Microamp, 250kbps, RS-232
Transmitters/Receivers
Features
• ESD Protection for RS-232 I/O Pins to ±15kV (IEC1000)
• Drop in Replacement for SP3220E
The Intersil ISL83220E is a 3.0V to 5.5V powered RS-232
transmitter/receiver which meets ElA/TIA-232 and V.28/V.24
• Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
• Interoperable with RS-232 down to V
• Latch-Up Free
= 2.7V
CC
specifications, even at V
= 3.0V. Additionally, it provides
CC
itle
L32
E,
L32
E,
L32
E,
L32
E,
L32
E,
±15kV ESD protection (IEC 1000-4-2 Air Gap and Human
Body Model) on transmitter outputs and receiver inputs
(RS-232 pins). Targeted applications are PDAs, Palmtops,
and notebook and laptop computers where the low
operational, and even lower standby, power consumption is
critical. Efficient on-chip charge pumps, coupled with a
manual powerdown function, reduce the standby supply
current to a 1µA trickle. Small footprint packaging, and the
use of small, low value capacitors ensure board space
savings as well. Data rates greater than 250kbps are
guaranteed at worst case load conditions. This family is fully
compatible with 3.3V only systems, mixed 3.3V and 5.0V
systems, and 5.0V only systems.
• On-Chip Voltage Converters Require Only Four External
0.1µF Capacitors
• Manual Powerdown Feature with Receivers Active
• Separate Receiver Enable Pin
• R and T Hysteresis For Improved Noise Immunity
X
X
• Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps
• Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/µs
• Wide Power Supply Range . . . . . . . Single +3V to +5.5V
• Low Supply Current in Powerdown State. . . . . . . . . . .1µA
L32
E)
b-
t
-
kV
D
-
Applications
Table 1 summarizes the features of the ISL83320E, while
Application Note AN9863 summarizes the features of each
device comprising the ICL32XXE 3V family.
• Any System Requiring RS-232 Communication Ports
- Battery Powered, Hand-Held, and Portable Equipment
- Laptop Computers, Notebooks, Palmtops
- Modems, Printers and other Peripherals
- Digital Cameras
- Cellular/Mobile Phones
ted,
V to
.5V,
icro
p,
0kbp
S-
2
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
TABLE 1. SUMMARY OF FEATURES
DATA
RATE
NO. OF
MONITOR Rx.
(R
MANUAL
POWER-
DOWN?
AUTOMATIC
POWERDOWN
FUNCTION?
PART
NUMBER
NO. OF NO.OF
Rx. ENABLE
FUNCTION?
READY
OUTPUT?
Tx.
Rx.
)
(kbps)
OUTB
ISL83220E
1
1
0
250
YES
NO
YES
NO
ns-
t-
s/Re
v-
)
utho
)
ey-
rds
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc. | Copyright © Intersil Americas Inc. 2001
1
ISL83220E
Ordering Information
Pinout
ISL83220E (SOIC, SSOP, TSSOP)
(NOTE 1)
PART NO.
TEMP.
RANGE ( C)
TOP VIEW
o
PACKAGE
16 Ld SOIC
PKG. NO.
M16.3
ISL83220ECB
ISL83220EIB
ISL83220ECA
ISL83220EIA
ISL83220ECV
ISL83220EIV
NOTE:
0 to 70
16 SHDN
15
EN
C1+
V+
1
2
3
4
5
6
7
8
V
-40 to 85
0 to 70
16 Ld SOIC
16 Ld SSOP
16 Ld SSOP
16 Ld TSSOP
16 Ld TSSOP
M16.3
CC
14 GND
13 T1
M16.209
M16.209
M16.173
M16.173
C1-
C2+
C2-
V-
OUT
-40 to 85
0 to 70
12 N.C.
11 T1
IN
10 N.C.
R1
-40 to 85
R1
IN
9
OUT
1. Most surface mount devices are available on tape and reel; add
“-T” to suffix.
Pin Descriptions
PIN
FUNCTION
V
System power supply input (3.0V to 5.5V).
Internally generated positive transmitter supply (+5.5V).
Internally generated negative transmitter supply (-5.5V).
Ground connection.
CC
V+
V-
GND
C1+
C1-
C2+
C2-
External capacitor (voltage doubler) is connected to this lead.
External capacitor (voltage doubler) is connected to this lead.
External capacitor (voltage inverter) is connected to this lead.
External capacitor (voltage inverter) is connected to this lead.
TTL/CMOS compatible transmitter Inputs.
T
IN
T
±15kV ESD Protected, RS-232 level (nominally ±5.5V) transmitter outputs.
±15kV ESD Protected, RS-232 compatible receiver inputs.
TTL/CMOS level receiver outputs.
OUT
R
IN
R
OUT
EN
SHDN
N.C.
Active low receiver enable control; doesn’t disable R outputs.
OUTB
Active low input shuts down transmitters and on-board power supply, to place device in low power mode.
No internal connection.
Typical Operating Circuit
ISL83220E
+3.3V
+
0.1µF
15
2
+
4
C
0.1µF
3
C1+
1
V
CC
C
0.1µF
3
+
V+
V-
C1-
5
C
0.1µF
2
C2+
+
7
C
4
0.1µF
6
C2-
+
T
1
11
13
T1
OUT
T1
IN
TTL/CMOS
RS-232
LOGIC LEVELS
9
1
8
LEVELS
R1
R1
OUT
IN
5kΩ
R
1
EN
16
V
CC
SHDN
GND
14
2
ISL83220E
Absolute Maximum Ratings
Thermal Information
o
V
to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
Thermal Resistance (Typical, Note 2)
θ
( C/W)
CC
JA
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
16 Ld Wide SOIC Package . . . . . . . . . . . . . . . . . . .
16 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
16 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . .
Moisture Sensitivity (see Technical Brief TB363)
All Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1
Maximum Junction Temperature (Plastic Package) . . . . . . . 150 C
Maximum Storage Temperature Range. . . . . . . . . . -65 C to 150 C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300 C
(Lead Tips Only)
100
135
145
T
, EN, SHDN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
IN
o
R
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
IN
Output Voltages
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V
o
o
o
T
OUT
R
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V
+0.3V
OUT
Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
CC
T
OUT
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Operating Conditions
Temperature Range
ISL83220ECX. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 C to 70 C
ISL83220EIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 C to 85 C
o
o
o
o
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
2. θ is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
Electrical Specifications Test Conditions: V = 3V to 5.5V, C - C = 0.1µF; Unless Otherwise Specified.
CC
1
4
o
Typicals are at T = 25 C
A
TEMP
o
PARAMETER
DC CHARACTERISTICS
Supply Current
TEST CONDITIONS
( C)
MIN
TYP
MAX
UNITS
All Outputs Unloaded,
SHDN = V
V
= 3.15V
25
25
-
-
0.3
1.0
1.0
10
mA
CC
CC
SHDN = GND
Supply Current, Powerdown
µA
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold Low
Input Logic Threshold High
T
T
, EN, SHDN
, EN, SHDN
Full
Full
Full
25
-
-
0.8
V
V
IN
IN
V
V
= 3.3V
= 5.0V
2.0
-
-
-
-
CC
2.4
V
CC
Transmitter Input Hysteresis
Input Leakage Current
Output Leakage Current
Output Voltage Low
-
-
-
-
0.3
±0.01
±0.05
-
V
T
, EN, SHDN
Full
Full
Full
Full
±1.0
±10
0.4
-
µA
µA
V
IN
EN = V
CC
I
I
= 1.6mA
= -1.0mA
OUT
OUT
Output Voltage High
V
-0.6
V
-0.1
V
CC
CC
TRANSMITTER OUTPUTS
Output Voltage Swing
Output Resistance
All Transmitter Outputs Loaded with 3kΩ to Ground
Full
Full
Full
Full
±5.0
±5.4
-
V
Ω
V
V
V
= V+ = V- = 0V, Transmitter Output = ±2V
300
10M
±35
-
-
CC
Output Short-Circuit Current
Output Leakage Current
RECEIVER INPUTS
= 0V
-
-
±60
±25
mA
µA
OUT
OUT
= ±12V, V
= 0V or 3V to 5.5V, SHDN = GND
CC
Input Voltage Range
Full
Full
Full
-25
0.6
0.8
-
25
-
V
V
V
Input Threshold Low
V
V
= 3.3V
= 5.0V
1.2
1.5
CC
CC
-
3
ISL83220E
Electrical Specifications Test Conditions: V = 3V to 5.5V, C - C = 0.1µF; Unless Otherwise Specified.
CC
1
4
o
Typicals are at T = 25 C (Continued)
A
TEMP
o
PARAMETER
TEST CONDITIONS
( C)
MIN
TYP
1.5
1.8
0.3
5
MAX
2.4
2.4
-
UNITS
Input Threshold High
V
V
= 3.3V
= 5.0V
Full
Full
25
-
-
V
V
CC
CC
Input Hysteresis
-
V
Input Resistance
Full
3
7
kΩ
TIMING CHARACTERISTICS
Maximum Data Rate
R
= 3kΩ, C = 1000pF, One Transmitter Switching
Full
25
250
500
1.0
1.0
-
-
-
kbps
µs
L
L
Transmitter Propagation Delay
Transmitter Input to
Transmitter Output,
R
t
t
-
-
PHL
PLH
25
µs
= 3kΩ, C = 1000pF
L
L
Receiver Propagation Delay
Receiver Input to Receiver
Output, C = 150pF
L
t
t
25
25
25
25
25
Full
25
25
-
-
0.20
0.30
200
200
100
100
-
-
-
µs
µs
PHL
PLH
Receiver Output Enable Time
Receiver Output Disable Time
Transmitter Skew
Normal Operation
Normal Operation
-
-
ns
-
-
ns
t
t
- t
PHL PLH
(Note 3)
-
500
1000
30
30
ns
Receiver Skew
- t
PHL PLH
-
ns
Transition Region Slew Rate
V
R
= 3.3V,
C = 150pF to 2500pF
4
6
V/µs
V/µs
CC
= 3kΩ to 7kΩ,
L
L
C = 150pF to 1000pF
-
L
Measured From 3V to -3V or
-3V to 3V
ESD PERFORMANCE
RS-232 Pins (T
, R
)
Human Body Model
25
25
25
25
-
-
-
-
±15
±8
-
-
-
-
kV
kV
kV
kV
OUT IN
IEC1000-4-2 Contact Discharge
IEC1000-4-2 Air Gap Discharge
Human Body Model
±15
±3
All Other Pins
NOTE:
3. Transmitter skew is measured at the transmitter zero crossing points.
Transmitters
Detailed Description
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. Coupled with the on-chip ±5.5V supplies,
these transmitters deliver true RS-232 levels over a wide
range of single supply system voltages.
The ISL83220E operates from a single +3V to +5.5V supply,
guarantees a 250kbps minimum data rate, requires only four
small external 0.1µF capacitors, features low power
consumption, and meets all ElA RS-232C and V.28
specifications. The circuit is divided into three sections: The
charge pump, the transmitter, and the receiver.
The transmitter output disables and assumes a high
impedance state when the device enters the powerdown
mode (see Table 2). This output may be driven to ±12V when
disabled.
Charge-Pump
Intersil’s new 3.3V family utilizes regulated on-chip dual
charge pumps as voltage doublers, and voltage inverters to
generate ±5.5V transmitter supplies from a V
supply as
All devices guarantee a 250kbps data rate for full load
CC
low as 3.0V. This allows these devices to maintain RS-232
compliant output levels over the ±10% tolerance range of
3.3V powered systems. The efficient on-chip power supplies
require only four small, external 0.1µF capacitors for the
conditions (3kΩ and 1000pF), V
≥ 3.0V. Under more
CC
≥ 3.3V, R = 3kΩ, and C = 250pF,
typical conditions of V
CC
L
L
the ISL83220E easily operates at 900kbps.
Transmitter inputs float if left unconnected, and may cause
increases.
voltage doubler and inverter functions, even at V
= 3.3V.
CC
I
CC
The charge pumps operate discontinuously (i.e., they turn off
as soon as the V+ and V- supplies are pumped up to the
nominal values), resulting in significant power savings.
4
ISL83220E
section). The time to recover from manual powerdown mode
Receivers
is typically 100µs.
The ISL83220E device contains a standard inverting
receiver that three-states via the EN control line. Receivers
convert RS-232 signals to CMOS output levels and accept
inputs up to ±25V while presenting the required 3kΩ to 7kΩ
input impedance (see Figure 1) even if the power is off
TABLE 2. POWERDOWN AND ENABLE LOGIC TRUTH TABLE
SHDN
EN
TRANSMITTER RECEIVER
MODE OF
OPERATION
INPUT INPUT
OUTPUT
OUTPUT
(V
= 0V). The receiver’s Schmitt trigger input stage uses
CC
L
L
L
High-Z
Active
Manual
Powerdown
hysteresis to increase noise immunity and decrease errors
due to slow input signal transitions.
H
High-Z
High-Z
Manual
Powerdown
w/Rcvr. Disabled
The ISL83220E receiver disables only when EN is driven
high. (see Table 2). This allows the receiver to monitor
external devices, like a modem, even when the ISL83220E is
in its 1µA powerdown state.
H
H
L
Active
Active
Active
High-Z
Normal
Operation
Standard receivers driving powered down peripherals must
be disabled to prevent current flow through the peripheral’s
protection diodes (see Figures 2). This renders them
useless for wake up functions.
H
Normal
Operation
w/Rcvr. Disabled
V
CC
V
CC
V
CC
CURRENT
FLOW
R
R
V
1IN
1OUT
CC
GND ≤ V
≤ V
CC
-25V ≤ V
≤ +25V
5kΩ
ROUT
RIN
V
= V
CC
OUT
GND
Rx
FIGURE 1. INVERTING RECEIVER CONNECTIONS
POWERED
DOWN
UART
Operation down to 2.7V
ISL83220E transmitter outputs meet RS-562 levels (±3.7V)
Tx
OLD
RS-232 CHIP
SHDN = GND
GND
with V
as low as 2.7V. RS-562 levels typically ensure inter
CC
operability with RS-232 devices.
FIGURE 2. POWER DRAIN THROUGH POWERED DOWN
PERIPHERAL
Powerdown Functionality
This 3V family of RS-232 interface devices requires a
nominal supply current of 0.3mA during normal operation
(not in powerdown mode), which is considerably less than
the 5mA to 11mA current required of 5V RS-232 devices.
The already low current requirement drops significantly
when the device enters powerdown mode. In powerdown,
supply current drops to 1µA, because the on-chip charge
Receiver ENABLE Control
The ISL83220E also features an EN input to control the
receiver output. Driving EN high disables the receiver output
placing it in a high impedance state. This is useful to
eliminate supply current, due to a receiver output forward
biasing the protection diode, when driving the input of a
pump turns off (V+ collapses to V , V- collapses to GND),
powered down (V
= GND) peripheral (see Figure 2).
CC
CC
and the transmitter outputs three-state. This micro-power
mode makes these devices ideal for battery powered and
portable applications.
Capacitor Selection
The charge pumps require 0.1µF capacitors for 3.3V
operation. Do not use values smaller than 0.1µF. Increasing
the capacitor values (by a factor of 2) reduces ripple on the
transmitter outputs and slightly reduces power consumption.
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor’s equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
Software Controlled (Manual) Powerdown
On the ISL83220E, the powerdown control is via a simple
shutdown (SHDN) pin. Driving this pin high enables normal
operation, while driving it low forces the IC into it’s
powerdown state. Connect SHDN to V
if the powerdown
CC
function isn’t needed. Note that the receiver output remains
enabled during shutdown (see Table 2). For the lowest
power consumption during powerdown, the receiver should
also be disabled by driving the EN input high (see next
5
ISL83220E
Power Supply Decoupling
In most circumstances a 0.1µF bypass capacitor is
V
CC
+
0.1µF
adequate. In applications that are particularly sensitive to
power supply noise, decouple V
capacitor of the same value as the charge-pump capacitor C .
Connect the bypass capacitor as close as possible to the IC.
to ground with a
CC
V
CC
V+
V-
+
C1+
C1-
C2+
C2-
+
1
C
1
2
C
3
4
ISL83220E
+
Transmitter Output when Exiting
Powerdown
C
+
C
Figure 3 shows the response of the transmitter output when
exiting powerdown mode. As it activates, the transmitter
output properly goes to RS-232 levels, with no glitching,
ringing, nor undesirable transients. The transmitter is loaded
with 3kΩ in parallel with 2500pF. Note that the transmitter
enables only when the magnitude of the supplies exceed
approximately 3V.
T
T
OUT
IN
1000pF
R
IN
R
OUT
EN
5k
V
SHDN
CC
FIGURE 4. TRANSMITTER LOOPBACK TEST CIRCUIT
5V/DIV.
SHDN
T
= LOW
5V/DIV.
IN
T1
IN
2V/DIV.
T1
OUT
T
= HIGH
IN
V
= +3.3V
CC
R1
OUT
C1 - C4 = 0.1µF
V
= +3.3V
CC
C1 - C4 = 0.1µF
TIME (20µs/DIV.)
FIGURE 3. TRANSMITTER OUTPUT WHEN EXITING
POWERDOWN
5µs/DIV.
FIGURE 5. LOOPBACK TEST AT 120kbps
High Data Rates
The ISL83220E maintains the RS-232 ±5V minimum
transmitter output voltages even at high data rates. Figure 4
details a transmitter loopback test circuit, and Figure 5
illustrates the loopback test result at 120kbps. For this test,
the transmitter is driving an RS-232 load in parallel with
1000pF, at 120kbps. Figure 6 shows the loopback results for
the transmitter driving 1000pF and an RS-232 load at
250kbps.
5V/DIV.
T1
IN
T1
OUT
R1
OUT
V
= +3.3V
CC
C1 - C4 = 0.1µF
2µs/DIV.
FIGURE 6. LOOPBACK TEST AT 250kbps
6
ISL83220E
current limiting resistor coupled with the larger charge
Interconnection with 3V and 5V Logic
storage capacitor yields a test that is much more severe than
the HBM test. The extra ESD protection built into this
device’s RS-232 pins allows the design of equipment
meeting level 4 criteria without the need for additional board
level protection on the RS-232 port.
The ISL83220E directly interfaces with 5V CMOS and TTL
logic families. Nevertheless, with the ISL83220E at 3.3V, and
the logic supply at 5V, AC, HC, and CD4000 outputs can
drive ISL83220E inputs, but ISL83220E outputs do not reach
the minimum V for these logic families. See Table 3 for
IH
more information.
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward the
IC pin until the voltage arcs to it. The current waveform
delivered to the IC pin depends on approach speed,
humidity, temperature, etc., so it is difficult to obtain
repeatable results. The “E” device RS-232 pins withstand
±15kV air-gap discharges.
TABLE 3. LOGIC FAMILY COMPATIBILITY WITH VARIOUS
SUPPLY VOLTAGES
SYSTEM
V
CC
POWER-SUPPLY SUPPLY
VOLTAGE
(V)
VOLTAGE
(V)
COMPATIBILITY
3.3
3.3
Compatible with all CMOS
families.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages
higher than ±8kV. All “E” family devices survive ±8kV contact
discharges on the RS-232 pins.
5
5
Compatible with all TTL and
CMOS logic families.
5
3.3
Compatible with ACT and HCT
CMOS, and with TTL. ISL83320E
outputs are incompatible with AC,
HC, and CD4000 CMOS inputs.
±15kV ESD Protection
All pins on ISL8XXX devices include ESD protection
structures, but the ISL8XXXE family incorporates advanced
structures which allow the RS-232 pins (transmitter outputs
and receiver inputs) to survive ESD events up to ±15kV. The
RS-232 pins are particularly vulnerable to ESD damage
because they typically connect to an exposed port on the
exterior of the finished product. Simply touching the port
pins, or connecting a cable, can cause an ESD event that
might destroy unprotected ICs. These new ESD structures
protect the device whether or not it is powered up, protect
without allowing any latchup mechanism to activate, and
don’t interfere with RS-232 signals as large as ±25V.
Human Body Model (HBM) Testing
As the name implies, this test method emulates the ESD
event delivered to an IC during human handling. The tester
delivers the charge through a 1.5kΩ current limiting resistor,
making the test less severe than the IEC-1000 test which
utilizes a 330Ω limiting resistor. The HBM method
determines an ICs ability to withstand the ESD transients
typically present during handling and manufacturing. Due to
the random nature of these events, each pin is tested with
respect to all other pins. The RS-232 pins on “E” family
devices can withstand HBM ESD events to ±15kV.
IEC1000-4-2 Testing
The IEC 1000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely
to suffer an ESD event are those that are exposed to the
outside world (the RS-232 pins in this case), and the IC is
tested in its typical application configuration (power applied)
rather than testing each pin-to-pin combination. The lower
7
ISL83220E
o
Typical Performance Curves V = 3.3V, T = 25 C
CC
A
6
4
25
20
V
+
OUT
2
TRANSMITTER AT 250kbps
0
15
10
5
-SLEW
-2
-4
-6
+SLEW
V
-
OUT
0
1000
2000
3000
4000
5000
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
FIGURE 7. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
FIGURE 8. SLEW RATE vs LOAD CAPACITANCE
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
NO LOAD
ALL OUTPUTS STATIC
45
40
35
250kbps
30
25
20
15
10
5
120kbps
20kbps
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
0
1000
2000
3000
4000
5000
SUPPLY VOLTAGE (V)
LOAD CAPACITANCE (pF)
FIGURE 9. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FIGURE 10. SUPPLY CURRENT vs SUPPLY VOLTAGE
Die Characteristics
DIE DIMENSIONS:
PASSIVATION:
100 mils x 100 mils (2540µm x 2540µm)
Type: Silox
Thickness: 13kÅ
METALLIZATION:
TRANSISTOR COUNT:
Type: Metal 1: AISi(1%)
Thickness: Metal 1: 8kÅ
Type: Metal 2: AISi (1%)
Thickness: Metal 2: 10kÅ
286
PROCESS:
Si Gate CMOS
SUBSTRATE POTENTIAL (POWERED UP):
GND
8
ISL83220E
Thin Shrink Small Outline Plastic Packages (TSSOP)
M16.173
N
16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC
PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
E
E1
-B-
INCHES
MIN
MILLIMETERS
GAUGE
PLANE
SYMBOL
MAX
0.047
0.006
0.051
0.0118
0.0079
0.201
0.177
MIN
-
MAX
1.20
0.15
1.05
0.30
0.20
5.10
4.50
NOTES
A
A1
A2
b
-
-
1
2
3
0.002
0.031
0.0075
0.0035
0.193
0.169
0.05
0.80
0.19
0.09
4.90
4.30
-
L
-
0.25
0.010
0.05(0.002)
SEATING PLANE
A
9
-A-
D
c
-
D
E1
e
3
-C-
4
α
A2
e
A1
0.026 BSC
0.65 BSC
-
c
b
E
0.246
0.256
6.25
0.45
6.50
0.75
-
0.10(0.004)
0.10(0.004) M
C
A M B S
L
0.0177
0.0295
6
N
α
16
16
7
o
0
o
8
o
0
o
8
NOTES:
-
1. These package dimensions are within allowable dimensions of
JEDEC MO-153-AB, Issue E.
Rev. 0 6/98
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm
(0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.15mm (0.006 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimen-
sion at maximum material condition. Minimum space between protru-
sion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact. (Angles in degrees)
9
ISL83220E
Small Outline Plastic Packages (SSOP)
M16.209 (JEDEC MO-150-AC ISSUE B)
N
16 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
INCHES
MILLIMETERS
E
GAUGE
PLANE
SYMBOL
MIN
MAX
0.078
-
MIN
-
MAX
2.00
-
NOTES
-B-
A
A1
A2
B
-
-
-
0.002
0.065
0.009
0.004
0.233
0.197
0.05
1.65
0.22
0.09
5.90
5.00
1
2
3
0.072
0.014
0.009
0.255
0.220
1.85
0.38
0.25
6.50
5.60
-
L
0.25
0.010
SEATING PLANE
A
9
-
-A-
C
D
E
D
3
4
-
-C-
α
µ
e
0.026 BSC
0.65 BSC
A2
e
A1
C
H
L
0.292
0.022
0.322
0.037
7.40
0.55
8.20
0.95
-
B
0.10(0.004)
6
7
-
0.25(0.010) M
C
A M B S
N
α
16
16
o
0
o
8
o
0
o
8
NOTES:
Rev. 2 3/95
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimen-
sion at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
10
ISL83220E
Small Outline Plastic Packages (SOIC)
M16.3 (JEDEC MS-013-AA ISSUE C)
N
16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
INCHES
MILLIMETERS
E
SYMBOL
MIN
MAX
MIN
2.35
0.10
0.33
0.23
MAX
2.65
0.30
0.51
0.32
10.50
7.60
NOTES
-B-
A
A1
B
C
D
E
e
0.0926
0.0040
0.013
0.1043
0.0118
0.0200
0.0125
-
-
1
2
3
L
9
SEATING PLANE
A
0.0091
0.3977
0.2914
-
-A-
o
0.4133 10.10
3
h x 45
D
0.2992
7.40
4
-C-
0.050 BSC
1.27 BSC
-
α
µ
H
h
0.394
0.010
0.016
0.419
0.029
0.050
10.00
0.25
0.40
10.65
0.75
1.27
-
e
A1
C
5
B
0.10(0.004)
L
6
0.25(0.010) M
C A M B S
N
α
16
16
7
o
0
o
8
o
0
o
8
-
NOTES:
Rev. 0 12/93
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm (0.024
inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
All Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.
Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable.
However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its
use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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NORTH AMERICA
Intersil Corporation
7585 Irvine Center Drive
Suite 100
Irvine, CA 92618
TEL: (949) 341-7000
FAX: (949) 341-7123
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ASIA
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2401 Palm Bay Rd.
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11
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