EL5170ISZ-T13 [RENESAS]
100MHz Differential Twisted-Pair Drivers; MSOP8, SOIC8; Temp Range: -40° to 85°C;
| 型号： | EL5170ISZ-T13 |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | 100MHz Differential Twisted-Pair Drivers; MSOP8, SOIC8; Temp Range: -40° to 85°C |
| 文件： | 总14页 (文件大小：711K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
EL5170, EL5370
100MHz Differential Twisted-Pair Drivers
FN7309
Rev 10.00
August 14, 2015
The EL5170 and EL5370 are single and triple high bandwidth
amplifiers with a fixed gain of 2. They are primarily targeted for
applications such as driving twisted-pair lines in component video
applications. The inputs signal can be in either single-ended or
differential form but the outputs are always in differential form.
Features
• Fully differential inputs and outputs
• Differential input range ±2.3V typ.
• 100MHz 3dB bandwidth at fixed gain of 2
• 1100V/µs slew rate
The output common mode level for each channel is set by the
associated V
pin, which have a -3dB bandwidth of over
REF
• Single 5V or dual ±5V supplies
• 50mA maximum output current
• Low power - 7.4mA per channel
• Pb-free available (RoHS compliant)
70MHz. Generally, these pins are grounded but can be tied to
any voltage reference.
All outputs are short circuit protected to withstand temporary
overload condition.
The EL5170 and EL5370 are specified for operation over the
full -40°C to +85°C temperature range.
Applications
• Twisted-pair drivers
• Differential line drivers
• VGA over twisted-pairs
• ADSL/HDSL drivers
• Single ended to differential amplification
• Transmission of analog signals in a noisy environment
Pinouts
EL5170
(8 LD SOIC, MSOP)
TOP VIEW
EL5370
(24 LD QSOP)
TOP VIEW
EN 1
INP1 2
INN1 3
REF1 4
NC 5
24 OUT1
23 OUT1B
22 NC
IN+
EN
1
2
3
4
8
7
6
5
OUT+
VS-
+
-
+
-
IN-
VS+
21 VSP
20 VSN
19 NC
REF
OUT-
INP2 6
INN2 7
REF2 8
NC 9
18 OUT2
17 OUT2B
16 NC
+
-
INP3 10
INN3 11
REF3 12
15 OUT3
14 OUT3B
13 NC
+
-
FN7309 Rev 10.00
August 14, 2015
Page 1 of 14
EL5170, EL5370
Pin Descriptions
EL5170
EL5370
PIN NAME
PIN FUNCTION
1
2
3
4
5
6
7
8
IN+
Non-inverting input
Enable
1
EN
IN-
Inverting input
REF
OUT-
Reference input, sets common-mode output voltage
Inverting output
VS+
Positive supply
VS-
Negative supply
OUT+
Non-inverting output
2, 6, 10
3, 7, 11
4, 8, 12
14, 17, 23
21
INP1, INP2, INP3
INN1, INN2, INN3
REF1, REF2, REF3
OUT3B, OUT2B, OUT1B
VSP
Non-inverting inputs
Inverting inputs
Reference input, sets common-mode output voltage
Inverting outputs
Positive supply
20
VSN
Negative supply
15,
OUT3, OUT2, OUT1
Non-inverting outputs
18, 24
5, 9, 13, 16, 19, 22
NC
No connects; grounded for best crosstalk performance
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(RoHS Compliant)
PKG.
DWG. #
EL5170ISZ
EL5170IYZ
5170ISZ
BAAVA
5170ISZ
BAAVA
8 Ld SOIC (150 mil)
M8.15E
8 Ld MSOP (3.0mm)
24 Ld QSOP (150 mil)
M8.118A
EL5370IUZ (No longer available EL5370IUZ
or supported)
EL5370IUZ
MDP0040
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for EL5170, EL5370. For more information on MSL please see tech brief
TB363.
FN7309 Rev 10.00
August 14, 2015
Page 2 of 14
EL5170, EL5370
Absolute Maximum Ratings (T = +25°C)
Thermal Information
A
Supply Voltage (V + to V -) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6V
Supply Voltage Rate-of-rise (dV/dT) . . . . . . . . . . . . . . . . . . . . . . . . . . . 1V/µs
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+135°C
Recommended Operating Temperature . . . . . . . . . . . . . . .-40°C to +85°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Power Dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
S
S
Input Voltage (IN+, IN- to V +, V -) . . . . . . . . . . . . . V - - 0.3V to V + + 0.3V
S
S
S
S
Differential Input Voltage (IN+ to IN-). . . . . . . . . . . . . . . . . . . . . . . . . . ±4.8V
Maximum Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±60mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
Electrical Specifications V + = +5V, V - = -5V, T = +25°C, V = 0V, A = 2, R = 200, C = 1pF, Unless Otherwise
S
S
A
IN
V
LD
LD
Specified.
MIN
(Note 4)
MAX
(Note 4)
PARAMETER
AC PERFORMANCE
DESCRIPTION
CONDITIONS
TYP
UNIT
BW
BW
SR
-3dB Bandwidth
100
12
MHz
MHz
V/µs
ns
± 0.1dB Bandwidth
Slew Rate
V
V
= 2V , 20% to 80%
P-P
800
1100
20
OUT
t
t
Settling Time to 0.1%
= 2V
P-P
STL
OUT
Output Overdrive Recovery time
40
ns
OVR
V
V
V
V
BW (-3dB)
SR+
V
V
V
-3dB Bandwidth
Slew Rate - Rise
Slew Rate - Fall
A =1, C = 2.7pF
70
MHz
V/µs
V/µs
nV/Hz
dBc
dBc
dBc
dBc
%
REF
REF
REF
N
REF
REF
REF
V
LD
V
V
= 2V , 20% to 80%
125
65
OUT
OUT
P-P
SR-
= 2V , 20% to 80%
P-P
Input Voltage Noise
f = 10kHz
28
HD2
HD2
HD3
HD3
dG
Second Harmonic Distortion
Second Harmonic Distortion
Third Harmonic Distortion
Third Harmonic Distortion
Differential Gain at 3.58MHz
Differential Phase at 3.58MHz
V
V
V
V
= 2V , 1MHz
P-P
-79
-65
-62
-43
0.14
0.38
85
OUT
OUT
OUT
OUT
= 2V , 10MHz
P-P
= 2V , 1MHz
P-P
= 2V , 10MHz
P-P
R
= 300, A = 2
V
LD
LD
d
R
= 300, A = 2
°
V
e
Channel Separation - For EL5370 only
INPUT CHARACTERISTICS
Input Referred Offset Voltage
Input Bias Current (V , V
at f = 1MHz
dB
S
V
±6
-6
±25
-2
mV
µA
µA
µA
V
OS
I
)
IN INB
-10
0.5
-1
IN
REF
I
Input Bias Current at REF Pin
V
V
V
= +3.2V
= -3.2V
1.25
0
3
REF
+1
REF
Gain
Gain Accuracy
= ±1V
1.98
2
2.02
IN
R
Differential Input Resistance
Differential Input Capacitance
Differential Mode Input Range
300
1
k
pF
V
IN
C
IN
DMIR
CMIR+
CMIR-
±2.1
3.2
±2.3
3.4
-4.5
Common Mode Positive Input Range at V +, V
-
V
IN IN
Common Mode Negative Input Range at V +, V
IN
-
-4.2
V
IN
FN7309 Rev 10.00
August 14, 2015
Page 3 of 14
EL5170, EL5370
Electrical Specifications V + = +5V, V - = -5V, T = +25°C, V = 0V, A = 2, R = 200, C = 1pF, Unless Otherwise
S
S
A
IN
V
LD
LD
Specified. (Continued)
MIN
MAX
PARAMETER
DESCRIPTION
CONDITIONS
(Note 4)
TYP
3.8
-3.3
60
(Note 4)
UNIT
V
V
V
Reference Input Voltage Range - Positive
Reference Input Voltage Range - Negative
V
+ = V - = 0V
IN
3.4
REFIN
IN
-3
V
Output Offset Relative to V
-140
65
+140
mV
dB
REFOS
REF
Input Common Mode Rejection Ratio
OUTPUT CHARACTERISTICS
CMRR
V
= ±2.5V
84
IN
V
Positive Output Voltage Swing
Negative Output Voltage Swing
Maximum Output Current
R
= 200
3.3
3.6
-3.3
±80
±85
60
V
OUT
LD
-3
V
I
(Max)
R = 10(EL5170)
±50
±70
mA
mA
m
OUT
L
R = 10(EL5370)
L
R
Output Impedance
OUT
SUPPLY
V
Supply Operating Range
V + to V -
4.75
6
11
8.4
100
-90
5
V
SUPPLY
S
S
I
I
I
I
I
Power Supply Current - Per Channel
Positive Power Supply Current - Disabled
Negative Power Supply Current - Disabled
Positive Power Supply Current - Disabled
Negative Power Supply Current - Disabled
Power Supply Rejection Ratio
7.4
80
mA
µA
µA
µA
µA
dB
dB
S(ON)
+
-
EN pin tied to 4.8V (EL5170)
EN pin tied to 4.8V (EL5370)
60
S(OFF)
S(OFF)
S(OFF)
S(OFF)
-150
0.5
-150
70
-120
2
+
-
-120
83
-90
PSRR
V
V
from ±4.5V to ±5.5V (EL5170)
from ±4.5V to ±5.5V (EL5370)
S
65
83
S
ENABLE
t
t
Enable Time
200
1
ns
µs
V
EN
DS
Disable Time
V
V
EN Pin Voltage for Power-Up
EN Pin Voltage for Shutdown
EN Pin Input Current High - Per Channel
EN Pin Input Current Low - Per Channel
V + -1.5
S
IH
V + -0.5
S
V
IL
I
I
At V = 5V
EN
40
-3
50
µA
µA
IH-EN
IL-EN
At V = 0V
EN
-6
NOTE:
4. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
FN7309 Rev 10.00
August 14, 2015
Page 4 of 14
EL5170, EL5370
Typical Performance Curves
C
= 1pF, V
= 200mV
ODP-P
V
= ±5V, A = 2, R = 200C = 1pF
V LD LD
LD
S
10
9
8
7
6
5
4
3
2
1
0
10
9
8
7
6
5
4
3
2
1
0
R
R
= 1k
LD
= 500
LD
V
= 200mV
OP-P
R
= 200
= 100
LD
V
= 2V
OP-P
R
LD
V
= 1V
OP-P
100k
1M
10M
FREQUENCY (Hz)
100M
1G
100k
1M
10M
FREQUENCY (Hz)
100M
1G
FIGURE 2. SMALL SIGNAL FREQUENCY RESPONSE vs R
FIGURE 1. FREQUENCY RESPONSE
LD
V
= ±5V, R = 200V
LD
= 200mV
ODP-P
S
4
3
2
11
10
9
C
= 75pF
= 40pF
LD
V
= 200mV
P-P
1
0
REF
C
LD
8
7
-1
-2
-3
-4
-5
-6
6
C
= 20pF
LD
C
5
V
= 1V
P-P
REF
4
= 0pF
LD
3
2
1
1M
10M
FREQUENCY (Hz)
100M
100k
1M
10M
FREQUENCY (Hz)
100M
1G
FIGURE 4. FREQUENCY RESPONSE vs V
FIGURE 3. SMALL SIGNAL FREQUENCY RESPONSE vs C
REF
LD
100
V
INCM
+
V
-
V
ODM
100
OCM
0
-10
-20
-30
-10
-20
-30
-40
-50
-60
-70
-80
-90
-40
-50
V
/V
OCM INCM
PSRR-
-60
-70
V
/V
PSRR+
ODM INCM
-80
-90
100k
1M
10M
100M
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 5. POWER SUPPLY REJECTION RATIO vs FREQUENCY
FIGURE 6. COMMON MODE REJECTION vs FREQUENCY
FN7309 Rev 10.00
August 14, 2015
Page 5 of 14
EL5170, EL5370
Typical Performance Curves (Continued)
100
V
IN
+
-
R
V
V
CM
T
ODM
R
100
1000
100
10
0
-10
-20
-30
-40
-50
-60
V
/V
OCM ODM
100k
1M
10M
100M
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 8. INPUT VOLTAGE NOISE vs FREQUENCY
FIGURE 7. DIFFERENTIAL MODE OUTPUT BALANCE ERROR vs
FREQUENCY
R
= 200
LD
110
105
-40
-50
CH2 <=> CH1
CH3 <=> CH2
CH2 <=> CH3
CH1<=> CH2
-60
100
95
-70
-80
-90
90
CH3 <=> CH1
85
80
-100
-110
CH1 <=> CH3
10M
FREQUENCY (Hz)
100k
1M
100M
4
5
6
7
8
9
10
11
12
V
(V)
S
FIGURE 10. BANDWIDTH vs SUPPLY VOLTAGE
FIGURE 9. CHANNEL ISOLATION vs FREQUENCY
V
= ±5V, R = 200V
LD
= 2V
S
OP-P
-30
-40
-50
-60
-70
7.78
7.76
7.74
7.72
7.70
7.68
7.66
7.64
7.62
HD3
I +
S
I -
S
HD2
-80
-90
7.60
7.58
0M 2M 4M 6M 8M 10M 12M 14M 16M 18M 20M
4
5
6
7
8
9
10
11
FREQUENCY (Hz)
V
(V)
S
FIGURE 12. HARMONIC DISTORTION vs FREQUENCY
FIGURE 11. SUPPLY CURRENT vs SUPPLY VOLTAGE
FN7309 Rev 10.00
August 14, 2015
Page 6 of 14
EL5170, EL5370
Typical Performance Curves (Continued)
500mV/DIV
0.5V/DIV
20ns/DIV
40ns/DIV
FIGURE 14. LARGE SIGNAL TRANSIENT RESPONSE
FIGURE 13. V
COM
TRANSIENT RESPONSE
100mV/DIV
20ns/DIV
FIGURE 15. SMALL SIGNAL TRANSIENT RESPONSE
FIGURE 16. DISABLED RESPONSE
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.2
1.0
870mW
0.8
0.6
QSOP24
625mW
= +115°C/W
JA
SO8
= +160°C/W
JA
0.4 486mW
MSOP8
= +206°C/W
0.2
0
JA
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 18. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 17. ENABLED RESPONSE
FN7309 Rev 10.00
August 14, 2015
Page 7 of 14
EL5170, EL5370
Typical Performance Curves (Continued)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1.136W
QSOP24
909mW
= +88°C/W
JA
SO8
870mW
= +110°C/W
JA
MSOP8/10
= +115°C/W
JA
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 19. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Simplified Schematic
200
V +
S
R
R
3
4
R
R
2
1
R
R
7
8
IN+
IN-
FBP
FBN
V
V
B1
OUT+
OUT-
R
R
CD
CD
REF
10
R
R
9
B2
C
C
C
C
R
R
5
6
V -
S
200
400
FN7309 Rev 10.00
August 14, 2015
Page 8 of 14
EL5170, EL5370
logic signal is relative to V + pin. Letting the EN pin float or
S
Description of Operation and
Application Information
Product Description
applying a signal that is less than 1.5V below V + will enable
S
the amplifier. The amplifier will be disabled when the signal at
EN pin is above V + -0.5V.
S
The EL5170 and EL5370 are wide bandwidth, low power and
single/differential ended to differential output amplifiers. They
have a fixed gain of 2. The EL5170 is a single channel
differential amplifier. The EL5370 is a triple channel
differential amplifier. The EL5170 and EL5370 have a -3dB
bandwidth of 100MHz while driving a 200 differential load.
The EL5170 and EL5370 are available with a power-down
feature to reduce the power while the amplifiers are disabled.
Output Drive Capability
The EL5170 and EL5370 have internal short circuit protection.
Its typical short circuit current is ±80mA. If the output is
shorted indefinitely, the power dissipation could easily
increase such that the part will be destroyed. Maximum
reliability is maintained if the output current never exceeds
±60mA. This limit is set by the design of the internal metal
interconnect.
Input, Output and Supply Voltage Range
Power Dissipation
The EL5170 and EL5370 have been designed to operate with a
single supply voltage of 5V to 10V or split supplies with its total
voltage from 5V to 10V. The amplifiers have an input common
mode voltage range from -4.5V to 3.4V for ±5V supply. The
differential mode input range (DMIR) between the two inputs
is from -2.3V to +2.3V. The input voltage range at the REF pin is
from -3.3V to 3.8V. If the input common mode or differential
mode signal is outside the above-specified ranges, it will cause
the output signal to become distorted.
With the high output drive capability of the EL5170 and EL5370
it is possible to exceed the +125°C absolute maximum junction
temperature under certain load current conditions. Therefore, it
is important to calculate the maximum junction temperature for
the application to determine if the load conditions or package
types need to be modified for the amplifier to remain in the safe
operating area.
The maximum power dissipation allowed in a package is
determined according to Equation 1:
The output of the EL5170 and EL5370 can swing from -3.3V to
3.6V at 200 differential load at ±5V supply. As the load
resistance becomes lower, the output swing is reduced.
T
– T
AMAX
JMAX
(EQ. 1)
--------------------------------------------
PD
=
MAX
JA
Differential and Common Mode Gain
Settings
Where:
T
= Maximum junction temperature
= Maximum ambient temperature
JMAX
As shown in the “Simplified Schematic” on page 8, since the
T
AMAX
feedback resistors R and the gain resistor are integrated with
F
200 and 400, the EL5170 and EL5370 have a fixed gain of
2. The common mode gain is always one.
= Thermal resistance of the package
JA
The maximum power dissipation actually produced by an IC is
the total quiescent supply current times the total power supply
voltage, plus the power in the IC due to the load, or as
expressed in Equation 2:
Driving Capacitive Loads and Cables
The EL5170 and EL5370 can drive 75pF differential capacitor
in parallel with 200 differential load with less than 3.5dB of
peaking. If less peaking is desired in applications, a small
series resistor (usually between 5 to 50) can be placed in
series with each output to eliminate most peaking. However,
this will reduce the gain slightly.
V
O
(EQ. 2)
-----------
PD = i V
I
+ V
– V
STOT
SMAX
STOT
O
R
LD
Where:
When used as a cable driver, double termination is always
recommended for reflection-free performance. For those
applications, a back-termination series resistor at the
amplifier’s output will isolate the amplifier from the cable and
allow extensive capacitive drive. However, other applications
may have high capacitive loads without a back-termination
resistor. Again, a small series resistor at the output can help to
reduce peaking.
V
= Total supply voltage = V + - V -
S S
STOT
I
= Maximum quiescent supply current per channel
SMAX
V = Maximum differential output voltage of the
application
O
R
= Differential load resistance
LD
I
= Load current
LOAD
Disable/Power-Down
The EL5170 and EL5370 can be disabled and their outputs
placed in a high impedance state. The turn-off time is about
1µs and the turn-on time is about 200ns. When disabled, the
i = Number of channels
By setting the two PDMAX equations equal to each other, we
can solve the output current and RLOAD to avoid the device
overheat.
amplifier’s supply current is reduced to 2µA for I + and 120µA
S
for I - typically, thereby effectively eliminating the power
S
consumption. The amplifier’s power-down can be controlled by
standard CMOS signal levels at the ENABLE pin. The applied
FN7309 Rev 10.00
August 14, 2015
Page 9 of 14
EL5170, EL5370
For good AC performance, parasitic capacitance should be kept
to minimum. Use of wire wound resistors should be avoided
because of their additional series inductance. Use of sockets
should also be avoided if possible. Sockets add parasitic
inductance and capacitance that can result in compromised
performance. Minimizing parasitic capacitance at the amplifier’s
inverting input pin is very important. The feedback resistor
should be placed very close to the inverting input pin. Strip line
design techniques are recommended for the signal traces.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, a good printed circuit board
layout is necessary for optimum performance. Lead lengths
should be as sort as possible. The power supply pin must be well
bypassed to reduce the risk of oscillation. For normal single
supply operation, where the V - pin is connected to the ground
S
plane, a single 4.7µF tantalum capacitor in parallel with a 0.1µF
ceramic capacitor from V + to GND will suffice. This same
S
capacitor combination should be placed at each supply pin to
ground if split supplies are to be used. In this case, the V - pin
S
becomes the negative supply rail.
Typical Applications
0
50
V
V
FB
IN+
50
50
IN
EL5170/
EL5370
EL5172/
EL5372
V
OUT
50
V
V
INB
IN-
Z
= 100
O
REF
FIGURE 20. TWISTED PAIR DRIVER
0
50
50COAX
50COAX
V
V
IN
V
FB
IN
V
IN+
OUT
50
50
+
V
EL5170/EL5370
V
IN
EL5172/EL5372
V
V
OUT
-
OUTB
IN-
INB
V
REF
V
REF
50
FIGURE 21. DUAL COAXIAL CABLE DRIVER
10V
10k
10k
50
V
IN
IN+
TWISTED PAIR
EL5170/EL5370
IN-
100
V
OUT
Z
= 100
O
V
REF
50
10k
10k
FIGURE 22. SINGLE SUPPLY TWISTED PAIR DRIVER
FN7309 Rev 10.00
August 14, 2015
Page 10 of 14
EL5170, EL5370
EL5172/
EL5372
A
B
50
50
IN+
50
50
TWISTED PAIR
A
B
EL5170/EL5370
IN-
Z
= 100
O
V
REF
EL5172
FIGURE 23. DUAL SIGNAL TRANSMISSION CIRCUIT
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that
you have the latest revision.
DATE
REVISION
CHANGE
August 14, 2015
FN7309.10
Updated Ordering Information table onpage 2.
Added Revision History and About Intersil sections.
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support
FN7309 Rev 10.00
August 14, 2015
Page 11 of 14
EL5170, EL5370
Package Outline Drawing
M8.15E
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 0, 08/09
4
4.90 ± 0.10
A
DETAIL "A"
0.22 ± 0.03
B
6.0 ± 0.20
3.90 ± 0.10
4
PIN NO.1
ID MARK
5
(0.35) x 45°
4° ± 4°
0.43 ± 0.076
1.27
0.25 M C A B
SIDE VIEW “B”
TOP VIEW
1.75 MAX
1.45 ± 0.1
0.25
GAUGE PLANE
C
SEATING PLANE
0.175 ± 0.075
SIDE VIEW “A
0.10 C
0.63 ±0.23
DETAIL "A"
(0.60)
(1.27)
NOTES:
(1.50)
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
(5.40)
4. Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
The pin #1 identifier may be either a mold or mark feature.
Reference to JEDEC MS-012.
5.
6.
TYPICAL RECOMMENDED LAND PATTERN
FN7309 Rev 10.00
August 14, 2015
Page 12 of 14
EL5170, EL5370
Package Outline Drawing
M8.118A
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE (MSOP)
Rev 0, 9/09
A
3.0±0.1
8
0.25 CAB
4.9±0.15
DETAIL "X"
0.18 ± 0.05
3.0±0.1
1.10 Max
PIN# 1 ID
B
SIDE VIEW 2
1
2
0.65 BSC
TOP VIEW
0.95 BSC
0.86±0.09
GAUGE
PLANE
H
C
0.25
SEATING PLANE
0.10 ± 0.05
0.33 +0.07/ -0.08
0.08 C AB
3°±3°
0.10 C
0.55 ± 0.15
DETAIL "X"
SIDE VIEW 1
5.80
NOTES:
1. Dimensions are in millimeters.
4.40
3.00
2. Dimensioning and tolerancing conform to JEDEC MO-187-AA
and AMSE Y14.5m-1994.
3.
Plastic or metal protrusions of 0.15mm max per side are not
included.
0.65
0.40
4. Plastic interlead protrusions of 0.25mm max per side are not
included.
1.40
TYPICAL RECOMMENDED LAND PATTERN
5. Dimensions “D” and “E1” are measured at Datum Plane “H”.
6. This replaces existing drawing # MDP0043 MSOP 8L.
FN7309 Rev 10.00
August 14, 2015
Page 13 of 14
EL5170, EL5370
Quarter Size Outline Plastic Packages Family (QSOP)
A
MDP0040
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY
INCHES
D
(N/2)+1
N
SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE
NOTES
A
A1
A2
b
0.068
0.006
0.056
0.010
0.008
0.193
0.236
0.154
0.025
0.025
0.041
16
0.068
0.006
0.056
0.010
0.008
0.341
0.236
0.154
0.025
0.025
0.041
24
0.068
0.006
0.056
0.010
0.008
0.390
0.236
0.154
0.025
0.025
0.041
28
Max.
±0.002
±0.004
±0.002
±0.001
±0.004
±0.008
±0.004
Basic
-
PIN #1
I.D. MARK
E
E1
-
-
-
1
(N/2)
c
-
B
D
1, 3
0.010 C A B
E
-
e
E1
e
2, 3
H
-
C
SEATING
L
±0.009
Basic
-
PLANE
L1
N
-
0.007 C A B
b
0.004 C
Reference
-
Rev. F 2/07
L1
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not in-
cluded.
A
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
c
SEE DETAIL "X"
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
0.010
A2
GAUGE
PLANE
L
A1
4°±4°
DETAIL X
© Copyright Intersil Americas LLC 2002-2015. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7309 Rev 10.00
August 14, 2015
Page 14 of 14
相关型号：
EL5170ISZ-T7
100MHz Differential Twisted-Pair Drivers; MSOP8, SOIC8; Temp Range: -40° to 85°C
RENESAS
EL5170IYZ-T13
100MHz Differential Twisted-Pair Drivers; MSOP8, SOIC8; Temp Range: -40° to 85°C
RENESAS
EL5170IYZ-T7
100MHz Differential Twisted-Pair Drivers; MSOP8, SOIC8; Temp Range: -40° to 85°C
RENESAS
©2020 ICPDF网 联系我们和版权申明