EL5170IYZ-T13 [INTERSIL]
100MHz Differential Twisted-Pair Drivers; 100MHz的差分双绞线驱动器型号: | EL5170IYZ-T13 |
厂家: | Intersil |
描述: | 100MHz Differential Twisted-Pair Drivers |
文件: | 总15页 (文件大小:641K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
EL5170, EL5370
®
Data Sheet
April 24, 2006
FN7309.6
100MHz Differential Twisted-Pair Drivers
Features
The EL5170 and EL5370 are single and triple high
bandwidth amplifiers with a fixed gain of 2. They are
primarily targeted for applications such as driving twisted-
pair lines in component video applications. The inputs signal
can be in either single-ended or differential form but the
outputs are always in differential form.
• Fully differential inputs and outputs
• Differential input range ±2.3V typ.
• 100MHz 3dB bandwidth at fixed gain of 2
• 1100V/µs slew rate
• Single 5V or dual ±5V supplies
• 50mA maximum output current
• Low power - 7.4mA per channel
• Pb-free plus anneal available (RoHS compliant)
The output common mode level for each channel is set by
the associated V
over 70MHz. Generally, these pins are grounded but can be
tied to any voltage reference.
pin, which have a -3dB bandwidth of
REF
All outputs are short circuit protected to withstand temporary
overload condition.
Applications
• Twisted-pair drivers
The EL5170 and EL5370 are specified for operation over the
full -40°C to +85°C temperature range.
• Differential line drivers
• VGA over twisted-pairs
Pinouts
• ADSL/HDSL drivers
EL5170
(8 LD SO, MSOP)
TOP VIEW
EL5370
(24 LD QSOP)
TOP VIEW
• Single ended to differential amplification
• Transmission of analog signals in a noisy environment
EN 1
INP1 2
INN1 3
REF1 4
NC 5
24 OUT1
IN+
EN
1
8
7
6
5
OUT+
VS-
+
-
+
-
23 OUT1B
22 NC
2
3
4
IN-
VS+
21 VSP
20 VSN
19 NC
REF
OUT-
INP2 6
INN2 7
REF2 8
NC 9
18 OUT2
17 OUT2B
16 NC
+
-
INP3 10
INN3 11
REF3 12
15 OUT3
14 OUT3B
13 NC
+
-
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002-2004, 2006. All Rights Reserved.
1
All other trademarks mentioned are the property of their respective owners.
EL5170, EL5370
Ordering Information
PART NUMBER
PART MARKING
TAPE & REEL
PACKAGE
PKG. DWG. #
MDP0027
EL5170IS
5170IS
5170IS
5170IS
5170ISZ
5170ISZ
5170ISZ
g
-
7”
13”
-
8 Ld SO
8 Ld SO
8 Ld SO
EL5170IS-T7
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
MDP0043
MDP0043
MDP0043
MDP0043
MDP0043
MDP0043
MDP0040
MDP0040
MDP0040
MDP0040
MDP0040
MDP0040
EL5170IS-T13
EL5170ISZ (See Note)
EL5170ISZ-T7 (See Note)
EL5170ISZ-T13 (See Note)
EL5170IY
8 Ld SO (Pb-Free)
8 Ld SO (Pb-Free)
8 Ld SO (Pb-Free)
8 Ld MSOP
7”
13”
-
EL5170IY-T7
g
7”
13”
-
8 Ld MSOP
EL5170IY-T13
g
8 Ld MSOP
EL5170IYZ (See Note)
EL5170IYZ-T7 (See Note)
EL5170IYZ-T13 (See Note)
EL5370IU
BAAVA
BAAVA
BAAVA
EL5370IU
EL5370IU
EL5370IU
EL5370IUZ
EL5370IUZ
EL5370IUZ
8 Ld MSOP (Pb-Free)
8 Ld MSOP (Pb-Free)
8 Ld MSOP (Pb-Free)
24 Ld QSOP
7”
13”
-
EL5370IU-T7
7”
13”
-
24 Ld QSOP
EL5370IU-T13
24 Ld QSOP
EL5370IUZ (See Note)
EL5370IUZ-T7 (See Note)
EL5370IUZ-T13 (See Note)
24 Ld QSOP (Pb-Free)
24 Ld QSOP (Pb-Free)
24 Ld QSOP (Pb-Free)
7”
13”
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
FN7309.6
2
April 24, 2006
EL5170, EL5370
Absolute Maximum Ratings (T = 25°C)
A
Supply Voltage (V + to V -) . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6V
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135°C
Recommended Operating Temperature . . . . . . . . . .-40°C to +85°C
S
S
Maximum Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . ±60mA
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
Electrical Specifications V + = +5V, V - = -5V, T = 25°C, V = 0V, A = 2, R = 200Ω, C = 1pF, unless otherwise specified.
S
S
A
IN
V
LD
LD
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
AC PERFORMANCE
BW
BW
SR
-3dB Bandwidth
± 0.1dB Bandwidth
100
12
MHz
MHz
V/µs
ns
Slew Rate
V
V
= 2V , 20% to 80%
P-P
800
1100
20
OUT
OUT
T
T
Settling Time to 0.1%
= 2V
P-P
STL
Output Overdrive Recovery time
40
ns
OVR
V
V
V
V
BW (-3dB)
SR+
V
V
V
-3dB Bandwidth
Slew Rate - Rise
Slew Rate - Fall
A =1, C = 2.7pF
V LD
70
MHz
V/µs
V/µs
nV/√Hz
dBc
dBc
dBc
dBc
%
REF
REF
REF
N
REF
REF
REF
V
V
= 2V , 20% to 80%
P-P
125
65
OUT
OUT
SR-
= 2V , 20% to 80%
P-P
Input Voltage Noise
f = 10kHz
28
HD2
HD2
HD3
HD3
dG
Second Harmonic Distortion
Second Harmonic Distortion
Third Harmonic Distortion
Third Harmonic Distortion
Differential Gain at 3.58MHz
Differential Phase at 3.58MHz
Channel Separation - For EL5370 only
V
V
V
V
= 2V , 1MHz
P-P
-79
-65
-62
-43
0.14
0.38
85
OUT
OUT
OUT
OUT
= 2V , 10MHz
P-P
= 2V , 1MHz
P-P
= 2V , 10MHz
P-P
R
R
= 300Ω, A = 2
V
LD
LD
dθ
= 300Ω, A = 2
°
V
e
at f = 1MHz
dB
S
INPUT CHARACTERISTICS
Input Referred Offset Voltage
Input Bias Current (V , V
V
±6
-6
±25
-2
mV
µA
µA
µA
V
OS
I
I
)
IN INB
-10
0.5
-1
IN
REF
Input Bias Current at REF Pin
V
V
V
= +3.2V
= -3.2V
1.25
0
3
REF
REF
+1
Gain
Gain Accuracy
= ±1V
1.98
2
2.02
IN
R
C
Differential Input Resistance
Differential Input Capacitance
Differential Mode Input Range
Common Mode Positive Input Range at
300
1
kΩ
pF
V
IN
IN
DMIR
±2.1
3.2
±2.3
3.4
CMIR+
V
V
+, V -
IN IN
CMIR-
Common Mode Negative Input Range at
+, V
-4.5
-4.2
V
V
-
IN
IN
V
Reference Input Voltage Range - Positive V + = V - = 0V
3.4
3.8
V
V
REFIN
IN IN
Reference Input Voltage Range -
Negative
-3.3
-3
V
Output Offset Relative to V
-140
60
+140
mV
REFOS
REF
FN7309.6
3
April 24, 2006
EL5170, EL5370
Electrical Specifications V + = +5V, V - = -5V, T = 25°C, V = 0V, A = 2, R = 200Ω, C = 1pF, unless otherwise specified.
S
S
A
IN
V
LD
LD
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
CMRR
Input Common Mode Rejection Ratio
V
= ±2.5V
65
84
dB
IN
OUTPUT CHARACTERISTICS
V
Positive Output Voltage Swing
Negative Output Voltage Swing
Maximum Output Current
R
= 200Ω
LD
3.3
3.6
-3.3
±80
±85
60
V
OUT
-3
V
I
(Max)
OUT
R
R
= 10Ω (EL5170)
= 10Ω (EL5370)
±50
±70
mA
mA
mΩ
L
L
R
Output Impedance
OUT
SUPPLY
V
Supply Operating Range
V + to V -
4.75
6
11
8.4
100
-90
V
SUPPLY
S
S
I
I
I
Power Supply Current - Per channel
7.4
80
mA
µA
µA
S(ON)
+
-
Positive Power Supply Current - Disabled EN pin tied to 4.8V (EL5170)
60
S(OFF)
S(OFF)
Negative Power Supply Current -
Disabled
-150
-120
I
I
+
-
Positive Power Supply Current - Disabled EN pin tied to 4.8V (EL5370)
0.5
2
5
µA
µA
S(OFF)
S(OFF)
Negative Power Supply Current -
Disabled
-150
-120
-90
PSRR
Power Supply Rejection Ratio
V
V
from ±4.5V to ±5.5V (EL5170)
from ±4.5V to ±5.5V (EL5370)
70
65
83
83
dB
dB
S
S
ENABLE
t
t
Enable Time
200
1
ns
µs
V
EN
DS
Disable Time
V
EN Pin Voltage for Power-up
V + -
S
IH
1.5
V
EN Pin Voltage for Shut-down
V + -
S
V
IL
0.5
I
I
EN Pin Input Current High - per channel At V
EN Pin Input Current Low - per channel At V
= 5V
= 0V
40
-3
50
µA
µA
IH-EN
IL-EN
EN
EN
-6
Pin Descriptions
EL5170
EL5370
2, 6, 10
1
PIN NAME
PIN FUNCTION
1
2
3
4
5
6
7
8
IN+, INP1, 2, 3
EN
Non-inverting inputs
Enable
3, 7, 11
IN-, INN1, 2, 3
REF1, 2, 3
Inverting inputs
4, 8, 12
14, 17, 23
21
Reference input, sets common-mode output voltage
OUT-, OUT1B, 2B, 3B Inverting outputs
VS+, VSP
VS-, VSN
Positive supply
20
Negative supply
15, 18, 24
5, 9, 13, 16, 19, 22
OUT+, OUT1, 2, 3
NC
Non-inverting outputs
No connects, grounded for best crosstalk performance
FN7309.6
4
April 24, 2006
Connection Diagrams
EL5170
R
-5V
S1
50Ω
R
RT2
LOADP
LOADN
INP
EN
INP
EN
1
2
3
4
OUT 8
50Ω
VSN 7
VSP 6
INN
REF
INN
R
RT2
REF
OUTB 5
50Ω
R
R
S2
50Ω
S3
+5V
50Ω
EL5370
+5V
R
RT1
ENABLE
LD1
1
EN
OUT1 24
50Ω
R
RT1B
INP1
INN1
REF1
LD1B
2
3
4
5
6
7
8
9
INP1 OUT1B 23
50Ω
INN1
REF1
NC
NC 22
VSP 21
VSN 20
NC 19
INP2
INN2
REF2
INP2
INN2
R
RT2
LD2
OUT2 18
50Ω
R
RT2B
LD2B
REF2 OUT2B 17
50Ω
NC
NC 16
R
RT3
LD3
INP3
INN3
REF3
10 INP3
OUT3 15
50Ω
R
RT3B
LD3B
11 INN3 OUT3B 14
12 REF3 NC 13
50Ω
R
R
R
R
R
R
R
R
R
SP1
50Ω
SN1
50Ω
SR1
50Ω
SP2
50Ω
SN2
50Ω
SR2
50Ω
SP3
50Ω
SN3
50Ω
SR3
50Ω
-5V
EL5170, EL5370
Typical Performance Curves
C
= 1pF, V
= 200mV
ODP-P
V
= ±5V, A = 2, R = 200Ω, C = 1pF
LD
S
V
LD
LD
10
9
8
7
6
5
4
3
2
1
0
10
9
8
7
6
5
4
3
2
1
0
R
R
= 1kΩ
LD
= 500Ω
LD
V
= 200mV
OP-P
R
= 200Ω
= 100Ω
LD
V
= 2V
OP-P
R
LD
V
= 1V
OP-P
100K
1M
10M
FREQUENCY (Hz)
100M
1G
100K
1M
10M
FREQUENCY (Hz)
100M
1G
FIGURE 2. SMALL SIGNAL FREQUENCY RESPONSE vs R
FIGURE 1. FREQUENCY RESPONSE
LD
V
= ±5V, R = 200Ω, V
LD
= 200mV
ODP-P
S
4
3
2
11
10
9
C
= 75pF
= 40pF
LD
V
= 200mV
P-P
1
0
REF
C
LD
8
7
-1
-2
-3
-4
-5
-6
6
C
= 20pF
LD
C
5
V
= 1V
P-P
REF
4
= 0pF
LD
3
2
1
1M
10M
FREQUENCY (Hz)
100M
100K
1M
10M
FREQUENCY (Hz)
100M
1G
FIGURE 4. FREQUENCY RESPONSE vs V
FIGURE 3. SMALL SIGNAL FREQUENCY RESPONSE vs C
REF
LD
100Ω
V
INCM
+
V
-
ODM
100Ω
V
OCM
0
-10
-20
-30
-10
-20
-30
-40
-50
-60
-70
-80
-90
-40
-50
V
/V
OCM INCM
PSRR-
-60
-70
-80
-90
PSRR+
10M
V
/V
ODM INCM
100K
1M
100M
100K
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 5. POWER SUPPLY REJECTION RATIO vs
FREQUENCY
FIGURE 6. COMMON MODE REJECTION vs FREQUENCY
FN7309.6
April 24, 2006
6
EL5170, EL5370
Typical Performance Curves (Continued)
100Ω
V
IN
+
R
-
R
V
V
CM
T
ODM
100Ω
1000
0
-10
-20
-30
100
10
-40
-50
-60
V
/V
OCM ODM
10
100
1K
10K
100K
1M
10M
100K
1M
10M
100M
FREQENCY (Hz)
FREQUENCY (Hz)
FIGURE 8. INPUT VOLTAGE NOISE vs FREQUENCY
FIGURE 7. DIFFERENTIAL MODE OUTPUT BALANCE
ERROR vs FREQUENCY
R
= 200Ω
LD
-40
110
105
-50
CH2<=>CH1
CH3<=>CH2
-60
100
95
CH2<=>CH3
-70
CH1<=>CH2
-80
90
-90
CH3<=>CH1
-100
85
80
CH1<=>CH3
-110
100K
1M
10M
100M
4
6
8
9
12
5
7
10
11
FREQENCY (Hz)
V
(V)
S
FIGURE 9. CHANNEL ISOLATION vs FREQUENCY
FIGURE 10. BANDWIDTH vs SUPPLY VOLTAGE
V
= ±5V, R = 200Ω, V
LD
= 2V
S
OP-P
-30
-40
-50
-60
-70
7.78
7.76
7.74
7.72
7.7
HD3
I +
S
I -
S
HD2
7.68
7.66
7.64
7.62
-80
-90
7.6
7.58
4
14 16
FREQUENCY (MHz)
0
2
6
8
10 12
18
20
4
6
8
9
11
5
7
10
V
(V)
S
FIGURE 12. HARMONIC DISTORTION vs FREQUENCY
FIGURE 11. SUPPLY CURRENT vs SUPPLY VOLTAGE
FN7309.6
7
April 24, 2006
EL5170, EL5370
Typical Performance Curves (Continued)
500mV/DIV
0.5V/DIV
20ns/DIV
40ns/DIV
FIGURE 14. LARGE SIGNAL TRANSIENT RESPONSE
FIGURE 13. V
TRANSIENT RESPONSE
COM
100mV/DIV
20ns/DIV
FIGURE 16. DISABLED RESPONSE
FIGURE 15. SMALL SIGNAL TRANSIENT RESPONSE
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.2
1
870mW
0.8
0.6
QSOP24
=115°C/W
625mW
θ
JA
SO8
=160°C/W
θ
JA
0.4 486mW
0.2
MSOP8
=206°C/W
θ
JA
0
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 18. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 17. ENABLED RESPONSE
FN7309.6
April 24, 2006
8
EL5170, EL5370
Typical Performance Curves (Continued)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.4
1.2
1
1.136W
QSOP24
JA
909mW
870mW
θ
=88°C/W
0.8
0.6
0.4
0.2
0
SO8
=110°C/W
θ
JA
MSOP8/10
JA
θ
=115°C/W
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 19. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Simplified Schematic
200Ω
V +
S
R
R
3
4
R
R
2
1
R
R
7
8
IN+
IN-
FBP
FBN
V
V
B1
OUT+
OUT-
R
R
CD
CD
REF
10
R
R
9
B2
C
C
C
C
R
R
5
6
V -
S
200Ω
400Ω
Input, Output and Supply Voltage Range
Description of Operation and Application
Information
Product Description
The EL5170 and EL5370 are wide bandwidth, low power
and single/differential ended to differential output amplifiers.
They have a fixed gain of 2. The EL5170 is a single channel
differential amplifier. The EL5370 is a triple channel
differential amplifier. The EL5170 and EL5370 have a -3dB
bandwidth of 100MHz while driving a 200Ω differential load.
The EL5170 and EL5370 are available with a power down
feature to reduce the power while the amplifiers are
disabled.
The EL5170 and EL5370 have been designed to operate
with a single supply voltage of 5V to 10V or a split supplies
with its total voltage from 5V to 10V. The amplifiers have an
input common mode voltage range from -4.5V to 3.4V for
±5V supply. The differential mode input range (DMIR)
between the two inputs is from -2.3V to +2.3V. The input
voltage range at the REF pin is from -3.3V to 3.8V. If the
input common mode or differential mode signal is outside the
above-specified ranges, it will cause the output signal
distorted.
The output of the EL5170 and EL5370 can swing from -3.3V
to 3.6V at 200Ω differential load at ±5V supply. As the load
resistance becomes lower, the output swing is reduced.
FN7309.6
9
April 24, 2006
EL5170, EL5370
Differential and Common Mode Gain Settings
T
– T
AMAX
JMAX
As shown at the simplified schematic, since the feedback
resistors RF and the gain resistor are integrated with 200Ω
and 400Ω, the EL5170 and EL5370 have a fixed gain of 2.
The common mode gain is always one.
PD
= --------------------------------------------
MAX
Θ
JA
Where:
T
= Maximum junction temperature
= Maximum ambient temperature
JMAX
Driving Capacitive Loads and Cables
T
AMAX
The EL5170 and EL5370 can drive 75pF differential
capacitor in parallel with 200Ω differential load with less than
3.5dB of peaking. If less peaking is desired in applications, a
small series resistor (usually between 5Ω to 50Ω) can be
placed in series with each output to eliminate most peaking.
However, this will reduce the gain slightly.
θ
= Thermal resistance of the package
JA
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
∆V
O
-----------
PD = i × V × I
+ V
S
×
S
SMAX
When used as a cable driver, double termination is always
recommended for reflection-free performance. For those
applications, a back-termination series resistor at the
amplifier’s output will isolate the amplifier from the cable and
allow extensive capacitive drive. However, other applications
may have high capacitive loads without a back-termination
resistor. Again, a small series resistor at the output can help
to reduce peaking.
R
LD
Where:
V = Total supply voltage
S
I
= Maximum quiescent supply current per channel
SMAX
∆V = Maximum differential output voltage of the
application
O
Disable/Power-Down
R
I
= Differential load resistance
= Load current
LD
The EL5170 and EL5370 can be disabled and placed their
outputs in a high impedance state. The turn off time is about
1µs and the turn on time is about 200ns. When disabled, the
LOAD
i = Number of channels
amplifier’s supply current is reduced to 2µA for I + and
S
By setting the two PDMAX equations equal to each other, we
can solve the output current and RLOAD to avoid the device
overheat.
120µA for I - typically, thereby effectively eliminating the
S
power consumption. The amplifier’s power down can be
controlled by standard CMOS signal levels at the ENABLE
pin. The applied logic signal is relative to V + pin. Letting the
S
Power Supply Bypassing and Printed Circuit
Board Layout
EN pin float or applying a signal that is less than 1.5V below
V + will enable the amplifier. The amplifier will be disabled
S
As with any high frequency device, a good printed circuit
board layout is necessary for optimum performance. Lead
lengths should be as sort as possible. The power supply pin
must be well bypassed to reduce the risk of oscillation. For
when the signal at EN pin is above V + -0.5V.
S
Output Drive Capability
The EL5170 and EL5370 have internal short circuit
protection. Its typical short circuit current is ±80mA. If the
output is shorted indefinitely, the power dissipation could
easily increase such that the part will be destroyed.
Maximum reliability is maintained if the output current never
exceeds ±60mA. This limit is set by the design of the internal
metal interconnect.
normal single supply operation, where the V - pin is
S
connected to the ground plane, a single 4.7µF tantalum
capacitor in parallel with a 0.1µF ceramic capacitor from V +
S
to GND will suffice. This same capacitor combination should
be placed at each supply pin to ground if split supplies are to
be used. In this case, the V - pin becomes the negative
supply rail.
S
Power Dissipation
For good AC performance, parasitic capacitance should be
kept to minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier’s inverting input pin is very important. The
feedback resistor should be placed very close to the
inverting input pin. Strip line design techniques are
recommended for the signal traces.
With the high output drive capability of the EL5170 and
EL5370 it is possible to exceed the 125°C absolute
maximum junction temperature under certain load current
conditions. Therefore, it is important to calculate the
maximum junction temperature for the application to
determine if the load conditions or package types need to be
modified for the amplifier to remain in the safe operating
area.
The maximum power dissipation allowed in a package is
determined according to:
FN7309.6
10
April 24, 2006
EL5170, EL5370
Typical Applications
0Ω
50
50
V
V
FB
IN+
50Ω
50Ω
IN
EL5170/
EL5370
IN-
EL5172/
EL5372
V
OUT
V
V
INB
Z
= 100Ω
O
REF
FIGURE 20. TWISTED PAIR DRIVER
0Ω
V
FB
IN
+
EL5170/
EL5370
IN+
IN-
V
EL5172/
EL5372
V
OUT
V
V
-
INB
REF
FIGURE 21. DUAL COAXIAL CABLE DRIVER
10V
V
IN
IN+
EL5170/
EL5370
IN-
FIGURE 22. SINGLE SUPPLY TWISTED PAIR DRIVER
FN7309.6
11
April 24, 2006
EL5170, EL5370
EL5172/
EL5372
IN+
EL5170/
EL5370
IN-
EL5172
FIGURE 23. DUAL SIGNAL TRANSMISSION CIRCUIT
FN7309.6
12
April 24, 2006
EL5170, EL5370
SO Package Outline Drawing
FN7309.6
13
April 24, 2006
EL5170, EL5370
MSOP Package Outline Drawing
FN7309.6
14
April 24, 2006
EL5170, EL5370
QSOP Package Outline Drawing
NOTE: The package drawing shown here may not be the latest version. To check the latest revision, please refer to the Intersil website at
http://www.intersil.com/design/packages/index.asp
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7309.6
15
April 24, 2006
相关型号:
EL5170IYZ-T7
100MHz Differential Twisted-Pair Drivers; MSOP8, SOIC8; Temp Range: -40° to 85°C
RENESAS
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