LNK302DG-TL [POWERINT]
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型号: | LNK302DG-TL |
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描述: | Lowest Component Count, Energy-Efficient Off-Line Switcher IC 开关 光电二极管 |
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LNK302/304-306
™
LinkSwitch-TN Family
Lowest Component Count, Energy-Efficient
Off-Line Switcher IC
Product Highlights
Cost Effective Linear/Cap Dropper Replacement
• Lowest cost and component count buck converter solution
• Fully integrated auto-restart for short-circuit and open loop
fault protection – saves external component costs
• LNK302 uses a simplified controller without auto-restart for
very low system cost
FB
BP
S
D
+
+
Wide Range
LinkSwitch-TN
DC
High-Voltage
DC Input
Output
• 66 kHz operation with accurate current limit – allows low cost
off-the-shelf ± mH inductor for up to ±20 mA output current
• Tight tolerances and negligible temperature variation
• High breakdown voltage of 700 V provides excellent input
surge withstand
PI-3492-041509
Figure 1. Typical Buck Converter Application (See Application Examples Section
for Other Circuit Configurations).
• Frequency jittering dramatically reduces EMI (~±0 dB)
•
Minimizes EMI filter cost
• High thermal shutdown temperature (+±31 °C minimum)
Much Higher Performance Over Discrete Buck and
Passive Solutions
Output Current Table1
230 VAC ±±15
81-261 VAC
• Supports buck, buck-boost and flyback topologies
• System level thermal overload, output short-circuit and open
control loop protection
• Excellent line and load regulation even with typical configuration
• High bandwidth provides fast turn-on with no overshoot
• Current limit operation rejects line ripple
• Universal input voltage range (81 VAC to 261 VAC)
• Built-in current limit and hysteretic thermal protection
• Higher efficiency than passive solutions
Product4
MDCM2
CCM3
MDCM2
CCM3
LNK302P/G/D
LNK304P/G/D
LNK305P/G/D
LNK306P/G/D
63 mA
±20 mA
±71 mA
221 mA
80 mA
63 mA
±20 mA
±71 mA
221 mA
80 mA
±70 mA
280 mA
360 mA
±70 mA
280 mA
360 mA
Table 1. Output Current Table.
Notes:
• Higher power factor than capacitor-fed solutions
• Entirely manufacturable in SMD
±. Typical output current in a non-isolated buck converter. Output power capability
depends on respective output voltage. See Key Applications Considerations
Section for complete description of assumptions, including fully discontinuous
conduction mode (DCM) operation.
™
EcoSmart – Extremely Energy Efficient
2. Mostly discontinuous conduction mode.
• Consumes typically only 10/80 mW in self-powered buck
topology at ±±1/230 VAC input with no-load (opto feedback)
• Consumes typically only 7/±2 mW in flyback topology with
external bias at ±±1/230 VAC input with no-load
• Meets California Energy Commission (CEC), Energy Star, and
EU requirements
3. Continuous conduction mode.
4. Packages: P: DIP-8B, G: SMD-8B, D: SO-8C.
Applications
• Appliances and timers
• LED drivers and industrial controls
and thermal shutdown circuitry onto a monolithic IC. The start-up
and operating power are derived directly from the voltage on the
DRAIN pin, eliminating the need for a bias supply and associated
circuitry in buck or flyback converters. The fully integrated
auto-restart circuit in the LNK304-306 safely limits output power
during fault conditions such as short-circuit or open loop,
reducing component count and system-level load protection
cost. A local supply provided by the IC allows use of a non-
safety graded optocoupler acting as a level shifter to further
enhance line and load regulation performance in buck and
buck-boost converters, if required.
Description
LinkSwitch-TN is specifically designed to replace all linear and
capacitor-fed (cap dropper) non-isolated power supplies in the
under 360 mA output current range at equal system cost while
offering much higher performance and energy efficiency.
LinkSwitch-TN devices integrate a 700 V power MOSFET,
oscillator, simple On/Off control scheme, a high-voltage switched
current source, frequency jittering, cycle-by-cycle current limit
www.powerint.com
June 2013
This Product is Covered by Patents and/or Pending Patent Applications.
LNK302/304-306
BYPASS
(BP)
DRAIN
(D)
REGULATOR
5.8 V
BYPASS PIN
UNDERVOLTAGE
+
-
5.8 V
4.85 V
CURRENT LIMIT
COMPARATOR
+
6.3 V
-
V
ILIMIT
JITTER
CLOCK
DCMAX
THERMAL
SHUTDOWN
FEEDBACK
(FB)
OSCILLATOR
1.65 V -VT
S
Q
Q
R
LEADING
EDGE
BLANKING
SOURCE
(S)
PI-3904-032213
Figure 2a. Functional Block Diagram (LNK302).
BYPASS
(BP)
DRAIN
(D)
REGULATOR
5.8 V
FAULT
PRESENT
AUTO-
RESTART
BYPASS PIN
UNDERVOLTAGE
COUNTER
6.3 V
+
-
CLOCK
5.8 V
4.85 V
CURRENT LIMIT
COMPARATOR
RESET
+
-
V
ILIMIT
JITTER
CLOCK
DCMAX
THERMAL
SHUTDOWN
FEEDBACK
(FB)
OSCILLATOR
1.65 V -VT
S
Q
Q
R
LEADING
EDGE
BLANKING
SOURCE
(S)
PI-2367-032213
Figure 2b. Functional Block Diagram (LNK304-306).
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LNK302/304-306
Pin Functional Description
DRAIN (D) Pin:
Power MOSFET drain connection. Provides internal operating
current for both start-up and steady-state operation.
for both average and quasi-peak emissions. The frequency
jitter should be measured with the oscilloscope triggered at the
falling edge of the DRAIN waveform. The waveform in Figure 4
illustrates the frequency jitter of the LinkSwitch-TN.
BYPASS (BP) Pin:
Connection point for a 0.± mF external bypass capacitor for the
internally generated 1.8 V supply.
Feedback Input Circuit
The feedback input circuit at the FEEDBACK pin consists of a
low impedance source follower output set at ±.61 V. When the
current delivered into this pin exceeds 49 mA, a low logic level
(disable) is generated at the output of the feedback circuit. This
output is sampled at the beginning of each cycle on the rising
edge of the clock signal. If high, the power MOSFET is turned
on for that cycle (enabled), otherwise the power MOSFET
remains off (disabled). Since the sampling is done only at the
beginning of each cycle, subsequent changes in the FEEDBACK
pin voltage or current during the remainder of the cycle are ignored.
FEEDBACK (FB) Pin:
During normal operation, switching of the power MOSFET is
controlled by this pin. MOSFET switching is terminated when a
current greater than 49 mA is delivered into this pin.
SOURCE (S) Pin:
This pin is the power MOSFET source connection. It is also the
ground reference for the BYPASS and FEEDBACK pins.
5.8 V Regulator and 6.3 V Shunt Voltage Clamp
The 1.8 V regulator charges the bypass capacitor connected to
the BYPASS pin to 1.8 V by drawing a current from the voltage
on the DRAIN, whenever the MOSFET is off. The BYPASS pin
is the internal supply voltage node for the LinkSwitch-TN. When
the MOSFET is on, the LinkSwitch-TN runs off of the energy
stored in the bypass capacitor. Extremely low power consumption
of the internal circuitry allows the LinkSwitch-TN to operate
continuously from the current drawn from the DRAIN pin. A
bypass capacitor value of 0.± mF is sufficient for both high
frequency decoupling and energy storage.
P Package (DIP-8B)
G Package (SMD-8B)
D Package (SO-8C)
8
7
6
5
1
2
S
S
S
S
1
2
8
7
BP
FB
S
S
S
S
BP
FB
3
4
4
D
5
D
3b
3a
In addition, there is a 6.3 V shunt regulator clamping the
BYPASS pin at 6.3 V when current is provided to the BYPASS
pin through an external resistor. This facilitates powering of
LinkSwitch-TN externally through a bias winding to decrease
the no-load consumption to about 10 mW.
PI-5422-060613
Figure 3. Pin Configuration.
BYPASS Pin Undervoltage
LinkSwitch-TN Functional Description
The BYPASS pin undervoltage circuitry disables the power
MOSFET when the BYPASS pin voltage drops below 4.81 V.
Once the BYPASS pin voltage drops below 4.81 V, it must rise
back to 1.8 V to enable (turn-on) the power MOSFET.
LinkSwitch-TN combines a high-voltage power MOSFET switch
with a power supply controller in one device. Unlike conventional
PWM (pulse width modulator) controllers, LinkSwitch-TN uses a
simple ON/OFF control to regulate the output voltage. The
LinkSwitch-TN controller consists of an oscillator, feedback
(sense and logic) circuit, 1.8 V regulator, BYPASS pin
undervoltage circuit, over-temperature protection, frequency
jittering, current limit circuit, leading edge blanking and a 700 V
power MOSFET. The LinkSwitch-TN incorporates additional
circuitry for auto-restart.
Over-Temperature Protection
The thermal shutdown circuitry senses the die temperature.
The threshold is set at ±42 °C typical with a 71 °C hysteresis.
When the die temperature rises above this threshold (±42 °C)
the power MOSFET is disabled and remains disabled until the
die temperature falls by 71 °C, at which point it is re-enabled.
Current Limit
Oscillator
The current limit circuit senses the current in the power MOSFET.
When this current exceeds the internal threshold (ILIMIT), the
power MOSFET is turned off for the remainder of that cycle.
The leading edge blanking circuit inhibits the current limit
comparator for a short time (tLEB) after the power MOSFET is
turned on. This leading edge blanking time has been set so
that current spikes caused by capacitance and rectifier reverse
recovery time will not cause premature termination of the
switching pulse.
The typical oscillator frequency is internally set to an average of
66 kHz. Two signals are generated from the oscillator: the
maximum duty cycle signal (DCMAX) and the clock signal that
indicates the beginning of each cycle.
The LinkSwitch-TN oscillator incorporates circuitry that
introduces a small amount of frequency jitter, typically 4 kHz
peak-to-peak, to minimize EMI emission. The modulation rate
of the frequency jitter is set to ± kHz to optimize EMI reduction
3
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Rev. J 06/13
LNK302/304-306
600
500
flame proof, fusible, wire wound resistor. It accomplishes
several functions: a) Inrush current limitation to safe levels for
rectifiers D3 and D4; b) Differential mode noise attenuation; c)
Input fuse should any other component fail short-circuit
(component fails safely open-circuit without emitting smoke, fire
or incandescent material).
VDRAIN
400
300
The power processing stage is formed by the LinkSwitch-TN,
freewheeling diode D±, output choke L±, and the output capacitor
C2. The LNK304 was selected such that the power supply
operates in the mostly discontinuous-mode (MDCM). Diode D±
is an ultrafast diode with a reverse recovery time (tRR) of
approximately 71 ns, acceptable for MDCM operation. For
continuous conduction mode (CCM) designs, a diode with a trr
of ≤31 ns is recommended. Inductor L± is a standard off-the-
shelf inductor with appropriate RMS current rating (and acceptable
temperature rise). Capacitor C2 is the output filter capacitor; its
primary function is to limit the output voltage ripple. The output
voltage ripple is a stronger function of the ESR of the output
capacitor than the value of the capacitor itself.
200
100
0
68 kHz
64 kHz
0
20
Time (µs)
Figure 4. Frequency Jitter.
Auto-Restart (LNK304-306 Only)
To a first order, the forward voltage drops of D± and D2 are
identical. Therefore, the voltage across C3 tracks the output
voltage. The voltage developed across C3 is sensed and
regulated via the resistor divider R± and R3 connected to U±’s
FEEDBACK pin. The values of R± and R3 are selected such
that, at the desired output voltage, the voltage at the
FEEDBACK pin is ±.61 V.
In the event of a fault condition such as output overload, output
short, or an open-loop condition, LinkSwitch-TN enters into
auto-restart operation. An internal counter clocked by the
oscillator gets reset every time the FEEDBACK pin is pulled
high. If the FEEDBACK pin is not pulled high for 10 ms, the
power MOSFET switching is disabled for 800 ms. The auto-
restart alternately enables and disables the switching of the
power MOSFET until the fault condition is removed.
Regulation is maintained by skipping switching cycles. As the
output voltage rises, the current into the FEEDBACK pin will
rise. If this exceeds IFB then subsequent cycles will be skipped
until the current reduces below IFB. Thus, as the output load is
reduced, more cycles will be skipped and if the load increases,
fewer cycles are skipped. To provide overload protection if no
cycles are skipped during a 10 ms period, LinkSwitch-TN will
enter auto-restart (LNK304-306), limiting the average output
power to approximately 65 of the maximum overload power.
Due to tracking errors between the output voltage and the
voltage across C3 at light load or no-load, a small pre-load may
be required (R4). For the design in Figure 1, if regulation to zero
load is required, then this value should be reduced to 2.4 kΩ.
Applications Example
A 1.44 W Universal Input Buck Converter
The circuit shown in Figure 1 is a typical implementation of a
±2 V, ±20 mA non-isolated power supply used in appliance
control such as rice cookers, dishwashers or other white goods.
This circuit may also be applicable to other applications such as
night-lights, LED drivers, electricity meters, and residential
heating controllers, where a non-isolated supply is acceptable.
The input stage comprises fusible resistor RF±, diodes D3 and
D4, capacitors C4 and C1, and inductor L2. Resistor RF± is a
R1
13.0 kΩ
1%
C3
R3
2.05 kΩ
1%
RF1
10 µF
35 V
D2
1N4005GP
8.2 Ω
L2
C1
FB
BP
S
2 W
1 mH
100 nF
12 V,
120 mA
D
L1
D3
1 mH
LinkSwitch-TN
1N4007
C2
280 mA
85-265
VAC
C4
4.7 µF
400 V
C5
4.7 µF
400 V
R4
3.3 kΩ
LNK304
100 µF
D1
UF4005
16 V
D4
1N4007
RTN
PI-3757-041509
Figure 5. Universal Input, 12 V, 120 mA Constant Voltage Power Supply Using LinkSwitch-TN.
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www.powerint.com
LNK302/304-306
LinkSwitch-TN
RF1
D3
L2
D
FB
BP
S
D2
R1
+
C1
AC
INPUT
S
S
L1
C4
C5
C3
R3
DC
OUTPUT
C2
S
D1
D4
Optimize hatched copper areas (
) for heatsinking and EMI.
PI-3750-041509
Figure 6a. Recommended Printed Circuit Layout for LinkSwitch-TN in a Buck Converter Configuration using P or G Package.
D3
L2
RF1
D
S
S
S
S
L1
+
FB
BP
D1
AC
INPUT
C3
C4
C5
D2
C2
DC
OUTPUT
C1
R3
R1
D4
Optimize hatched copper areas (
) for heatsinking and EMI.
PI-4546-041509
Figure 6b. Recommended Printed Circuit Layout for LinkSwitch-TN in a Buck Converter Configuration using D Package to Bottom Side of the Board.
Key Application Considerations
LinkSwitch-TN Selection and Selection Between
LinkSwitch-TN Design Considerations
MDCM and CCM Operation
Output Current Table
Select the LinkSwitch-TN device, freewheeling diode and
output inductor that gives the lowest overall cost. In general,
MDCM provides the lowest cost and highest efficiency converter.
CCM designs require a larger inductor and ultrafast (tRR ≤31 ns)
freewheeling diode in all cases. It is lower cost to use a larger
LinkSwitch-TN in MDCM than a smaller LinkSwitch-TN in CCM
because of the additional external component costs of a CCM
design. However, if the highest output current is required, CCM
should be employed following the guidelines below.
Data sheet maximum output current table (Table ±) represents
the maximum practical continuous output current for both
mostly discontinuous conduction mode (MDCM) and continuous
conduction mode (CCM) of operation that can be delivered
from a given LinkSwitch-TN device under the following
assumed conditions:
±. Buck converter topology.
2. The minimum DC input voltage is ≥70 V. The value of input
capacitance should be large enough to meet this criterion.
3. For CCM operation a KRP* of 0.4.
Topology Options
LinkSwitch-TN can be used in all common topologies, with or
without an optocoupler and reference to improve output voltage
tolerance and regulation. Table 2 provide a summary of these
configurations. For more information see the Application Note
– LinkSwitch-TN Design Guide.
4. Output voltage of ±2 VDC.
1. Efficiency of 715.
6. A catch/freewheeling diode with tRR ≤71 ns is used for MDCM
operation and for CCM operation, a diode with tRR ≤31 ns is
used.
7. The part is board mounted with SOURCE pins soldered to a
sufficient area of copper to keep the SOURCE pin tempera-
ture at or below ±00 °C.
*KRP is the ratio of ripple to peak inductor current.
5
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Rev. J 06/13
LNK302/304-306
Topology
High-Side
Basic Circuit Schematic
Key Features
±. Output referenced to input
Buck –
Direct
2. Positive output (VO) with respect to -VIN
3. Step down – VO < VIN
Feedback
4. Low cost direct feedback (±±05 typ.)
1. Requires an output load to maintain regulation
FB
BP
S
D
+
+
LinkSwitch-TN
VIN
VO
PI-3751-041509
High-Side
Buck –
Optocoupler
Feedback
±. Output referenced to input
2. Positive output (VO) with respect to -VIN
3. Step down – VO < VIN
FB
BP
S
4. Optocoupler feedback
D
+
+
- Accuracy only limited by reference choice
- Low cost non-safety rated optocoupler
- No pre-load required
LinkSwitch-TN
VIN
VO
1. Minimum no-load consumption
PI-3752-041509
Low-Side
Buck –
+
+
Optocoupler
Feedback
LinkSwitch-TN
VIN
VO
BP
FB
±. Output referenced to input
2. Negative output (VO) with respect to +VIN
3. Step down – VO < VIN
D
S
PI-3753-041509
Low-Side
Buck –
Constant
Current LED
Driver
4. Optocoupler feedback
+
IO
- Accuracy only limited by reference choice
- Low cost non-safety rated optocoupler
- No pre-load required
LinkSwitch-TN
VF
VIN
+
- Ideal for driving LEDs
BP
FB
D
S
PI-3754-041509
VF
IO
R =
High-Side
Buck-Boost –
Direct
FB
BP
S
Feedback
D
+
±. Output referenced to input
LinkSwitch-TN
VIN
VO
+
2. Negative output (VO) with respect to +VIN
3. Step up/down – VO > VIN orVO < VIN
4. Low cost direct feedback (±±05 typ.)
1. Fail-safe – output is not subjected to input
voltage if the internal power MOSFET fails
6. Ideal for driving LEDs – better accuracy and
temperature stability than Low-side Buck
constant current LED driver
PI-3755-041509
High-Side
Buck-Boost –
Constant
Current LED
Driver
2 V
300 Ω
RSENSE
=
IO
2 kΩ
RSENSE
FB
BP
S
IO
D
+
LinkSwitch-TN
VIN
7. Requires an output load to maintain regulation
10 µF
100 nF
50 V
PI-3779-041509
Table 2.
Common Circuit Configurations Using LinkSwitch-TN. (continued on next page)
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LNK302/304-306
Topology
Low-Side
Basic Circuit Schematic
Key Features
±. Output referenced to input
Buck-Boost –
Optocoupler
Feedback
2. Positive output (VO) with respect to +VIN
3. Step up/down – VO > VIN or VO < VIN
4. Optocoupler feedback
+
LinkSwitch-TN
- Accuracy only limited by reference choice
- Low cost non-safety rated optocoupler
- No pre-load required
VIN
VO
BP
FB
+
1. Fail-safe – output is not subjected to input
voltage if the internal power MOSFET fails
6. Minimum no-load consumption
D
S
PI-3756-041509
Table 2 (cont). Common Circuit Configurations Using LinkSwitch-TN.
should not exceed the rated ripple voltage divided by the typical
current limit of the chosen LinkSwitch-TN.
Component Selection
Referring to Figure 1, the following considerations may be
helpful in selecting components for a LinkSwitch-TN design.
Feedback Resistors R1 and R3
The values of the resistors in the resistor divider formed by R±
and R3 are selected to maintain ±.61 V at the FEEDBACK pin. It
is recommended that R3 be chosen as a standard ±5 resistor
of 2 kΩ. This ensures good noise immunity by biasing the
feedback network with a current of approximately 0.8 mA.
Freewheeling Diode D1
Diode D± should be an ultrafast type. For MDCM, reverse
recovery time tRR ≤71 ns should be used at a temperature of
70 °C or below. Slower diodes are not acceptable, as continuous
mode operation will always occur during startup, causing high
leading edge current spikes, terminating the switching cycle
prematurely, and preventing the output from reaching regulation.
If the ambient temperature is above 70 °C then a diode with tRR
≤31 ns should be used.
Feedback Capacitor C3
Capacitor C3 can be a low cost general purpose capacitor. It
provides a “sample and hold” function, charging to the output
voltage during the off time of LinkSwitch-TN. Its value should
be ±0 mF to 22 mF; smaller values cause poorer regulation at
light load conditions.
For CCM an ultrafast diode with reverse recovery time tRR ≤31 ns
should be used. A slower diode may cause excessive leading
edge current spikes, terminating the switching cycle prematurely
and preventing full power delivery.
Pre-Load Resistor R4
In high-side, direct feedback designs where the minimum load
is <3 mA, a pre-load resistor is required to maintain output
regulation. This ensures sufficient inductor energy to pull the
inductor side of the feedback capacitor C3 to input return via
D2. The value of R4 should be selected to give a minimum
output load of 3 mA.
Fast and slow diodes should never be used as the large reverse
recovery currents can cause excessive power dissipation in the
diode and/or exceed the maximum drain current specification
of LinkSwitch-TN.
In designs with an optocoupler the Zener or reference bias
current provides a ± mA to 2 mA minimum load, preventing
“pulse bunching” and increased output ripple at zero load.
Feedback Diode D2
Diode D2 can be a low-cost slow diode such as the ±N400X
series, however it should be specified as a glass passivated
type to guarantee a specified reverse recovery time. To a first
order, the forward drops of D± and D2 should match.
LinkSwitch-TN Layout Considerations
In the buck or buck-boost converter configuration, since the
SOURCE pins in LinkSwitch-TN are switching nodes, the
copper area connected to SOURCE should be minimized to
minimize EMI within the thermal constraints of the design.
Inductor L1
Choose any standard off-the-shelf inductor that meets the
design requirements. A “drum” or “dog bone” “I” core inductor
is recommended with a single ferrite element due to its low cost
and very low audible noise properties. The typical inductance
value and RMS current rating can be obtained from the
LinkSwitch-TN design spreadsheet available within the PI Expert
design suite from Power Integrations. Choose L± greater than
or equal to the typical calculated inductance with RMS current
rating greater than or equal to calculated RMS inductor current.
In the boost configuration, since the SOURCE pins are tied to
DC return, the copper area connected to SOURCE can be
maximized to improve heat sinking.
The loop formed between the LinkSwitch-TN, inductor (L±),
freewheeling diode (D±), and output capacitor (C2) should be
kept as small as possible. The BYPASS pin capacitor C±
(Figure 6) should be located physically close to the SOURCE (S)
and BYPASS (BP) pins. To minimize direct coupling from
switching nodes, the LinkSwitch-TN should be placed away
Capacitor C2
The primary function of capacitor C2 is to smooth the inductor
current. The actual output ripple voltage is a function of this
capacitor’s ESR. To a first order, the ESR of this capacitor
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LNK302/304-306
from AC input lines. It may be advantageous to place capacitors
C4 and C1 in-between LinkSwitch-TN and the AC input. The
second rectifier diode D4 is optional, but may be included for
better EMI performance and higher line surge withstand
capability.
3. Maximum drain current – verify that the peak drain current is
below the data sheet peak drain specification under worst-
case conditions of highest line voltage, maximum overload
(just prior to auto-restart) and highest ambient temperature.
4. Thermal check – at maximum output power, minimum input
voltage and maximum ambient temperature, verify that the
LinkSwitch-TN SOURCE pin temperature is ±00 °C or below.
This figure ensures adequate margin due to variations in
RDS(ON) from part to part. A battery powered thermocouple
meter is recommended to make measurements when the
SOURCE pins are a switching node. Alternatively, the
ambient temperature may be raised to indicate margin to
thermal shutdown.
Quick Design Checklist
As with any power supply design, all LinkSwitch-TN designs
should be verified for proper functionality on the bench. The
following minimum tests are recommended:
±. Adequate DC rail voltage – check that the minimum DC input
voltage does not fall below 70 VDC at maximum load,
minimum input voltage.
2. Correct Diode Selection – UF400x series diodes are recom-
mended only for designs that operate in MDCM at an
ambient of 70 °C or below. For designs operating in
continuous conduction mode (CCM) and/or higher ambients,
then a diode with a reverse recovery time of 31 ns or better,
such as the BYV26C, is recommended.
In a LinkSwitch-TN design using a buck or buck-boost converter
topology, the SOURCE pin is a switching node. Oscilloscope
measurements should therefore be made with probe grounded
to a DC voltage, such as primary return or DC input rail, and not
to the SOURCE pins. The power supply input must always be
supplied from an isolated source (e.g. via an isolation transformer).
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LNK302/304-306
Absolute Maximum Ratings(1,5)
Notes:
DRAIN Pin Voltage..............................................-0.3 V to 700 V
DRAIN Pin Peak Current: LNK302...................... 200 (371) mA(2)
LNK304...................... 400 (710) mA(2)
±. All voltages referenced to SOURCE, TA = 21 °C.
2. The higher peak DRAIN current is allowed if the DRAIN
to SOURCE voltage does not exceed 400 V.
LNK301.................... 800 (±100) mA(2)
LNK306.................. ±400 (2600) mA(2)
3. Normally limited by internal circuitry.
4. ±/±6 in. from case for 1 seconds.
FEEDBACK Pin Voltage..........................................-0.3 V to 9 V
FEEDBACK Pin Current................................................. ±00 mA
BYPASS Pin Voltage...............................................-0.3 V to 9 V
Storage Temperature ..................................... -61 °C to ±10 °C
Operating Junction Temperature(3) .................. -40 °C to ±10 °C
Lead Temperature(4) .........................................................260 °C
1. Maximum ratings specified may be applied, one at a time,
without causing permanent damage to the product.
Exposure to Absolute Maximum Rating conditions for
extended periods of time may affect product reliability.
Thermal Resistance
Thermal Resistance: P or G Package:
Notes:
(qJA) ................................70 °C/W(3); 60 °C/W(4) ±. Measured on pin 2 (SOURCE) close to plastic interface.
(qJC)(±) .................................................±± °C/W 2. Measured on pin 8 (SOURCE) close to plastic interface.
D Package:
3. Soldered to 0.36 sq. in. (232 mm2), 2 oz. (6±0 g/m2) copper clad.
(qJA) ..............................±00 °C/W(3); 80 °C/W(4) 4. Soldered to ± sq. in. (641 mm2), 2 oz. (6±0 g/m2) copper clad.
(qJC)(2) .................................................30 °C/W
Conditions
SOURCE = 0 V; TJ = -40 to ±21 °C
Parameter
Symbol
Min
Typ
Max
Units
See Figure 7
(Unless Otherwise Specified)
Control Functions
Average
62
66
4
70
Output
Frequency
fOSC
TJ = 21 °C
kHz
Peak-Peak Jitter
Maximum Duty Cycle
DCMAX
IFB
S2 Open
66
30
69
72
68
5
FEEDBACK Pin Turnoff
Threshold Current
TJ = 21 °C
49
mA
FEEDBACK Pin Voltage
at Turnoff Threshold
VFB
±.14
±.61
±.76
220
V
VFB ≥2 V
(MOSFET Not Switching)
See Note A
IS±
±60
mA
DRAIN Pin
Supply Current
LNK302/304
LNK301
200
220
210
-3.3
-4.6
-2.3
-3.3
260
280
3±0
-±.8
-2.1
-±.0
-±.1
FEEDBACK Open
(MOSFET
Switching)
See Notes A, B
IS2
mA
LNK306
LNK302/304
LNK301/306
LNK302/304
LNK301/306
-1.1
-7.1
-3.8
-4.1
VBP = 0 V
TJ = 21 °C
ICH±
BYPASS Pin
Charge Current
mA
VBP = 4 V
TJ = 21 °C
ICH2
9
www.powerint.com
Rev. J 06/13
LNK302/304-306
Conditions
SOURCE = 0 V; TJ = -40 to ±21 °C
See Figure 7
Parameter
Symbol
Min
Typ
Max
Units
(Unless Otherwise Specified)
Control Functions (cont.)
BYPASS Pin
Voltage
VBP
VBPH
IBPSC
1.11
0.8
68
1.8
6.±0
±.2
V
V
BYPASS Pin
Voltage Hysteresis
0.91
BYPASS Pin
Supply Current
See Note D
mA
Circuit Protection
di/dt = 11 mA/s
±26
±41
240
27±
310
396
410
±36
±61
217
308
371
410
482
±46
±81
271
341
40±
104
1±1
TJ = 21 °C
LNK302
di/dt = 210 mA/s
TJ = 21 °C
di/dt = 61 mA/s
TJ = 21 °C
LNK304
di/dt = 4±1 mA/s
TJ = 21 °C
ILIMIT (See
Note E)
Current Limit
mA
di/dt = 71 mA/s
TJ = 21 °C
LNK301
di/dt = 100 mA/s
TJ = 21 °C
di/dt = 91 mA/s
TJ = 21 °C
LNK306
di/dt = 6±0 mA/s
108
280
178
360
647
471
TJ = 21 °C
LNK302/304
Minimum On Time
tON(MIN)
ns
LNK301
LNK306
360
400
460
100
6±0
671
Leading Edge
Blanking Time
TJ = 21 °C
See Note F
tLEB
TSD
±70
±31
2±1
±42
71
ns
°C
°C
Thermal Shutdown
Temperature
±10
Thermal Shutdown
Hysteresis
TSHD
See Note G
10
Rev. J 06/13
www.powerint.com
LNK302/304-306
Conditions
SOURCE = 0 V; TJ = -40 to ±21 °C
See Figure 7
Parameter
Symbol
Min
Typ
Max
Units
(Unless Otherwise Specified)
Output
TJ = 21 °C
LNK302
48
76
24
38
±2
±9
7
11.2
88.4
27.6
44.2
±3.8
22.±
8.±
ID = ±3 mA
TJ = ±00 °C
TJ = 21 °C
TJ = ±00 °C
TJ = 21 °C
TJ = ±00 °C
TJ = 21 °C
TJ = ±00 °C
LNK304
ID = 21 mA
ON-State
Resistance
RDS(ON)
Ω
LNK301
ID = 31 mA
LNK306
ID = 41 mA
±±
±2.9
10
LNK302/304
LNK301
VBP = 6.2 V, VFB ≥2 V,
VDS = 160 V,
OFF-State Drain
Leakage Current
70
IDSS
mA
TJ = 21 °C
LNK306
90
VBP = 6.2 V, VFB ≥2 V,
Breakdown Voltage
BVDSS
700
10
V
TJ = 21 °C
tR
tF
Rise Time
Fall Time
10
10
ns
ns
Measured in a Typical Buck
Converter Application
DRAIN Pin
Supply Voltage
V
Output Enable Delay
tEN
See Figure 9
±0
ms
Output Disable
Setup Time
tDST
0.1
ms
ms
5
LNK302
LNK304-306
LNK302
Not Applicable
Auto-Restart
ON-Time
TJ = 21 °C
See Note H
tAR
10
Not Applicable
6
Auto-Restart
Duty Cycle
DCAR
LNK304-306
Notes:
A. Total current consumption is the sum of IS± and IDSS when FEEDBACK pin voltage is ≥2 V (MOSFET not switching) and the sum of
IS2 and IDSS when FEEDBACK pin is shorted to SOURCE (MOSFET switching).
B. Since the output MOSFET is switching, it is difficult to isolate the switching current from the supply current at the DRAIN.
An alternative is to measure the BYPASS pin current at 6 V.
C. See Typical Performance Characteristics section Figure ±4 for BYPASS pin start-up charging waveform.
D. This current is only intended to supply an optional optocoupler connected between the BYPASS and FEEDBACK
pins and not any other external circuitry.
E. For current limit at other di/dt values, refer to Figure ±3.
F. This parameter is guaranteed by design.
G. This parameter is derived from characterization.
H. Auto-restart on time has the same temperature characteristics as the oscillator (inversely proportional to frequency).
11
www.powerint.com
Rev. J 06/13
LNK302/304-306
470 Ω
5 W
470 kΩ
FB
BP
D
S2
S1
50 V
50 V
0.1 μF
S
S
S
S
PI-3490-060204
Figure 7. LinkSwitch-TN General Test Circuit.
DC
(internal signal)
MAX
t
P
FB
t
EN
V
DRAIN
1
tP
=
fOSC
PI-3707-112503
Figure 8. LinkSwitch-TN Duty Cycle Measurement.
Figure 9. LinkSwitch-TN Output Enable Timing.
12
Rev. J 06/13
www.powerint.com
LNK302/304-306
Typical Performance Characteristics
1.1
1.2
1.0
0.8
0.6
0.4
0.2
1.0
0.9
0
-50 -25
0
25 50 75 100 125 150
-50 -25
0
25
50 75 100 125
Junction Temperature (°C)
Junction Temperature (°C)
Figure 10. Breakdown vs. Temperature.
Figure 11. Frequency vs. Temperature.
1.4
1.2
1.0
0.8
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
Normalized
Limit = 1
Normalized di/dt
di/dt = 1
Normalized Current
di/dt = 1
0.6
0.4
0.2
0
di/dt = 6
LNK302
LNK304
LNK305
LNK306
55 mA/µs
65 mA/µs
75 mA/µs
95 mA/µs
136 mA
257 mA
375 mA
482 mA
1
2
3
4
5
6
-50
0
50
100
150
Normalized di/dt
Temperature (°C)
Figure 13. Current Limit vs. di/dt.
Figure 12. Current Limit vs. Temperature at Normalized di/dt.
400
350
7
6
5
25 °C
300
100 °C
250
200
150
100
50
4
3
2
1
Scaling Factors:
LNK302 0.5
LNK304 1.0
LNK305 2.0
LNK306 3.4
0
0
0
2
4
6
8
10 12 14 16 18 20
0
0.2
0.4
0.6
0.8
1.0
DRAIN Voltage (V)
Time (ms)
Figure 14. BYPASS Pin Start-up Waveform.
Figure 15. Output Characteristics.
13
www.powerint.com
Rev. J 06/13
LNK302/304-306
Typical Performance Characteristics (cont.)
1000
100
10
Scaling Factors:
LNK302
LNK304
LNK305
LNK306
0.5
1.0
2.0
3.4
1
0
100 200 300 400 500 600
Drain Voltage (V)
Figure 16. COSS vs. Drain Voltage.
Part Ordering Information
• LinkSwitch Product Family
• TN Series Number
• Package Identifier
G
P
D
Plastic Surface Mount DIP
Plastic DIP
Plastic SO-8C
• Package Material
N
G
Pure Matte Tin (RoHS Compliant)
RoHS Compliant and Halogen Free (D package only)
• Tape & Reel and Other Options
Blank
Standard Configurations
Tape and Reel, ± k pcs minimum for G Package. 2.1 k pcs for D Package.
Not available for P Package.
LNK 304
G N - TL
TL
14
Rev. J 06/13
www.powerint.com
LNK302/304-306
PDIP-8B (P Package)
⊕D S .004 (.10)
Notes:
.137 (3.48)
MINIMUM
1. Package dimensions conform to JEDEC specification
MS-001-AB (Issue B 7/85) for standard dual-in-line (DIP)
package with .300 inch row spacing.
-E-
2. Controlling dimensions are inches. Millimeter sizes are
shown in parentheses.
3. Dimensions shown do not include mold flash or other
protrusions. Mold flash or protrusions shall not exceed
.006 (.15) on any side.
.240 (6.10)
.260 (6.60)
4. Pin locations start with Pin 1, and continue counter-clock-
wise to Pin 8 when viewed from the top. The notch and/or
dimple are aids in locating Pin 1. Pin 6 is omitted.
5. Minimum metal to metal spacing at the package body for
the omitted lead location is .137 inch (3.48 mm).
6. Lead width measured at package body.
Pin 1
-D-
7. Lead spacing measured with the leads constrained to be
perpendicular to plane T.
.367 (9.32)
.387 (9.83)
.057 (1.45)
.068 (1.73)
(NOTE 6)
.125 (3.18)
.145 (3.68)
.015 (.38)
MINIMUM
-T-
SEATING
PLANE
.008 (.20)
.015 (.38)
.120 (3.05)
.140 (3.56)
.300 (7.62) BSC
(NOTE 7)
.100 (2.54) BSC
.048 (1.22)
.053 (1.35)
P08B
.300 (7.62)
.390 (9.91)
.014 (.36)
.022 (.56)
⊕ T E D S .010 (.25) M
PI-2551-040110
SMD-8B (G Package)
⊕ D S .004 (.10)
Notes:
.137 (3.48)
MINIMUM
1. Controlling dimensions are
inches. Millimeter sizes are
shown in parentheses.
-E-
2. Dimensions shown do not
include mold flash or other
protrusions. Mold flash or
protrusions shall not exceed
.006 (.15) on any side.
3. Pin locations start with Pin 1,
and continue counter-clock-
wise to Pin 8 when viewed
from the top. Pin 6 is omitted.
4. Minimum metal to metal
spacing at the package body
for the omitted lead location
is .137 inch (3.48 mm).
.372 (9.45)
.388 (9.86)
.010 (.25)
.240 (6.10)
.260 (6.60)
.420
⊕ E S
.046 .060 .060 .046
.080
Pin 1
Pin 1
-D-
5. Lead width measured at
package body.
6. D and E are referenced
datums on the package
body.
.086
.186
.100 (2.54) (BSC)
.286
.367 (9.32)
.387 (9.83)
Solder Pad Dimensions
.057 (1.45)
.068 (1.73)
(NOTE 5)
.125 (3.18)
.145 (3.68)
.004 (.10)
.032 (.81)
.037 (.94)
.048 (1.22)
.053 (1.35)
°
°
.009 (.23)
0 - 8
.036 (0.91)
.044 (1.12)
.004 (.10)
.012 (.30)
G08B
PI-2546-040110
15
www.powerint.com
Rev. J 06/13
LNK302/304-306
SO-8C (D Package)
0.10 (0.004)
A-B
2X
C
2
DETAIL A
B
4
4.90 (0.193) BSC
A
4
D
8
5
GAUGE
PLANE
SEATING
PLANE
3.90 (0.154) BSC
6.00 (0.236) BSC
2
0 - 8o
C
0.25 (0.010)
BSC
1.04 (0.041) REF
0.10 (0.004)
C D
0.40 (0.016)
1.27 (0.050)
2X
1
4
Pin 1 ID
0.20 (0.008)
C
2X
7X 0.31 - 0.51 (0.012 - 0.020)
1.27 (0.050) BSC
0.25 (0.010)
M
C A-B D
1.35 (0.053)
1.75 (0.069)
1.25 - 1.65
(0.049 - 0.065)
DETAIL A
H
0.10 (0.004)
0.25 (0.010)
0.10 (0.004)
C
7X
SEATING PLANE
0.17 (0.007)
0.25 (0.010)
C
Reference
Solder Pad
Dimensions
+
Notes:
1. JEDEC reference: MS-012.
2. Package outline exclusive of mold flash and metal burr.
3. Package outline inclusive of plating thickness.
2.00 (0.079)
4.90 (0.193)
4. Datums A and B to be determined at datum plane H.
5. Controlling dimensions are in millimeters. Inch dimensions
are shown in parenthesis. Angles in degrees.
+
+
+
1.27 (0.050)
0.60 (0.024)
D07C
PI-4526-040110
16
Rev. J 06/13
www.powerint.com
LNK302/304-306
Revision
Notes
Date
03/03
0±/04
08/04
±2/04
C
D
E
F
Release data sheet.
Corrected Minimum On-Time.
Added LNK302.
Added lead-free ordering information.
Minor error corrections.
Renamed Feedback Pin Voltage Parameter to Feedback Pin Voltage at Turnoff Threshold and removed condition.
Added SO-8C package.
G
03/01
H
I
±2/06
±±/08
06/±3
Updated Part Ordering Information section with Halogen Free.
Updated Key Features column in Table 2. Updated style of data sheet.
J
17
www.powerint.com
Rev. J 06/13
For the latest updates, visit our website: www.powerint.com
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power
Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES
NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.
Patent Information
The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered
by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A
complete list of Power Integrations patents may be found at www.powerint.com. Power Integrations grants its customers a license under
certain patent rights as set forth at http://www.powerint.com/ip.htm.
Life Support Policy
POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:
1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii)
whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant
injury or death to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause
the failure of the life support device or system, or to affect its safety or effectiveness.
The PI logo, TOPSwitch, TinySwitch, LinkSwitch, LYTSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero, HiperPFS, HiperTFS,
HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, StakFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc.
Other trademarks are property of their respective companies. ©2014, Power Integrations, Inc.
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