TISP7125F3 [POINN]
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS; 三重双向晶闸管过电压保护
| 型号： | TISP7125F3 |
| 厂家： | 
POWER INNOVATIONS LTD |
| 描述： | TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS |
| 文件： | 总25页 (文件大小：481K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
Copyright © 2000, Power Innovations Limited, UK
MARCH 1994 - REVISED MARCH 2000
TELECOMMUNICATION SYSTEM SECONDARY PROTECTION
G
Patented Ion-Implanted Breakdown Region
– Precise DC and Dynamic Voltages
D PACKAGE
(TOP VIEW)
G
1
8
7
6
5
T
NC
NC
R
VDRM
V(BO)
DEVICE
2
NU
NU
G
V
V
‘7125F3
‘7150F3
‘7180F3
‘7240F3
‘7260F3
‘7290F3
‘7320F3
‘7350F3
‘7380F3†
100
120
145
180
200
220
240
275
270
125
150
180
240
260
290
320
350
380
3
4
MDXXAL
P PACKAGE
(TOP VIEW)
1
2
T
8
7
G
NC
NU
† For new designs use ‘7350F3 instead of ‘7380F3
NC
R
3
4
NU
G
6
5
G
G
Planar Passivated Junctions
MDXXAJA
– Low Off-State Current....................< 10 µA
NC - No internal connection
NU - Nonusable; no external electrical connection
should be made to these pins.
Specified ratings require connection of pin 5 and
Rated for International Surge Wave Shapes
– Single and Simultaneous Impulses
pin 8.
SL PACKAGE
(TOP VIEW)
ITSP
WAVE SHAPE
STANDARD
A
2/10
8/20
GR-1089-CORE
IEC 61000-4-5
FCC Part 68
190
175
110
1
T
10/160
2
3
G
R
FCC Part 68
10/700
70
ITU-T K.20/21
FCC Part 68
MDXXAGA
MD7XAACA
10/560
50
45
10/1000
GR-1089-CORE
device symbol
G
..................UL Recognized Component
R
T
description
The TISP7xxxF3 series are 3-point overvoltage
protectors designed for protecting against
metallic (differential mode) and simultaneous
longitudinal (common mode) surges. Each
terminal pair has the same voltage limiting
values and surge current capability. This terminal
pair surge capability ensures that the protector
can meet the simultaneous longitudinal surge
requirement which is typically twice the metallic
surge requirement.
SD7XAB
G
Terminals T, R and G correspond to the
alternative line designators of A, B and C
AVAILABLE OPTIONS
DEVICE
PACKAGE
CARRIER
ORDER #
TAPE AND REEL TISP7xxxF3DR
TISP7xxxF3
D, Small-outline
TUBE
TUBE
TUBE
TISP7xxxF3D
TISP7xxxF3P
TISP7xxxF3SL
TISP7xxxF3
TISP7xxxF3
P, Plastic DIP
SL, Single-in-line
P R O D U C T
I N F O R M A T I O N
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
1
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
description (continued)
Each terminal pair has a symmetrical voltage-triggered thyristor characteristic. Overvoltages are initially
clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to
crowbar into a low-voltage on state. This low-voltage on state causes the current resulting from the
overvoltage to be safely diverted through the device. The high crowbar holding current prevents d.c. latchup
as the diverted current subsides.These protectors are guaranteed to voltage limit and withstand the listed
lightning surges in both polarities.
These medium and high voltage devices are offered in nine voltage variants to meet a range battery and
ringing voltage requirements. They are guaranteed to suppress and withstand the listed international lightning
surges on any terminal pair. Similar devices with working voltages of 58 V and 66 V are detailed in the
TISP7072F3, TISP7082F3 data sheet.
absolute maximum ratings, T = 25 °C (unless otherwise noted)
A
RATING
SYMBOL
VALUE
UNIT
Repetitive peak off-state voltage, 0 °C < TA < 70 °C
‘7125F3
100
120
145
180
200
220
240
275
270
‘7150F3
‘7180F3
‘7240F3
‘7260F3
‘7290F3
‘7320F3
‘7350F3
‘7380F3
VDRM
V
Non-repetitive peak on-state pulse current (see Notes 1 and 2)
1/2 (Gas tube differential transient, 1/2 voltage wave shape)
2/10 (Telcordia GR-1089-CORE, 2/10 voltage wave shape)
1/20 (ITU-T K.22, 1.2/50 voltage wave shape, 25 Ω resistor)
8/20 (IEC 61000-4-5, combination wave generator, 1.2/50 voltage wave shape)
10/160 (FCC Part 68, 10/160 voltage wave shape)
330
190
100
175
110
95
IPPSM
A
4/250 (ITU-T K.20/21, 10/700 voltage wave shape, simultaneous)
0.2/310 (CNET I 31-24, 0.5/700 voltage wave shape)
70
5/310 (ITU-T K.20/21, 10/700 voltage wave shape, single)
5/320 (FCC Part 68, 9/720 voltage wave shape, single)
70
70
10/560 (FCC Part 68, 10/560 voltage wave shape)
50
10/1000 (Telcordia GR-1089-CORE, 10/1000 voltage wave shape)
Non-repetitive peak on-state current, 0 °C < TA < 70 °C (see Notes 1 and 3)
45
50 Hz, 1 s
D Package
P Package
SL Package
4.3
5.7
ITSM
A
7.1
Initial rate of rise of on-state current, Linear current ramp, Maximum ramp value < 38 A
diT/dt
TJ
250
A/µs
°C
Junction temperature
-65 to +150
-65 to +150
Storage temperature range
Tstg
°C
NOTES: 1. Initially the TISP® must be in thermal equilibrium at the specified TA. The surge may be repeated after the TISP® returns to its
initial conditions. The rated current values may be applied singly either to the R to G or to the T to G or to the T to R terminals.
Additionally, both R to G and T to G may have their rated current values applied simultaneously (In this case the total G terminal
current will be twice the above rated current values).
2. See Thermal Information for derated IPPSM values 0 °C < TA < 70 °C and Applications Information for details on wave shapes.
3. Above 70 °C, derate ITSM linearly to zero at 150 °C lead temperature.
P R O D U C T
I N F O R M A T I O N
2
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
electrical characteristics for all terminal pairs, T = 25 °C (unless otherwise noted)
A
PARAMETER
Repetitive peak off-
state current
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IDRM
V
D = VDRM, 0 °C < TA < 70 °C
±10
µA
‘7125F3
‘7150F3
‘7180F3
‘7240F3
‘7260F3
‘7290F3
‘7320F3
‘7350F3
‘7380F3
‘7125F3
‘7150F3
‘7180F3
‘7240F3
‘7260F3
‘7290F3
‘7320F3
‘7350F3
‘7380F3
±125
±150
±180
±240
±260
±290
±320
±350
±380
±143
±168
±198
±269
±289
±319
±349
±379
±409
±0.8
V(BO) Breakover voltage
dv/dt = ±250 V/ms, RSOURCE = 300 Ω
V
dv/dt ≤ ±1000 V/µs, Linear voltage ramp,
Maximum ramp value = ±500 V
Impulse breakover
V(BO)
V
voltage
di/dt = ±20 A/µs, Linear current ramp,
Maximum ramp value = ±10 A
I(BO)
VT
Breakover current
On-state voltage
Holding current
dv/dt = ±250 V/ms, RSOURCE = 300 Ω
IT = ±5 A, tW = 100 µs
±0.1
A
V
A
±5
IH
IT = ±5 A, di/dt = +/-30 mA/ms
±0.15
±5
Critical rate of rise of
off-state voltage
Off-state current
dv/dt
ID
Linear voltage ramp, Maximum ramp value < 0.85VDRM
kV/µs
µA
VD = ±50 V
±10
48
41
52
44
47
39
40
31
23
17
18
13
27
23
f = 1 MHz, Vd = 1 V rms, VD = 0
‘7125 thru ‘7180
‘7240 thru ‘7380
‘7125 thru ‘7180
‘7240 thru ‘7380
‘7125 thru ‘7180
‘7240 thru ‘7380
‘7125 thru ‘7180
‘7240 thru ‘7380
‘7125 thru ‘7180
‘7240 thru ‘7380
‘7125 thru ‘7180
‘7240 thru ‘7380
‘7125 thru ‘7180
‘7240 thru ‘7380
37
31
40
34
36
30
31
24
17
13
14
10
20
17
f = 1 MHz, Vd = 1 V rms, VD = -1 V
f = 1 MHz, Vd = 1 V rms, VD = -2 V
f = 1 MHz, Vd = 1 V rms, VD = -5 V
f = 1 MHz, Vd = 1 V rms, VD = -50 V
f = 1 MHz, Vd = 1 V rms, VD = -100 V
Coff
Off-state capacitance
pF
f = 1 MHz, Vd = 1 V rms, VDTR = 0
(see Note 4)
NOTE 4: Three-terminal guarded measurement, unmeasured terminal voltage bias is zero. First six capacitance values, with bias VD, are
for the R-G and T-G terminals only. The last capacitance value, with bias VDTR, is for the T-R terminals.
P R O D U C T
I N F O R M A T I O N
3
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
thermal characteristics
PARAMETER
MIN
TYP
MAX
UNIT
TEST CONDITIONS
D Package
160
100
135
Ptot = 0.8 W, TA = 25°C
5 cm2, FR4 PCB
RθJA
Junction to free air thermal resistance
P Package
°C/W
SL Package
PARAMETER MEASUREMENT INFORMATION
+i
Quadrant I
Switching
ITSP
Characteristic
ITSM
V(BO)
I(BO)
IH
IDRM
ID
VDRM
VD
+v
-v
ID
VD
VDRM
IDRM
IH
I(BO)
V(BO)
ITSM
Quadrant III
ITSP
Switching
Characteristic
PMXXAAA
-i
Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR T AND R TERMINALS
T and G and R and G measurements are referenced to the G terminal
T and R measurements are referenced to the R terminal
P R O D U C T
I N F O R M A T I O N
4
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
TYPICAL CHARACTERISTICS
R and G, or T and G terminals
TISP7125F3 THRU TISP7180F3
TISP7240F3 THRU TISP7380F3
OFF-STATE CURRENT
vs
OFF-STATE CURRENT
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
TC7MAC
TC7HAC
100
10
100
10
VD = 50 V
VD = 50 V
1
1
0·1
VD = -50 V
0·1
VD = -50 V
0·01
0·001
0·01
0·001
-25
0
25
50
75
100 125 150
-25
0
25
50
75
100 125 150
TJ - Junction Temperature - °C
TJ - Junction Temperature - °C
Figure 2.
Figure 3.
NORMALISED BREAKDOWN VOLTAGES
vs
NORMALISED BREAKDOWN VOLTAGES
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
TC7HAE
TC7MAE
1.2
1.1
1.0
0.9
1.2
1.1
1.0
0.9
V(BO)
V(BO)
V(BR)M
V(BR)M
V(BR)
V(BR)
Normalised to V(BR)
Normalised to V(BR)
I(BR) = 1 mA and 25°C
Positive Polarity
I(BR) = 1 mA and 25°C
Positive Polarity
-25
0
25
50
75
100 125 150
-25
0
25
50
75
100 125 150
TJ - Junction Temperature - °C
TJ - Junction Temperature - °C
Figure 4.
Figure 5.
P R O D U C T
I N F O R M A T I O N
5
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
TYPICAL CHARACTERISTICS
R and G, or T and G terminals
TISP7125F3 THRU TISP7180F3
NORMALISED BREAKDOWN VOLTAGES
vs
TISP7240F3 THRU TISP7380F3
NORMALISED BREAKDOWN VOLTAGES
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
TC7MAF
TC7HAF
1.2
1.1
1.0
0.9
1.2
1.1
1.0
0.9
V(BR)M
V(BO)
V(BO)
V(BR)M
Normalised to V(BR)
I(BR) = 1 mA and 25°C
Normalised to V(BR)
I(BR) = 1 mA and 25°C
V(BR)
V(BR)
Negative Polarity
Negative Polarity
-25
0
25
50
75
100
125 150
-25
0
25
50
75
100
125 150
TJ - Junction Temperature - °C
TJ - Junction Temperature - °C
Figure 6.
Figure 7.
ON-STATE CURRENT
vs
ON-STATE CURRENT
vs
ON-STATE VOLTAGE
ON-STATE VOLTAGE
TC7HAL
TC7MAL
100
100
10
1
Positive Polarity
Positive Polarity
10
150°C
25°C
-40°C
150°C
25°C
-40°C
5
1
1
2
3
4
5
6
7 8 9 10
1
2
3
4
6
7 8 9 10
VT - On-State Voltage - V
VT - On-State Voltage - V
Figure 8.
Figure 9.
P R O D U C T
I N F O R M A T I O N
6
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
TYPICAL CHARACTERISTICS
R and G, or T and G terminals
TISP7125F3 THRU TISP7180F3
TISP7240F3 THRU TISP7380F3
ON-STATE CURRENT
vs
ON-STATE CURRENT
vs
ON-STATE VOLTAGE
ON-STATE VOLTAGE
TC7MAM
TC7HAM
100
10
1
100
10
1
Negative Polarity
Negative Polarity
150°C
150°C
25°C
25°C
-40°C
6
-40°C
4
1
2
3
4
5
7
8 9 10
1
2
3
5
6
7 8 9 10
VT - On-State Voltage - V
VT - On-State Voltage - V
Figure 10.
Figure 11.
HOLDING CURRENT & BREAKOVER CURRENT
HOLDING CURRENT & BREAKOVER CURRENT
vs
JUNCTION TEMPERATURE
TC7HAH
1.0
0.9
0.8
0.7
1·0
0·9
0·8
0·7
0·6
0.6
0.5
0·5
0·4
0.4
0.3
0·3
+I(BO)
0·2
0.2
0.1
IH
-I(BO)
0·1
0·09
0·08
0·07
0·06
-25
0
25
50
75
100 125 150
-25
0
25
50
75
100
125 150
TJ - Junction Temperature - °C
TJ - Junction Temperature - °C
Figure 12.
Figure 13.
P R O D U C T
I N F O R M A T I O N
7
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
TYPICAL CHARACTERISTICS
R and G, or T and G terminals
TISP7125F3 THRU TISP7180F3
NORMALISED BREAKOVER VOLTAGE
vs
TISP7240F3 THRU TISP7380F3
NORMALISED BREAKOVER VOLTAGE
vs
RATE OF RISE OF PRINCIPLE CURRENT
RATE OF RISE OF PRINCIPLE CURRENT
TC7MAU
TC7HAU
1.2
1.1
1.0
1.2
1.1
1.0
Positive
Positive
Negative
Negative
0·001
0·01
0·1
1
10
100
0·001
0·01
0·1
1
10
100
di/dt - Rate of Rise of Principle Current - A/µs
di/dt - Rate of Rise of Principle Current - A/µs
Figure 14.
Figure 15.
SURGE CURRENT
vs
SURGE CURRENT
vs
DECAY TIME
DECAY TIME
TC7MAA
TC7HAA
1000
100
10
1000
100
10
2
2
10
100
Decay Time - µs
Figure 16.
1000
10
100
Decay Time - µs
Figure 17.
1000
P R O D U C T
I N F O R M A T I O N
8
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
TYPICAL CHARACTERISTICS
R and T terminals
TISP7125F3 THRU TISP7180F3
TISP7240F3 THRU TISP7380F3
OFF-STATE CURRENT
vs
OFF-STATE CURRENT
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
TC7MAD
TC7HAD
100
10
100
10
1
1
0·1
0·1
0·01
0·001
0·01
0·001
-25
0
25
50
75
100 125 150
-25
0
25
50
75
100 125 150
TJ - Junction Temperature - °C
TJ - Junction Temperature - °C
Figure 18.
Figure 19.
NORMALISED BREAKDOWN VOLTAGES
vs
NORMALISED BREAKDOWN VOLTAGES
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
TC7HAG
TC7MAG
1.2
1.1
1.0
0.9
1.2
1.1
1.0
0.9
V(BO)
V(BO)
V(BR)M
V(BR)M
V(BR)
V(BR)
-25
0
25
50
75
100 125 150
-25
0
25
50
75
100 125 150
TJ - Junction Temperature - °C
TJ - Junction Temperature - °C
Figure 20.
Figure 21.
P R O D U C T
I N F O R M A T I O N
9
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
TYPICAL CHARACTERISTICS
R and T terminals
TISP7125F3 THRU TISP7180F3
ON-STATE CURRENT
vs
TISP7240F3 THRU TISP7380F3
ON-STATE CURRENT
vs
ON-STATE VOLTAGE
ON-STATE VOLTAGE
TC7MAK
TC7HAK
100
10
1
100
10
1
150°C
150°C
25°C
25°C
-40°C
-40°C
1
2
3
4
5
6
7
8
9 10
1
2
3
4
5
6
7 8 9 10
VT - On-State Voltage - V
VT - On-State Voltage - V
Figure 22.
Figure 23.
HOLDING CURRENT & BREAKOVER CURRENT
vs
HOLDING CURRENT & BREAKOVER CURRENT
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
TC7MAJ
TC7HAJ
1.0
1·0
0·9
0.9
0.8
0.7
0·8
0·7
0·6
0.6
0.5
0·5
0·4
0·3
0.4
I(BO)
0.3
IH
0·2
0.2
0.1
IH
I(BO)
0·1
0·09
0·08
0·07
0·06
-25
0
25
50
75
100 125 150
-25
0
25
50
75
100
125 150
TJ - Junction Temperature - °C
TJ - Junction Temperature - °C
Figure 24.
Figure 25.
P R O D U C T
I N F O R M A T I O N
10
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
TYPICAL CHARACTERISTICS
R and T terminals
TISP7125F3 THRU TISP7180F3
TISP7240F3 THRU TISP7380F3
NORMALISED BREAKOVER VOLTAGE
vs
NORMALISED BREAKOVER VOLTAGE
vs
RATE OF RISE OF PRINCIPLE CURRENT
RATE OF RISE OF PRINCIPLE CURRENT
TC7MAV
TC7HAV
1.2
1.1
1.0
1.2
1.1
1.0
0·001
0·01
0·1
1
10
100
0·001
0·01
0·1
1
10
100
di/dt - Rate of Rise of Principle Current - A/µs
di/dt - Rate of Rise of Principle Current - A/µs
Figure 26.
Figure 27.
P R O D U C T
I N F O R M A T I O N
11
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
THERMAL INFORMATION
TISP7125F3 THRU TISP7180F3
TISP7240F3 THRU TISP7380F3
MAXIMUM NON-RECURRING 50 Hz CURRENT
vs
MAXIMUM NON-RECURRING 50 Hz CURRENT
vs
CURRENT DURATION
CURRENT DURATION
TI7MAA
TI7HAA
VGEN = 350 Vrms
VGEN = 250 Vrms
RGEN = 20 to 250 Ω
RGEN = 10 to 150 Ω
10
10
SL Package
SL Package
P Package
P Package
D Package
10
D Package
1
1
0·1
1
100
1000
0·1
1
10
100
1000
t - Current Duration - s
t - Current Duration - s
Figure 28.
Figure 29.
THERMAL RESPONSE
THERMAL RESPONSE
TI7MAB
TI7MAB
100
10
1
100
10
1
D Package
D Package
P Package
P Package
SL Package
SL Package
0·0001 0·001 0·01
0·1
1
10
100 1000
0·0001 0·001 0·01
0·1
1
10
100 1000
t - Power Pulse Duration - s
t - Power Pulse Duration - s
Figure 30.
Figure 31.
P R O D U C T
I N F O R M A T I O N
12
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
THERMAL INFORMATION
Non-repetitive peak on-state pulse derated values for 0 °C ≤ T ≤ 70 °C
A
RATING
SYMBOL
VALUE
UNIT
Non-repetitive peak on-state pulse current, 0 °C < TA < 70 °C (see Notes 5, 6 and 7)
1/2 (Gas tube differential transient, 1/2 voltage wave shape)
2/10 (Telcordia GR-1089-CORE, 2/10 voltage wave shape)
1/20 (ITU-T K.22, 1.2/50 voltage wave shape, 25 Ω resistor)
8/20 (IEC 61000-4-5, combination wave generator, 1.2/50 voltage wave shape)
10/160 (FCC Part 68, 10/160 voltage wave shape)
320
175
90
150
90
IPPSM
A
4/250 (ITU-T K.20/21, 10/700 voltage wave shape, dual)
0.2/310 (CNET I 31-24, 0.5/700 voltage wave shape)
70
65
5/310 (ITU-T K.20/21, 10/700 voltage wave shape, single)
5/320 (FCC Part 68, 9/720 voltage wave shape)
65
65
10/560 (FCC Part 68, 10/560 voltage wave shape)
45
10/1000 (Telcordia GR-1089-CORE, 10/1000 voltage wave shape)
40
NOTES: 5. Initially the TISP® must be in thermal equilibrium at the specified TA. The impulse may be repeated after the TISP® returns to its
initial conditions. The rated current values may be applied either to the R to G or to the T to G or to the T to R terminals.
Additionally, both R to G and T to G may have their rated current values applied simultaneously (In this case the total G terminal
current will be twice the above rated current values).
6. See Applications Information for details on wave shapes.
7. Above 70 °C, derate IPPSM linearly to zero at 150 °C lead temperature.
P R O D U C T
I N F O R M A T I O N
13
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
APPLICATIONS INFORMATION
deployment
These devices are three terminal overvoltage protectors. They limit the voltage between three points in the
circuit. Typically, this would be the two line conductors and protective ground (Figure 32).
Th3
Th1
Th2
Figure 32. MULTI-POINT PROTECTION
In Figure 32, protectors Th2 and Th3 limit the maximum voltage between each conductor and ground to the
±V
±V
of the individual protector. Protector Th1 limits the maximum voltage between the two conductors to its
value.
(BO)
(BO)
lightning surge
wave shape notation
Most lightning tests, used for equipment verification, specify a unidirectional sawtooth waveform which has an
exponential rise and an exponential decay. Wave shapes are classified in terms of rise time in microseconds
and a decay time in microseconds to 50% of the maximum amplitude. The notation used for the wave shape
is rise time/decay time, without the microseconds quantity and the “/” between the two values has no
mathematical significance. A 50A, 5/310 waveform would have a peak current value of 50 A, a rise time of
®
5 µs and a decay time of 310 µs. The TISP surge current graph comprehends the wave shapes of commonly
used surges.
generators
There are three categories of surge generator type: single wave shape, combination wave shape and circuit
defined. Single wave shape generators have essentially the same wave shape for the open circuit voltage and
short circuit current (e.g. 10/1000 open circuit voltage and short circuit current). Combination generators have
two wave shapes, one for the open circuit voltage and the other for the short circuit current (e.g. 1.2/50 open
circuit voltage and 8/20 short circuit current) Circuit specified generators usually equate to a combination
generator, although typically only the open circuit voltage wave shape is referenced (e.g. a 10/700 open
circuit voltage generator typically produces a 5/310 short circuit current). If the combination or circuit defined
generators operate into a finite resistance the wave shape produced is intermediate between the open circuit
and short circuit values.
ITU-T 10/700 generator
This circuit defined generator is specified in many standards. The descriptions and values are not consistent
between standards and it is important to realise that it is always the same generator being used.
Figure 33 shows the 10/700 generator circuit defined in ITU-T recommendation K.20 (10/96) “Resistibility of
telecommunication switching equipment to overvoltages and overcurrents”. The basic generator comprises
of:
capacitor C , charged to voltage V , which is the energy storage element.
1
C
switch SW to discharge the capacitor into the output shaping network
P R O D U C T
I N F O R M A T I O N
14
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
shunt resistor R , series resistor R and shunt capacitor C form the output shaping network.
1
2
2
series feed resistor R to connect to one line conductor for single surge
3
series feed resistor R to connect to the other line conductor for dual surging
4
VC
2.8 kV
R2
15 Ω
R3
25 Ω
70 A
5/310
SW
R
T
T
R
R
T
G
R1
50 Ω
C1
20 µF
C2
200 nF
70 A
5/310
G
G
T AND G
TEST
R AND G
TEST
R AND T
TEST
10/700 GENERATOR - SINGLE TERMINAL PAIR TEST
95 A
4/250
R4
25 Ω
VC
5.2 kV
95 A
4/250
R2
15 Ω
R3
25 Ω
SW
T
R
C1
20 µF
R1
50 Ω
C2
200 nF
190 A
4/250
G
DUAL
10/700 GENERATOR - DUAL TERMINAL PAIR TEST
T AND G,
R AND G
TEST
Figure 33.
In the normal single surge equipment test configuration, the unsurged line is grounded. This is shown by the
dotted lines in the top drawing of Figure 33. However, doing this at device test places one terminal pair in
parallel with another terminal pair. To check the individual terminal pairs of the TISP7xxxF3, without any
paralleled operation, the unsurged terminal is left unconnected.
With the generator output open circuit, when SW closes, C1 discharges through R . The decay time constant
1
will be C R , or 20 x 50 = 1000 µs. For the 50% voltage decay time the time constant needs to be multiplied
1
1
by 0.697, giving 0.697 x 1000 = 697 µs which is rounded to 700 µs.
The output rise time is controlled by the time constant of R and C . which is 15 x 200 = 3000 ns or 3 µs.
2
2
Virtual voltage rise times are given by straight line extrapolation through the 30% and 90% points of the
voltage waveform to zero and 100%. Mathematically this is equivalent to 3.24 times the time constant, which
gives 3.24 x 3 = 9.73 which is rounded to 10 µs. Thus the open circuit voltage rises in 10 µs and decays in
700 µs, giving the 10/700 generator its name.
When the overvoltage protector switches it effectively shorts the generator output via the series 25 Ω resistor.
Two short circuit conditions need to be considered: single output using R only (top circuit of Figure 33) and
3
dual output using R and R (bottom circuit of Figure 33).
3
4
For the single test, the series combination of R and R (15 + 25 = 40 Ω) is in shunt with R . This lowers the
2
3
1
discharge resistance from 50 Ω to 22.2 Ω, giving a discharge time constant of 444 µs and a 50% current
decay time of 309.7 µs, which is rounded to 310 µs.
For the rise time, R and R are in parallel, reducing the effective source resistance from 15 Ω to 9.38 Ω,
2
3
giving a time constant of 1.88 µs. Virtual current rise times are given by straight line extrapolation through the
10% and 90% points of the current waveform to zero and 100%. Mathematically this is equivalent to 2.75
P R O D U C T
I N F O R M A T I O N
15
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
times the time constant, which gives 2.75 x 1.88 = 5.15, which is rounded to 5 µs. Thus the short circuit
current rises in 5 µs and decays in 310 µs, giving the 5/310 wave shape.
The series resistance from C to the output is 40 Ω giving an output conductance of 25 A/kV. For each 1 kV of
1
capacitor charge voltage, 25 A of output current will result.
For the dual test, the series combination of R plus R and R in parallel (15 + 12.5 = 27.5 Ω) is in shunt with
2
3
4
R . This lowers the discharge resistance from 50 Ω to 17.7 Ω, giving a discharge time constant of 355 µs and
1
a 50% current decay time of 247 µs, which is rounded to 250 µs.
For the rise time, R , R and R are in parallel, reducing the effective source resistance from 15 Ω to 6.82 Ω,
2
3
4
giving a time constant of 1.36 µs, which gives a current rise time of 2.75 x 1.36 = 3.75, which is rounded to
4 µs. Thus the short circuit current rises in 4 µs and decays in 250 µs, giving the 4/250 wave shape.
The series resistance from C to an individual output is 2 x 27.5 = 55 Ω giving an output conductance of
1
18 A/kV. For each 1 kV of capacitor charge voltage, 18 A of output current will result.
At 25 °C these protectors are rated at 70 A for the single terminal pair condition and 95 A for the dual
condition (R and G terminals and T and G terminals). In terms of generator voltage, this gives a maximum
generator setting of 70 x 40 = 2.8 kV for the single condition and 2 x 95 x 27.5 = 5.2 kV for the dual condition.
The higher generator voltage setting for the dual condition is due to the current waveform decay being shorter
at 250 µs compared to the 310 µs value of the single condition.
Other ITU-T recommendations use the 10/700 generator: K.17 (11/88) “Tests on power-fed repeaters using
solid-state devices in order to check the arrangements for protection from external interference” and K.21(10/
96) “Resistibility of subscriber's terminal to overvoltages and overcurrents“, K.30 (03/93) “Positive
temperature coefficient (PTC) thermistors”.
Several IEC publications use the 10/700 generator, common ones are IEC 6100-4-5 (03/95) “Electromagnetic
compatibility (EMC) - Part 4: Testing and measurement techniques - Section 5: Surge immunity test” and IEC
60950 (04/99) “Safety of information technology equipment”.
The IEC 60950 10/700 generator is carried through into other “950” derivatives. Europe is harmonised by
CENELEC (Comité Européen de Normalization Electro-technique) under EN 60950 (included in the Low
Voltage Directive, CE mark). US has UL (Underwriters Laboratories) 1950 and Canada CSA (Canadian
Standards Authority) C22.2 No. 950.
FCC Part 68 “Connection of terminal equipment to the telephone network” (47 CFR 68) uses the 10/700
generator for Type B surge testing. Part 68 defines the open circuit voltage wave shape as 9/720 and the
short circuit current wave shape as 5/320 for a single output. The current wave shape in the dual (longitudinal)
test condition is not defined, but it can be assumed to be 4/250.
Several VDE publications use the 10/700 generator, for example: VDE 0878 Part 200 (12/92)
”Electromagnetic compatibility of information technology equipment and telecommunications equipment;
Immunity of analogue subscriber equipment”.
1.2/50 generators
The 1.2/50 open circuit voltage and 8/20 short circuit current combination generator is defined in IEC 61000-
4-5 (03/95) “Electromagnetic compatibility (EMC) - Part 4: Testing and measurement techniques - Section 5:
Surge immunity test”. This generator has a fictive output resistance of 2 Ω, meaning that dividing the open
circuit output voltage by the short circuit output current gives a value of 2 Ω (500 A/kV).
P R O D U C T
I N F O R M A T I O N
16
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
The combination generator has three testing configurations; directly applied for testing between equipment
a.c. supply connections, applied via an external 10 Ω resistor for testing between the a.c. supply connections
and ground, and applied via an external 40 Ω resistor for testing all other lines. For unshielded unsymmetrical
data or signalling lines, the combination generator is applied via a 40 Ω resistor either between lines or line to
ground. For unshielded symmetrical telecommunication lines, the combination generator is applied to all lines
via a resistor of n x 40 Ω, where n is the number of conductors and the maximum value of external feed
resistance is 250 Ω. Thus for four conductors n = 4 and the series resistance is 4 x 40 = 160 Ω. For ten
conductors the resistance cannot be 10 x 40 = 400 Ω and must be 250 Ω. The combination generator is used
for short distance lines, long distance lines are tested with the 10/700 generator.
When the combination generator is used with a 40 Ω, or more, external resistor, the current wave shape is not
8/20, but becomes closer to the open circuit voltage wave shape of 1.2/50. For example, a commercial
generator when used with 40 Ω produced an 1.4/50 wave shape.
The wave shapes of 1.2/50 and 8/20 occur in other generators as well. British Telecommunication has a
combination generator with 1.2/50 voltage and 8/20 current wave shapes, but it has a fictive resistance of 1 Ω.
ITU-T recommendation K.22 “Overvoltage resistibility of equipment connected to an ISDN T/S BUS” (05/95)
has a 1.2/50 generator option using only resistive and capacitive elements, Figure 34.
C4
8 nF
VC
1 kV
R2
13 Ω
C3
8 nF
SW
NOTE: SOME STANDARDS
REPLACE OUTPUT
CAPACITORS WITH
25 Ω RESISTORS
R1
76 Ω
C1
1 µF
C2
30 nF
K.22 1.2/50 GENERATOR
Figure 34.
The K.22 generator produces a 1.4/53 open circuit voltage wave. Using 25 Ω output resistors, gives a single
short circuit current output wave shape of 0.8/18 with 26 A/kV and a dual of 0.6/13 with 20 A/kV. These
current wave shapes are often rounded to 1/20 and 0.8/14.
There are 8/20 short circuit current defined generators. These are usually very high current, 10 kA or more
and are used for testing a.c. protectors, primary protection modules and some Gas Discharge Tubes.
impulse testing
To verify the withstand capability and safety of the equipment, standards require that the equipment is tested
with various impulse wave forms. The table in this section shows some common test values.
Manufacturers are being increasingly required to design in protection coordination. This means that each
protector is operated at its design level and currents are diverted through the appropriate protector e.g. the
primary level current through the primary protector and lower levels of current may be diverted through the
secondary or inherent equipment protection. Without coordination, primary level currents could pass through
the equipment only designed to pass secondary level currents. To ensure coordination happens with fixed
voltage protectors, some resistance is normally used between the primary and secondary protection (R1a
and R1b Figure 36). The values given in this data sheet apply to a 400 V (d.c. sparkover) gas discharge tube
primary protector and the appropriate test voltage when the equipment is tested with a primary protector.
P R O D U C T
I N F O R M A T I O N
17
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
PEAK VOLTAGE
SETTING
V
VOLTAGE
WAVE FORM
µs
PEAK CURRENT
CURRENT
TISP7xxxF3
SERIES
COORDINATION
RESISTANCE
Ω (MIN.)
STANDARD
VALUE
A
WAVE FORM 25 °C RATING RESISTANCE
µs
A
2 x 190
2 x 45
110
50
Ω
2500
2/10
2 x 500
2 x 100
200
2/10
GR-1089-CORE
12
NA
1000
10/1000
10/160
10/1000
10/160
10/560
5/320 †
5/320 †
4/250
1500
6
8
800
10/560
100
FCC Part 68
(March 1998)
1000
9/720 †
(SINGLE)
(DUAL)
0.5/700
10/700
25
70
NA
1500
37.5
2 x 27
37.5
25
70
0
1500
2 x 95
70
I 31-24
1500
0.2/310
5/310
0
0
NA
NA
NA
6
1000
70
1500
(SINGLE)
(SINGLE)
(DUAL)
37.5
100
5/310
70
0
ITU-T K20/K21
4000
5/310
70
17
0
4000
2 x 72
4/250
2 x 95
6
† FCC Part 68 terminology for the waveforms produced by the ITU-T recommendation K21 10/700 impulse generator
NA = Not Applicable, primary protection removed or not specified.
If the impulse generator current exceeds the protectors current rating then a series resistance can be used to
reduce the current to the protectors rated value and so prevent possible failure. The required value of series
resistance for a given waveform is given by the following calculations. First, the minimum total circuit
impedance is found by dividing the impulse generators peak voltage by the protectors rated current. The
impulse generators fictive impedance (generators peak voltage divided by peak short circuit current) is then
subtracted from the minimum total circuit impedance to give the required value of series resistance. In some
cases the equipment will require verification over a temperature range. By using the derated waveform values
from the thermal information section, the appropriate series resistor value can be calculated for ambient
temperatures in the range of 0 °C to 70 °C.
protection voltage
The protection voltage, (V
), increases under lightning surge conditions due to thyristor regeneration. This
(BO)
®
increase is dependent on the rate of current rise, di/dt, when the TISP is clamping the voltage in its
breakdown region. The V value under surge conditions can be estimated by multiplying the 50 Hz rate
(BO)
V
(250 V/ms) value by the normalised increase at the surge’s di/dt. An estimate of the di/dt can be made
(BO)
from the surge generator voltage rate of rise, dv/dt, and the circuit resistance.
As an example, the ITU-T recommendation K.21 1.5 kV, 10/700 surge has an average dv/dt of 150 V/µs, but,
as the rise is exponential, the initial dv/dt is three times higher, being 450 V/µs. The instantaneous generator
output resistance is 25 Ω. If the equipment has an additional series resistance of 20 Ω, the total series
resistance becomes 45 Ω. The maximum di/dt then can be estimated as 450/45 = 10 A/µs. In practice the
measured di/dt and protection voltage increase will be lower due to inductive effects and the finite slope
®
resistance of the TISP breakdown region.
capacitance
off-state capacitance
The off-state capacitance of a TISP is sensitive to junction temperature, T , and the bias voltage,
®
J
comprising of the dc voltage, V , and the ac voltage, V . All the capacitance values in this data sheet are
D
d
measured with an ac voltage of 1 V rms. When V >> V the capacitance value is independent on the value
D
d
of V . Up to 10 MHz the capacitance is essentially independent of frequency. Above 10 MHz the effective
d
capacitance is strongly dependent on connection inductance. For example, a printed wiring (PW) trace of
10 cm could create a circuit resonance with the device capacitance in the region of 80 MHz.
P R O D U C T
I N F O R M A T I O N
18
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
longitudinal balance
®
Figure 35 shows a three terminal TISP with its equivalent “delta” capacitance. Each capacitance, C
, C
RG
TG
and C , is the true terminal pair capacitance measured with a three terminal or guarded capacitance bridge.
TR
If wire R is biased at a larger potential than wire T then C > C . Capacitance C is equivalent to a
TG
RG
TG
capacitance of C
in parallel with the capacitive difference of (C - C ). The line capacitive unbalance is
RG
TG RG
due to (C - C ) and the capacitance shunting the line is C + C /2 .
TG
RG
TR
RG
Figure 35.
All capacitance measurements in this data sheet are three terminal guarded to allow the designer to
accurately assess capacitive unbalance effects. Simple two terminal capacitance meters (unguarded third
terminal) give false readings as the shunt capacitance via the third terminal is included.
P R O D U C T
I N F O R M A T I O N
19
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
typical circuits
TIP
WIRE
F1a
R1a
Th3
Th1
GDTa
GDTb
PROTECTED
EQUIPMENT
Th2
F1b
R1b
AI7XBP
RING
WIRE
TISP7xxxF3
Figure 36. PROTECTION MODULE
R1a
Th3
SIGNAL
Th1
Th2
R1b
AI7XBM
TISP7150F3
D.C.
Figure 37. ISDN PROTECTION
OVER-
CURRENT
PROTECTION
SLIC
PROTECTION
RING/TEST
PROTECTION
TEST
RELAY
RING
RELAY
SLIC
RELAY
TIP
WIRE
S3a
R1a
Th4
Th3
S1a
S2a
COORDIN-
ATION
RESISTANCE
Th1
Th2
SLIC
Th5
R1b
RING
WIRE
S3b
TISP7xxxF3
TISP6xxxx,
TISPPBLx,
½TISP6NTP2
S1b
S2b
VBAT
C1
220 nF
TEST
EQUIP-
MENT
RING
GENERATOR
AI7XBN
Figure 38. LINE CARD RING/TEST PROTECTION
P R O D U C T
I N F O R M A T I O N
20
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
MECHANICAL DATA
D008
plastic small-outline package
This small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
D008
8-pin Small Outline Microelectronic Standard
Package MS-012, JEDEC Publication 95
5,00 (0.197)
4,80 (0.189)
8
7
6
5
6,20 (0.244)
5,80 (0.228)
INDEX
4,00 (0.157)
3,81 (0.150)
1
3
2
4
7° NOM
3 Places
1,75 (0.069)
1,35 (0.053)
5,21 (0.205)
4,60 (0.181)
0,50 (0.020)
0,25 (0.010)
x 45°NOM
0,203 (0.008)
0,102 (0.004)
7° NOM
4 Places
0,51 (0.020)
0,36 (0.014)
8 Places
4° ± 4°
0,79 (0.031)
0,28 (0.011)
Pin Spacing
1,27 (0.050)
(see Note A)
6 Places
0,229 (0.0090)
0,190 (0.0075)
1,12 (0.044)
0,51 (0.020)
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
MDXXAAC
NOTES: A. Leads are within 0,25 (0.010) radius of true position at maximum material condition.
B. Body dimensions do not include mold flash or protrusion.
C. Mold flash or protrusion shall not exceed 0,15 (0.006).
D. Lead tips to be planar within ±0,051 (0.002).
P R O D U C T
I N F O R M A T I O N
21
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
MECHANICAL DATA
D008
tape dimensions
D008 Package (8-pin Small Outline) Single-Sprocket Tape
4,10
3,90
1,60
1,50
8,10
7,90
2,05
0,40
1,95
0,8 MIN.
5,60
5,40
12,30
11,70
Cover
Tape
6,50
6,30
0 MIN.
ø 1,5 MIN.
Carrier Tape
Embossment
2,2
2,0
Direction of Feed
ALL LINEAR DIMENSIONS IN MILLIMETERS
NOTES: A. Taped devices are supplied on a reel of the following dimensions:-
MDXXATB
Reel diameter:
Reel hub diameter:
Reel axial hole:
330 +0,0/-4,0 mm
100 ±2,0 mm
13,0 ±0,2 mm
B. 2500 devices are on a reel.
P R O D U C T
I N F O R M A T I O N
22
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
MECHANICAL DATA
P008
plastic dual-in-line package
This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions The package is intended for
insertion in mounting-hole rows on 7,62 (0.300) centres. Once the leads are compressed and inserted,
sufficient tension is provided to secure the package in the board during soldering. Leads require no additional
cleaning or processing when used in soldered assembly.
P008
9,75 (0.384)
9,25 (0.364)
8
7
6
5
Index
Notch
6,60 (0.260)
6,10 (0.240)
1
2
3
4
8,23 (0.324)
7,62 (0.300)
1,78 (0.070) MAX
4 Places
5,08 (0.200)
MAX
Seating
Plane
3,17 (0.125)
MIN
0,36 (0.014)
0,20 (0.008)
0,51 (0.020)
MIN
0,53 (0.021)
0,38 (0.015)
8 Places
9,40 (0.370)
8,38 (0.330)
2,54 (0.100) Typical
(see Note A)
6 Places
ALL LINEAR DIMENSIONS IN MILLIMETERS AND PARANTHETICALLY IN INCHES
MDXXCF
NOTES: A. Each pin centreline is located within 0,25 (0.010) of its true longitudinal position.
B. Dimensions fall within JEDEC MS001 - R-PDIP-T, 0.300" Dual-In-Line Plastic Family.
C. Details of the previous dot index P008 package style, drawing reference MDXXABA, are given in the earlier publications.
P R O D U C T
I N F O R M A T I O N
23
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
MECHANICAL DATA
SL003
3-pin plastic single-in-line package
This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
SL003
9,75 (0.384)
9,25 (0.364)
3,40 (0.134)
3,20 (0.126)
Index
Notch
6,60 (0.260)
6,10 (0.240)
8,31 (0.327)
MAX
12,9 (0.492)
MAX
4,267 (0.168)
MIN
2
1
3
2,54 (0.100) Typical
(see Note A)
2 Places
0,356 (0.014)
0,203 (0.008)
1,854 (0.073)
MAX
0,711 (0.028)
0,559 (0.022)
3 Places
ALL LINEAR DIMENSIONS IN MILLIMETERS AND PARANTHETICALLY IN INCHES
MDXXCE
NOTES: A. Each pin centreline is located within 0,25 (0.010) of its true longitudinal position.
B. Body molding flash of up to 0,15 (0.006) may occur in the package lead plane.
C. Details of the previous dot index SL003 style, drawing reference MDXXAD, are given in the earlier publications.
P R O D U C T
I N F O R M A T I O N
24
TISP7125F3, TISP7150F3, TISP7180F3, TISP7240F3, TISP7260F3,
TISP7290F3, TISP7320F3, TISP7350F3, TISP7380F3
TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MARCH 1994 - REVISED MARCH 2000
IMPORTANT NOTICE
Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any semiconductor product
or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is
current.
PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with
PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI deems necessary to support this
warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government
requirements.
PI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents
or services described herein. Nor is any license, either express or implied, granted under any patent right, copyright, design
right, or other intellectual property right of PI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used.
PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORISED, OR WARRANTED TO BE SUITABLE
FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS.
Copyright © 2000, Power Innovations Limited
P R O D U C T
I N F O R M A T I O N
25
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