LP3985A-26D 概述
Regulator, 1 Output, CMOS, PDSO5, 其他稳压器
LP3985A-26D 规格参数
是否Rohs认证: | 不符合 | 生命周期: | Transferred |
包装说明: | TSOP, TSOP5/6,.11,37 | Reach Compliance Code: | unknown |
风险等级: | 5.67 | 可调性: | FIXED |
标称回动电压 1: | 0.165 V | 最大绝对输入电压: | 6.5 V |
JESD-30 代码: | R-PDSO-G5 | JESD-609代码: | e0 |
最大电网调整率: | 0.0123% | 最大负载调整率: | 0.078% |
输出次数: | 1 | 端子数量: | 5 |
工作温度TJ-Max: | 140 °C | 工作温度TJ-Min: | -55 °C |
最大输出电流 1: | 0.15 A | 标称输出电压 1: | 2.6 V |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | TSOP |
封装等效代码: | TSOP5/6,.11,37 | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE, THIN PROFILE | 包装方法: | TAPE AND REEL |
认证状态: | Not Qualified | 子类别: | Other Regulators |
表面贴装: | YES | 技术: | CMOS |
端子面层: | Tin/Lead (Sn/Pb) | 端子形式: | GULL WING |
端子节距: | 0.95 mm | 端子位置: | DUAL |
最大电压容差: | 3% | Base Number Matches: | 1 |
LP3985A-26D 数据手册
通过下载LP3985A-26D数据手册来全面了解它。这个PDF文档包含了所有必要的细节,如产品概述、功能特性、引脚定义、引脚排列图等信息。
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LP3985A-XX
Very low noise, very low dropout, 150 mA
linear regulator, CMOS process technology
Product data
2003 Aug 19
Philips
Semiconductors
Philips Semiconductors
Product data
Very low noise, very low dropout, 150 mA
linear regulator, CMOS process technology
LP3985A-XX
GENERAL DESCRIPTION
The LP3985A-XX family are very low-noise, very low-dropout, low
quiescent-current linear regulators designed for battery-powered
applications, although they can also be used for devices powered by
AC-DC converters. The device is available in a preset output voltage
of 2.6 V. Typical dropout voltages are only 165 mV at 150 mA and
41 mV at 50 mA. Reverse battery current is extremely low, 0.5 µA
typical.
For demanding applications, output noise voltage of typically
30 µV
is achieved with a 0.01 µF capacitor on the BYPASS pin.
rms
The input voltage can vary from 2.5 to 6.5 V , providing up to
dc
WL-CSP5 (bottom view)
SO5 (SOT23-5)
150 mA output current.
An internal P-channel FET pass transistor maintains an 85 µA
typical supply current, independent of the load current and dropout
voltage. Other features include a 0.01 µA logic-controlled shutdown,
short circuit and thermal shutdown protection, and reverse battery
protection. The LP3985A also includes an auto-discharge function
which actively discharges the output voltage to ground when the
device is placed in shutdown.
To accommodate high density layouts, it is packaged in wafer-level
chip-scale (WL-CSP), as well as SO5 (SOT23-5) packages.
FEATURES
APPLICATIONS
• Low output noise: 30 µV
• Cordless, PCS, and cellular telephones
rms
• Low dropout voltages: 165 mV at 150 mA, 41 mV at 50 mA
• Thermal overload and short circuit protection
• Reverse battery protection
• PCMCIA cards and modems
• Handheld and portable instruments
• Palmtop computers and electronic planners
• Output current limit
• 85 µA no load supply current
• 100 µA typical operating supply current at I
= 150 mA
OUT
• Preset output voltage of 2.6 V; other voltages upon request in
100 mV increments
SIMPLIFIED DEVICE DIAGRAM
V
BYPASS
A3
IN
C3
C1
C
bypass
(optional)
DC
C
1 µF
IN
B2
2.5 V to 6.5 V
V
OUT
A1
GND
SHDN
ON
OFF
R
Preset output voltage: 2.6 V
load
C
OUT
1 µF
Top view (Wafer-level CSP pin assignments using JEDEC standard matrix)
SL01955
Figure 1. Simplified device diagram.
2
2003 Aug 19
Philips Semiconductors
Product data
Very low noise, very low dropout, 150 mA
linear regulator, CMOS process technology
LP3985A-XX
ORDERING INFORMATION
PACKAGE
TEMPERATURE
RANGE
TYPE NUMBER
NAME
DESCRIPTION
LP3985A-XXUK
LP3985A-XXD
WL-CSP5
wafer-level, chip-scale 5 bump package, surface mount
–40 to +85 °C
–40 to +85 °C
SO5
(SOT23-5)
plastic small outline package; 5 leads; body width 1.6 mm
NOTE:
The device has one voltage output option, indicated by the XX on
the Type Number.
XX
VOLTAGE (Typical)
LP3985A-26
2.6 V
PIN CONFIGURATION
PIN DESCRIPTION
BALL NO. SYMBOL
DESCRIPTION
LP3985A-XX
A1
SHDN
Active-LOW shutdown input.
This pin must be actively terminated.
Tie to V if this function is not used.
BYPASS
SHDN
A3
A1
C3
V
V
IN
IN
A3
BYPASS Noise bypass pin.
Low noise of typically 30 µV
B2
with
rms
optional 0.01 µF bypass capacitor.
Larger bypass capacitor further
reduces noise.
GND
C1
OUT
B2
GND
Ground.
SL01956
The bump may also serve as heat
spreader by soldering it to a large PCB
pad or circuit board ground plane to
maximize power dissipation.
Figure 2. Pin configuration.
C1
C3
V
V
Regulator output.
Sources up to 150 mA. Minimum output
capacitor is 1 µF.
OUT
Regulator input.
IN
Supply voltage ranges from 2.5 V to
6.5 V. Bypass with a 1 µF capacitor to
GND.
MAXIMUM RATINGS
SYMBOL
PARAMETER
MIN.
2.5
MAX.
+6.5
UNIT
V
V
V
V
Input voltage
V
dc
V
dc
V
dc
V
dc
IN
SHDN
SHDN to GND voltage
–0.3
–0.3
–0.3
–65
–55
–40
–
+6.5
-V
SHDN to V voltage
+0.3
SHDN IN
IN
, V
V
OUT
and BYPASS to GND voltage
VIN + 0.3
+150
+140
+85
OUT BYPASS
T
stg
Storage temperature range
Junction temperature range
Ambient temperature range
°C
°C
T
j
T
°C
amb
PD
Power dissipation (T
= 25 °C)
637
mW
amb
Derating factor above 25 °C = 5.1 mW/°C
NOTE:
1. Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond
those indicated may adversely affect device reliability. Functional operation under absolute maximum-rated condition is not implied.
3
2003 Aug 19
Philips Semiconductors
Product data
Very low noise, very low dropout, 150 mA
linear regulator, CMOS process technology
LP3985A-XX
ELECTRICAL CHARACTERISTICS
V
= V
+ 0.5 V, –40 °C ≤ T
≤ +85 °C, unless otherwise specified. Typical values are at T
= +25 °C (see Note 1).
IN
OUT(nom)
amb
amb
SYMBOL
PARAMETER
Input voltage
CONDITIONS
MIN.
2.5
TYP.
MAX.
6.5
UNIT
V
V
IN
–
–
–
I
I
= 1 mA; T
= +25 °C; V
≥ 2.5 V
–1.4
–3.0
1.4
%
Output voltage accuracy
OUT
amb
OUT
= 1 mA to 150 mA; –40 °C ≤ T
≤ +85 °C;
2.0
%
OUT
V
amb
≥ 2.5 V
OUT
I
I
= 1 mA, T
= +25 °C, V < 2.5 V
OUT
–3.0
–3.5
–
–
3.0
3.5
%
%
OUT
amb
= 1 mA to 150mA; –40°C ≤ T
≤ +85°C;
OUT
V
amb
< 2.5V
OUT
I
I
I
Maximum output current
Current limit
150
–
390
85
–
–
mA
mA
µA
OUT(max)
160
LIM
Q
I
= 0 mA
–
180
–
GND pin current
OUT
I
= 150 mA
100
0.5
0
µA
–
OUT
I
Reverse battery current
Line regulation
µA
–
–
RBC
∆V
∆V
2.5 V or (V
+ 0.1 V) ≤ VIN ≤ 6.5 V; I
= 1 mA
–0.125
+0.125
0.02
%/V
%/mA
mV
mV
mV
lnr
OUT
OUT
Load regulation
0.1 mA ≤ I
; C
= 1.0 µF
0.01
1.0
41
–
–
–
–
–
–
ldr
OUT OUT
I
I
I
= 1 mA
Dropout voltage (Note 2)
–
OUT
OUT
OUT
= 50 mA
90
= 150 mA
165
28
–
–
–
C
C
= 10 µF
µV
RMS
V
Output voltage noise
f = 10 Hz to 100 kHz
= 0.01 µF
OUT
OUT
N
C
BYPASS
= 100 µF
20
µV
RMS
Shutdown
–
V
1.4
–
V
SHDN input threshold
2.5V ≤ VIN ≤ 6.5 V
–
–
IH
V
IL
0.4
100
V
T
= +25 °C
= +85 °C
=+25 °C
= +85 °C
= +25 °C
0.01
0.5
0.01
0.2
30
µA
µA
µA
µA
µs
µs
Ω
I
SHDN input bias current
SHDN supply current
VSHDN = VIN
–
amb
SHDN
T
amb
–
–
T
amb
1
I
V
OUT
= 0 V
–
Q(SHDN)
T
amb
–
–
T
amb
150
300
–
t
Shutdown exit delay (Note 3)
Resistance shutdown discharge
C
C
= 0.01 µF
OUT
–
SHDN-Delay
BP
= 1.0 µF; no load
–45 °C ≤ T
≤ +85 °C
–
–
amb
R
300
–
SD
Thermal protection
T
Thermal shutdown junction
140
15
°C
°C
–
–
–
–
SHDN
temperature
∆T
Thermal shutdown hysteresis
SHDN
NOTES:
1. Limits are 100% production tested at T
= +25 °C. Limits over the operating temperature range are guaranteed through correlation using
amb
Statistical Quality Control (SQC) methods.
2. The dropout voltage is defined as V – V
, when V
is 100 mV below the value of V
for V = V
+ 0.5 V.
OUT
IN
OUT
OUT
OUT
IN
(Only applicable for V
= +2.5 V to +4.5 V.)
OUT
3. Time needed for V
to reach 95% of final value.
OUT
4
2003 Aug 19
Philips Semiconductors
Product data
Very low noise, very low dropout, 150 mA
linear regulator, CMOS process technology
LP3985A-XX
TYPICAL PERFORMANCE CURVES
LP3985A with conditions:
Typical values are at T
V
= V
+ 0.5 V; T
= –40 °C to +85 °C; C = 1 µF; C
= 1 µF; unless otherwise noted.
IN
OUT(nom)
amb
IN
OUT
= +25 °C.
amb
3.32
3.30
3.28
3.26
3.24
3.22
3.20
140
135
130
125
120
115
0
20
40
60
80
100
120
140
160
0
20
40
60
80
100
120
140
160
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
SL01711
SL01712
Figure 3. Output voltage versus output current.
Figure 4. GND pin current versus output current.
160
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
140
120
100
80
60
40
20
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
SL01713
SL01714
Figure 5. GND pin current (no load) versus input voltage.
Figure 6. Output voltage (I
= 50 mA) versus input voltage.
OUT
160
140
120
100
80
140
120
100
80
60
60
40
40
20
20
0
–20
0
0
1
2
3
4
5
6
0
20
40
60
80
100
120
140
160
INPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
SL01719
SL01717
Figure 7. GND pin current (50 mA) versus input voltage.
Figure 8. Dropout voltage versus output current.
5
2003 Aug 19
Philips Semiconductors
Product data
Very low noise, very low dropout, 150 mA
linear regulator, CMOS process technology
LP3985A-XX
TYPICAL PERFORMANCE CURVES (continued)
140
135
130
125
120
115
110
3.32
3.31
3.30
3.29
3.28
3.27
3.26
3.25
–40
–20
0
20
40
60
80
100
–40
–20
0
20
40
60
80
100
TEMPERATURE (°C)
TEMPERATURE (°C)
SL01715
SL01716
Figure 9. Output voltage (50 mA load) versus temperature.
Figure 10. GND pin current (50 mA load) versus temperature.
160
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
+85 °C
140
+25 °C
120
100
80
60
–40 °C
40
20
0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0
20
40
60
80
100
120
140
160
INPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
SL01718
SL01720
Figure 11. Output voltage (no load) versus input voltage.
Figure 12. Dropout voltage versus output current.
6
2003 Aug 19
Philips Semiconductors
Product data
Very low noise, very low dropout, 150 mA
linear regulator, CMOS process technology
LP3985A-XX
TYPICAL PERFORMANCE CURVES (continued)
10.000
100.0
10.0
1.0
1.000
C
= 10 µF
OUT
C
= 10 µF
LOAD
0.100
0.010
0.001
0.000
C
= 1 µF
OUT
STABLE REGION
0.1
C
= 1 µF
LOAD
0.0
0.1
1
10
FREQUENCY (Hz)
100
1000
0
50
100
150
LOAD CURRENT (mA)
SL01958
SL01734
Figure 14. Region of stable C
ESR versus load current.
Figure 13. Output noise spectral density versus frequency.
OUT
45
40
35
30
25
20
15
10
5
80
70
60
C
10 µF
L
50
40
30
20
10
0
C
1 µF
L
0
1
10
BYPASS CAPACITANCE (nF)
100
0.01
1
100
10000
1000000
FREQUENCY (Hz)
SL01957
SL01959
Figure 15. Power supply rejection ratio versus frequency.
Figure 16. Output noise versus BP capacitance
25.5
25.4
25.4
25.3
25.3
25.2
1
10
100
1000
OUTPUT CURRENT (mA)
SL01730
Figure 17. Output noise versus output current.
7
2003 Aug 19
Philips Semiconductors
Product data
Very low noise, very low dropout, 150 mA
linear regulator, CMOS process technology
LP3985A-XX
TYPICAL PERFORMANCE CURVES (continued)
I
V
= 0–50 mA
C
C
= 1.0 µF
I
V
= 0–50 mA
C
C
= 1.0 µF
= 1.0 µF
OUT
L
IN
L
IN
= V
OUT
+ 0.5 V
= 1.0 µF
= V
OUT
+ 0.5 V
IN
OUT
IN
SL01721
SL01722
Figure 18. Load transient response
(with power supply source).
Figure 19. Load transient response
(with AA battery source).
C
C
= 1.0 µF
V
= NEAR DROPOUT CONDITION
= 0–50 mA
I = 50 mA
L
IN
IN
= 1.0 µF
I
L
C
= 0.01 µF
bypass
OUT
SL01723
SL01960
Figure 20. Load transient response.
Figure 21. Shutdown exit delay.
I
L
= 0 mA
C
= 0.01 µF
bypass
SL01961
Figure 22. Entering shutdown (no load).
8
2003 Aug 19
Philips Semiconductors
Product data
Very low noise, very low dropout, 150 mA
linear regulator, CMOS process technology
LP3985A-XX
TECHNICAL DISCUSSION
The LP3985A-XX family are very low-noise, very low-dropout, low
quiescent current linear regulators designed for battery-powered
applications, although they can also be used for devices powered by
AC-DC converters.
The GND pin provides an electrical connection to ground and a path
for heat transfer away from the junction. Connect the GND pin to
ground using a large pad or ground plane to maximize heat transfer.
Noise reduction
The voltage regulation components of the LP3985A consist of a
1.23 V reference, an error amplifier, a P-channel pass transistor, and
an internal feed-back voltage divider. The device also contains a
reverse battery protection circuit, a thermal sensor, a current limiter,
An optional external 0.01 µF bypass capacitor at BYPASS, in
conjunction with an internal 200 Ω resistor, creates an 80 Hz
low-pass filter for noise reduction. The LP3985A produces
30 µV
of output voltage noise with C
= 0.01 µF and
bypass
RMS
and shutdown logic.
C
= 10 µF. This is negligible in most applications.
OUT
Voltage regulation
Start-up time is minimized by a power-on circuit that pre-charges the
bypass capacitor. The ‘Typical Performance Curves’ section shows
graphs of ‘Output noise versus BP capacitance’ (Figure 16), ‘Output
noise versus output current’ (Figure 17), and ‘Output noise spectral
density versus frequency’ (Figure 13).
The 1.23 V band-gap reference is connected to the error amplifier’s
inverting input. The error amplifier compares this reference with the
feedback voltage and amplifies the difference. If the feedback
voltage is lower than the reference voltage, the pass-transistor gate
is pulled lower, which allows more current to pass to the output and
increases the output voltage. If the feedback voltage is too high, the
pass-transistor gate is pulled up, allowing less current to pass to the
output. The output voltage is fed back through an internal resistor
Device protection
The LP3985A has several built-in protection circuits.
Current limiter: The current limiter controls the the pass transistor’s
gate voltage so the output current cannot exceed 390 mA. We
recommend using 160 mA minimum to 500 mA maximum in the
design parameters. Because of the current limiter, the output can be
shorted to ground for an indefinite amount of time with no damage to
the part.
voltage divider connected to the V
pin.
OUT
The LP3985A uses a 1.0 Ω typical P-channel MOSFET pass
transistor. The P-channel MOSFET requires no base drive, therefore
the device has lower quiescent current than a comparable PNP
transistor-based design. The LP3985A-XX uses 100 µA of quiescent
current under any load conditions.
Reverse battery protection: The reverse battery protection circuit
prevents damage to the device if the supply battery is accidentally
An optional external bypass capacitor connected between the
BYPASS pin and ground reduces noise at the output.
installed backwards. This circuit compares V and V
to ground
SHDN
IN
and disconnects the device’s internal circuits if it detects reversed
polarity. Reverse supply current is limited to 1 mA when this
protective circuit is active, preventing the battery from rapidly
discharging through the device.
Power dissipation
The LP3985A’s maximum power dissipation depends on the thermal
resistance of the case and circuit board, the temperature difference
between the die junction and ambient air, and the rate of air flow.
Thermal overload protection: When the junction temperature
exceeds +140 °C, the thermal sensor signals the shutdown logic to
turn off the pass transistor. After the junction temperature has cooled
by 15 °C the sensor signals the shutdown logic to turn the pass
transistor on again. This will create a pulsed output during lengthy
thermal overloads.
The power dissipation across the device is P = I
The maximum power dissipation is:
(V – V
IN
).
OUT
OUT
P
MAX
= (T – T ) / (Θ + Θ
)
BA
j
amb
JB
where T – T
is the temperature difference between the LP3985A
j
amb
die junction and the surrounding air, Θ (or Θ ) is the thermal
JB
JC
resistance of the package, and Θ is the thermal resistance
through the printed circuit board, copper traces, and other materials
to the surrounding air.
NOTE: Thermal overload protection is to protect the device during
fault conditions. Do not exceed the maximum junction-temperature
BA
rating of T = +150 °C during continuous operation.
j
9
2003 Aug 19
Philips Semiconductors
Product data
Very low noise, very low dropout, 150 mA
linear regulator, CMOS process technology
LP3985A-XX
APPLICATION INFORMATION
Capacitor selection and regulator stability
Normally, use a 1 µF capacitor on the LP3985A input and a 1 µF to
10 µF capacitor on the output. To improve the supply-noise rejection
and line-transient response, use input capacitor values and lower
ESRs. To reduce noise and improve load-transient response,
stability, and power-supply rejection, use use large output
capacitors.
Load-transient considerations
The LP3985A load-transient response graphs (Figures 18, 19, and
20) show two components of the output response: a DC shift from
the output impedance due to the load current change, and the
transient response. Typical transient for a step change in the load
current from 0 mA to 50 mA is 40 mV. Increasing the output
capacitor’s value and decreasing the ESR attenuates the overshoot.
For stable operation over the full temperature range and with load
currents up to 150 mA, a 1 µF (min.) ceramic capacitor is
recommended.
PSRR and operation from sources other than
batteries
The LP3985A is designed to deliver low dropout voltages and low
quiescent currents in battery-powered systems. When operating
from sources other than batteries, improved supply-noise rejection
and transient response can be achieved by increasing the values of
the input and output bypass capacitors, and through passive filtering
techniques.
Note that some ceramic dielectrics exhibit large capacitance and
ESR variation with temperature. With dielectrics such as Z5U and
Y5V, it may be necessary to increase the capacitance by a factor
of 2 or more to ensure stability at temperatures below –10 °C. With
X7R or X5R dielectrics, 1 µF should be sufficient at all operating
temperatures for V
= 2.5 V.
OUT
Power-supply rejection is 73 dB at low frequencies and rolls off
above 10 kHz. See Figure 15, ‘Power supply rejection ratio versus
frequency’.
A graph of the Region of Stable C
ESR versus Load Current is
OUT
shown in Figure 14. Use a 0.01 µF bypass capacitor at BYPASS for
low output voltage noise. Increasing the capacitance will slightly
decrease the output noise, but increase the start-up time. Values
above 0.1 µF provide no performance advantage and are not
recommended (see Figures 21 and 22 in the ‘Typical Performance
Curves’ section).
For output voltage greater than the minimum input voltage (2.5 V),
the regulator’s minimum input-output voltage differential (or dropout
voltage) determines the lowest usable supply voltage. In
battery-powered systems, this will determine the useful end-of-life
battery voltage. Because the LP3985A uses a P-channel MOSFET
pass transistor, the dropout voltage is a function of drain-to-source
on-resistance (R ) multiplied by the load current (see ‘Typical
DS(ON)
Performance Curves’).
10
2003 Aug 19
Philips Semiconductors
Product data
Very low noise, very low dropout, 150 mA
linear regulator, CMOS process technology
LP3985A-XX
PACKING METHOD
The LP3985A-XX is packed in reels, as shown in Figure 23.
TAPE
REEL ASSEMBLY
GUARD BAND
BARCODE LABEL
ESD EMBOSSED
PRINTED PLANO BOX
PRINTED ESD WARNING
SPACE FOR ADDITIONAL LABEL
BARCODE LABEL
PRE-PRINTED HYATT PATENT
PRINTED PLANO BOX
QA SEAL
SL02060
Figure 23. Tape and reel packing method.
11
2003 Aug 19
Philips Semiconductors
Product data
Very low noise, very low dropout, 150 mA
linear regulator, CMOS process technology
LP3985A-XX
LOADED TAPE DIRECTION OF FEED
NOTES:
All dimensions in millimeters.
10 sprocket hole pitch cumulative tolerance ±0.20
Material: conductive polystyrene
Camber not to exceed 1.0 mm in 100 mm.
Cover tape shown for illustrative purposes only.
P
+0.1
+0.0
4.00
2.00 ±0.01
1.5
1.75
X
X
3.50 ±0.01
W
Ao
CENTER LINES OF CAVITY
BOTTOM
COVER
TAPE
TOP COVER TAPE
T
DIMENSIONS (mm are the original dimensions)
UNIT
Ao
Bo
T
T1
P
W
TOP COVER TAPE
1.09
0.99
1.598
1.498
0.76
0.74
0.10
(max.)
4.05
3.95
8.3
7.9
Bo
mm
Heat seal cover tape for carrier tape width 8 mm
BOTTOM
COVER
TAPE
Type tape:
clear static dissipative tape
transparent polyester
Base material:
T1
Cover tape width: 5.3 ± 0.1 mm
Cover tape length: 480 m/reel
T1
SECTION ‘X – X’
Supplier:
Advanced Integrated Materials (AIM)
CT5–00530–0480
Part Number:
SL02056
Figure 24. Tape dimensions.
12
2003 Aug 19
Philips Semiconductors
Product data
Very low noise, very low dropout, 150 mA
linear regulator, CMOS process technology
LP3985A-XX
WL-CSP5: wafer level, chip-scale package; 5 bumps
X3
X2
X4
X5
X1
X6
X7
BUMP
DIMENSIONS (mm are the original dimensions)
UNIT
X1
X2
X3
X4
X5
X6
X7
1.30
1.24
0.87
0.81
0.195
0.165
0.467
0.447
0.145
0.115
mm
0.5
0.5
SL02055
13
2003 Aug 19
Philips Semiconductors
Product data
Very low noise, very low dropout, 150 mA
linear regulator, CMOS process technology
LP3985A-XX
SOT23-5: plastic small outline package; 5 leads; body width 1.5 mm
0.15
0.05
1.2
1.0
0.55
0.41
0.22
0.08
3.00
2.70
1.70
1.50
0.55
0.35
0.25
1.35
14
2003 Aug 19
Philips Semiconductors
Product data
Very low noise, very low dropout, 150 mA
linear regulator, CMOS process technology
LP3985A-XX
REVISION HISTORY
Rev
Date
Description
_1
20030819
Product data (9397 750 11086); ECN 853-2413 29467 of 05 February 2003.
Data sheet status
Product
status
Definitions
[1]
Level
Data sheet status
[2] [3]
I
Objective data
Development
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
Production
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL
http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limitingvaluesdefinition— Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given
in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no
representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be
expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree
to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described
or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated
viaaCustomerProduct/ProcessChangeNotification(CPCN).PhilipsSemiconductorsassumesnoresponsibilityorliabilityfortheuseofanyoftheseproducts,conveys
nolicenseortitleunderanypatent, copyright, ormaskworkrighttotheseproducts, andmakesnorepresentationsorwarrantiesthattheseproductsarefreefrompatent,
copyright, or mask work right infringement, unless otherwise specified.
Koninklijke Philips Electronics N.V. 2003
Contact information
All rights reserved. Printed in U.S.A.
For additional information please visit
http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
Date of release: 08-03
9397 750 11086
For sales offices addresses send e-mail to:
sales.addresses@www.semiconductors.philips.com.
Document order number:
Philips
Semiconductors
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