LP3985IBL-2.7/NOPB [TI]
2.7 V FIXED POSITIVE LDO REGULATOR, 0.1 V DROPOUT, PBGA5;
| 型号： | LP3985IBL-2.7/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 2.7 V FIXED POSITIVE LDO REGULATOR, 0.1 V DROPOUT, PBGA5 |
| 文件： | 总18页 (文件大小：1023K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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August 2005
LP3985
Micropower, 150mA Low-Noise Ultra Low-Dropout CMOS
Voltage Regulator
2.6V, 2.7V, 2.8V, 2.85V, 2.9V, 3.0V. 3.1V, 3.2V, 3.3V, 4.7V,
General Description
4.75V, 4.8V and 5.0V output voltages. For other output volt-
The LP3985 is designed for portable and wireless applica-
age options between 2.5V to 5.0V or for a dual LP3985,
tions with demanding performance and space requirements.
please contact National Semiconductor sales office.
The LP3985 is stable with a small 1µF 30% ceramic or
high-quality tantalum output capacitor. The micro SMD re-
quires the smallest possible PC board area - the total appli-
cation circuit area can be less than 2.0mm x 2.5mm, a
fraction of a 1206 case size.
Key Specifications
n 2.5 to 6.0V input range
n 150mA guaranteed output
@
n 50dB PSRR at 1kHz VIN = VOUT + 0.2V
The LP3985’s performance is optimized for battery powered
systems to deliver ultra low noise, extremely low dropout
voltage and low quiescent current. Regulator ground current
increases only slightly in dropout, further prolonging the
battery life.
n ≤1.5µA quiescent current when shut down
n Fast Turn-On time: 200 µs (typ.)
n 100mV maximum dropout with 150mA load
n 30µVrms output noise (typ) over 10Hz to 100kHz
n −40 to +125˚C junction temperature range for operation
n 2.5V, 2.6V, 2.7V, 2.8V, 2.85V, 2.9V, 3.0V, 3.1V, 3.2V,
3.3V, 4.7V, 4.75V, 4.8V and 5.0V outputs standard
An optional external bypass capacitor reduces the output
noise without slowing down the load transient response.
Fast start-up time is achieved by utilizing an internal
power-on circuit that actively pre-charges the bypass capaci-
tor.
Features
Power supply rejection is better than 50 dB at low frequen-
cies and starts to roll off at 1kHz. High power supply rejection
is maintained down to low input voltage levels common to
battery operated circuits.
n Miniature 5-I/O micro SMD and SOT-23-5 package
n Logic controlled enable
n Stable with ceramic and high quality tantalum capacitors
n Fast turn-on
n Thermal shutdown and short-circuit current limit
The device is ideal for mobile phone and similar battery
powered wireless applications. It provides up to 150 mA,
from a 2.5V to 6V input. The LP3985 consumes less than
1.5µA in disable mode and has fast turn-on time less than
200µs.
Applications
n CDMA cellular handsets
n Wideband CDMA cellular handsets
n GSM cellular handsets
The LP3985 is available in a 5 bump small bump micro SMD,
a 5 bump large bump micro SMD, a 5 bump thin micro SMD
and a 5 pin SOT-23 package. Performance is specified for
−40˚C to +125˚C temperature range and is available in 2.5V,
n Portable information appliances
Typical Application Circuit
10136402
Note: Pin Numbers in parenthesis indicate micro SMD package.
* Optional Noise Reduction Capacitor.
© 2005 National Semiconductor Corporation
DS101364
www.national.com
Block Diagram
10136401
Pin Description
Name
* micro SMD
SOT
Function
Enable Input Logic, Enable High
Common Ground
VEN
GND
A1
B2
C1
C3
A3
3
2
5
1
4
VOUT
Output Voltage of the LDO
Input Voltage of the LDO
VIN
BYPASS
Optional Bypass Capacitor for Noise
Reduction
* The pin numbering scheme for the micro SMD package was revised in April 2002 to conform to JEDEC standard. Only the pin numbers were
revised. No changes to the physical location of the inputs/outputs were made. For reference purposes, the obsolete numbering scheme had VEN
as pin 1, GND as pin 2, VOUT as pin 3, VIN as pin 4, and BYPASS as pin 5.
Connection Diagrams
SOT 23-5 Package (MF)
5 Bump micro SMD Package (BPA05, BLA05, TLA05)
10136407
Top View
See NS Package Number MF05A
10136470
Top View
See NS Package Number BPA05, BLA05, TLA05
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2
Ordering Information
BP refers to 0.170mm bump size, 0.900mm height for micro SMD Package
Output
Voltage (V)
2.5
LP3985 Supplied as 250
Units, Tape and Reel
LP3985IBP-2.5
LP3985IBP-2.6
LP3985IBP-2.7
LP3985IBP-2.8
LP3985IBP-285
LP3985IBP-2.9
LP3985IBP-3.0
LP3985IBP-3.1
LP3985IBP-3.2
LP3985IBP-3.3
LP3985IBP-4.7
LP3985IBP-5.0
LP3985 Supplied as 3000
Units, Tape and Reel
LP3985IBPX-2.5
LP3985IBPX-2.6
LP3985IBPX-2.7
LP3985IBPX-2.8
LP3985IBPX-285
LP3985IBPX-2.9
LP3985IBPX-3.0
LP3985IBPX-3.1
LP3985IBPX-3.2
LP3985IBPX-3.3
LP3985IBPX-4.7
LP3985IBPX-5.0
Grade
STD
STD
STD
STD
STD
STD
STD
STD
STD
STD
STD
STD
2.6
2.7
2.8
2.85
2.9
3.0
3.1
3.2
3.3
4.7
5.0
BL refers to 0.300mm bump size, 0.995mm height for micro SMD Package
Output
Voltage (V)
2.5
LP3985 Supplied as 250
Units, Tape and Reel
LP3985IBL-2.5
LP3985IBL-2.6
LP3985IBL-2.7
LP3985IBL-2.8
LP3985IBL-285
LP3985IBL-2.9
LP3985IBL-3.0
LP3985IBL-3.1
LP3985IBL-3.2
LP3985IBL-3.3
LP3985IBL-4.8
LP3985IBL-5.0
LP3985 Supplied as 3000
Grade
Units, Tape and Reel
LP3985IBLX-2.5
LP3985IBLX-2.6
LP3985IBLX-2.7
LP3985IBLX-2.8
LP3985IBLX-285
LP3985IBLX-2.9
LP3985IBLX-3.0
LP3985IBLX-3.1
LP3985IBLX-3.2
LP3985IBLX-3.3
LP3985IBLX-4.8
LP3985IBLX-5.0
STD
STD
STD
STD
STD
STD
STD
STD
STD
STD
STD
STD
2.6
2.7
2.8
2.85
2.9
3.0
3.1
3.2
3.3
4.8
5.0
TL refers to 0.300mm bump size, 0.600mm height for micro SMD Package
Output
Voltage (V)
2.5
LP3985 Supplied as 250
Units, Tape and Reel
LP3985ITL-2.5
LP3985ITL-2.6
LP3985ITL-2.7
LP3985ITL-2.8
LP3985ITL-285
LP3985ITL-2.9
LP3985ITL-3.0
LP3985ITL-3.1
LP3985ITL-3.2
LP3985ITL-3.3
LP3985ITL-4.75
LP3985ITL-4.8
LP3985ITL-5.0
LP3985 Supplied as 3000
Grade
Units, Tape and Reel
LP3985ITLX-2.5
LP3985ITLX-2.6
LP3985ITLX-2.7
LP3985ITLX-2.8
LP3985ITLX-285
LP3985ITLX-2.9
LP3985ITLX-3.0
LP3985ITLX-3.1
LP3985ITLX-3.2
LP3985ITLX-3.3
LP3985ITLX-4.75
LP3985ITLX-4.8
LP3985ITLX-5.0
STD
STD
STD
STD
STD
STD
STD
STD
STD
STD
STD
STD
STD
2.6
2.7
2.8
2.85
2.9
3.0
3.1
3.2
3.3
4.75
4.8
5.0
3
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Ordering Information (Continued)
For SOT Package
LP3985 Supplied as 1000
Units, Tape and Reel
Output
Voltage (V)
2.5
LP3985 Supplied as 3000
Units, Tape and Reel
LP3985IM5X-2.5
LP3985IM5X-2.6
LP3985IM5X-2.7
LP3985IM5X-2.8
LP3985IM5X-285
LP3985IM5X-2.9
LP3985IM5X-3.0
LP3985IM5X-3.1
LP3985IM5X-3.2
LP3985IM5X-3.3
LP3985IM5X-4.7
LP3985IM5X-5.0
Grade
Package Marking
STD
STD
STD
STD
STD
STD
STD
STD
STD
STD
STD
STD
LP3985IM5-2.5
LP3985IM5-2.6
LP3985IM5-2.7
LP3985IM5-2.8
LP3985IM5-285
LP3985IM5-2.9
LP3985IM5-3.0
LP3985IM5-3.1
LP3985IM5-3.2
LP3985IM5-3.3
LP3985IM5-4.7
LP3985IM5-5.0
LCSB
LCTB
LCUB
LCJB
LCXB
LCYB
LCRB
LCZB
LDPB
LDQB
LDRB
LDSB
2.6
2.7
2.8
2.85
2.9
3.0
3.1
3.2
3.3
4.7
5.0
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4
Absolute Maximum Ratings (Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Operating Ratings (Notes 1, 2)
VIN
2.5 to 6V
VEN
0 to (VIN+0.3) ≤ 6V
Junction Temperature
Thermal Resistance
θJA (SOT23-5)
θJA (micro SMD)
Maximum Power Dissipation
SOT23-5 (Note 6)
micro SMD (Note 6)
−40˚C to +125˚C
VIN, VEN
−0.3 to 6.5V
-0.3 to (VIN+0.3) ≤ 6.5V
150˚C
VOUT
220˚C/W
255˚C/W
Junction Temperature
Storage Temperature
Lead Temp.
−65˚C to +150˚C
235˚C
250mW
244mW
Pad Temp. (Note 3)
Maximum Power Dissipation
SOT23-5 (Note 4)
micro SMD (Note 4)
ESD Rating(Note 5)
Human Body Model
Machine Model
235˚C
364mW
355mW
2kV
150V
Electrical Characteristics
Unless otherwise specified: VIN = VOUT(nom) + 0.5V, CIN = 1 µF, IOUT = 1mA, COUT = 1 µF, CBYPASS = 0.01µF. Typical values
and limits appearing in standard typeface are for TJ = 25˚C. Limits appearing in boldface type apply over the entire junction
temperature range for operation, −40˚C to +125˚C. (Note 7) (Note 8)
Limit
Symbol
Parameter
Output Voltage
Conditions
Typ
Units
Min
−2
Max
2
IOUT = 1mA
% of
Tolerance
−3
3
VOUT(nom)
Line Regulation Error
VIN = (VOUT(nom) + 0.5V) to 6.0V,
For 4.7 to 5.0 options
For all other options
IOUT = 1 mA to 150 mA
LP3985IM5 (SOT23-5)
LP3985 (micro SMD)
VIN = VOUT(nom) + 1V,
IOUT = 150 mA (Figure 1)
VIN = VOUT(nom) + 0.2V,
f = 1 kHz,
−0.19
−0.1
0.19
0.1
%/V
∆VOUT
Load Regulation Error
(Note 9)
0.0025
0.005
%/mA
mVP-P
0.0004
1.5
0.002
Output AC Line Regulation
50
40
IOUT = 50 mA (Figure 2)
VIN = VOUT(nom) + 0.2V,
f = 10 kHz,
PSRR
Power Supply Rejection Ratio
Quiescent Current
dB
IOUT = 50 mA (Figure 2)
VEN = 1.4V, IOUT = 0 mA
For 4.7 to 5.0 options
For all other options
VEN = 1.4V, IOUT = 0 to 150 mA
For 4.7 to 5.0 options
For all other options
VEN = 0.4V
IQ
100
85
165
150
µA
155
140
0.003
0.4
250
200
1.5
2
Dropout Voltage (Note 10)
IOUT = 1 mA
IOUT = 50 mA
20
35
mV
IOUT = 100 mA
45
70
IOUT = 150 mA
60
100
ISC
Short Circuit Current Limit
Peak Output Current
Output Grounded
600
mA
mA
(Steady State)
IOUT(PK)
VOUT ≥ VOUT(nom) - 5%
550
300
5
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Electrical Characteristics (Continued)
Unless otherwise specified: VIN = VOUT(nom) + 0.5V, CIN = 1 µF, IOUT = 1mA, COUT = 1 µF, CBYPASS = 0.01µF. Typical values
and limits appearing in standard typeface are for TJ = 25˚C. Limits appearing in boldface type apply over the entire junction
temperature range for operation, −40˚C to +125˚C. (Note 7) (Note 8)
Limit
Symbol
TON
Parameter
Turn-On Time
Conditions
CBYPASS = 0.01 µF
Typ
Units
Min
Max
200
µs
(Note 11)
en
Output Noise Voltage(Note 12)
BW = 10 Hz to 100 kHz,
COUT = 1µF
30
230
1
µVrms
Output Noise Density
CBP = 0
nV/
IEN
VIL
Maximum Input Current at EN
Maximum Low Level Input
Voltage at EN
VEN = 0.4 and VIN = 6.0
VIN = 2.5 to 6.0V
nA
V
0.4
VIH
Minimum High Level Input
Voltage at EN
VIN = 2.5 to 6.0V
1.4
V
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
160
20
˚C
˚C
TSD
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device
is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical
Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pin.
Note 3: Additional information on lead temperature and pad temperature can be found in National Semiconductor Application Note (AN-1112).
Note 4: The Absolute Maximum power dissipation depends on the ambient temperature and can be calculated using the formula: P = (T - T )/θ ,
JA
D
J
A
where T is the junction temperature, T is the ambient temperature, and θ is the junction-to-ambient thermal resistance. The 364mW rating for SOT23-5
JA
J
A
appearing under Absolute Maximum Ratings results from substituting the Absolute Maximum junction temperature, 150˚C, for T , 70˚C for T , and 220˚C/W for θ .
J
A
JA
More power can be dissipated safely at ambient temperatures below 70˚C . Less power can be dissipated safely at ambient temperatures above 70˚C. The Absolute
Maximum power dissipation can be increased by 4.5mW for each degree below 70˚C, and it must be derated by 4.5mW for each degree above 70˚C.
Note 5: The human body model is 100pF discharged through 1.5kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each
pin.
Note 6: Like the Absolute Maximum power dissipation, the maximum power dissipation for operation depends on the ambient temperature. The 250mW rating for
SOT23-5 appearing under Operating Ratings results from substituting the maximum junction temperature for operation, 125˚C, for T , 70˚C for T , and 220˚C/W for
J
A
θ
into (Note 4) above. More power can be dissipated at ambient temperatures below 70˚C . Less power can be dissipated at ambient temperatures above 70˚C.
JA
The maximum power dissipation for operation can be increased by 4.5mW for each degree below 70˚C, and it must be derated by 4.5mW for each degree above
70˚C.
Note 7: All limits are guaranteed. All electrical characteristics having room-temperature limits are tested during production with T = 25˚C or correlated using
J
Statistical Quality Control (SQC) methods. All hot and cold limits are guaranteed by correlating the electrical characteristics to process and temperature variations
and applying statistical process control.
Note 8: The target output voltage, which is labeled V
, is the desired voltage option.
OUT(nom)
Note 9: An increase in the load current results in a slight decrease in the output voltage and vice versa.
Note 10: Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal value. This specification does not apply
for input voltages below 2.5V.
Note 11: Turn-on time is time measured between the enable input just exceeding V and the output voltage just reaching 95% of its nominal value.
IH
Note 12: The output noise varies with output voltage option. The 30µVrms is measured with 2.5V voltage option. To calculate an approximated output noise for other
options, use the equation: (30µVrms)(X)/2.5, where X is the voltage option value.
Recommended Output Capacitor
Limit
Nominal
Value
Parameter
Output Capacitor
Conditions
Symbol
Min
0.7
5
Max
500
Units
µF
Capacitance(Note 13)
ESR
1.0
COUT
mΩ
Note 13: The minimum value of capacitance for stability and correct operation is 0.7µF. The Capacitor tolerance should be 30% or better over the temperature
range. The full range of operating conditions for the capacitor in the application should be considered during device selection to ensure this minimum capacitance
specification is met. The recommended capacitor type is X7R to meet the full device temperature spec of -40oC to 125oC. See the capacitor section in Application
Hints.
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6
10136408
FIGURE 1. Line Transient Input Test Signal
10136409
FIGURE 2. PSRR Input Test Signal
Typical Performance Characteristics Unless otherwise specified, CIN = COUT = 1 µF Ceramic,
CBYPASS = 0.01 µF, VIN = VOUT + 0.2V, TA = 25˚C, Enable pin is tied to VIN
.
Output Voltage Change vs Temperature
Dropout Voltage vs Load Current
10136433
10136441
@
Ground Current vs VIN 25˚C
Ground Current vs Load Current
10136440
10136435
7
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Typical Performance Characteristics Unless otherwise specified, CIN = COUT = 1 µF Ceramic,
CBYPASS = 0.01 µF, VIN = VOUT + 0.2V, TA = 25˚C, Enable pin is tied to VIN. (Continued)
@
@
Ground Current vs VIN 125˚C
Ground Current vs VIN −40˚C
10136437
10136439
Short Circuit Current (micro SMD)
Short Circuit Current (micro SMD)
10136445
10136446
Short Circuit Current (SOT)
Short Circuit Current (SOT)
10136447
10136448
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8
Typical Performance Characteristics Unless otherwise specified, CIN = COUT = 1 µF Ceramic,
CBYPASS = 0.01 µF, VIN = VOUT + 0.2V, TA = 25˚C, Enable pin is tied to VIN. (Continued)
Short Circuit Current (SOT)
Short Circuit Current (SOT)
10136450
10136449
Short Circuit Current (micro SMD)
Short Circuit Current (micro SMD)
10136452
10136451
Output Noise Spectral Density
Ripple Rejection (VIN = VOUT + 0.2V)
10136410
10136411
9
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Typical Performance Characteristics Unless otherwise specified, CIN = COUT = 1 µF Ceramic,
CBYPASS = 0.01 µF, VIN = VOUT + 0.2V, TA = 25˚C, Enable pin is tied to VIN. (Continued)
Ripple Rejection (VIN = VOUT + 1V)
Ripple Rejection (VIN = 5.0V)
10136412
10136413
Start Up Time (VIN = VOUT + 0.2V)
Start Up Time (VIN = 4.2V)
10136414
10136415
Start Up Time (VIN = VOUT + 0.2V)
Start Up Time (VIN = 4.2V)
10136417
10136416
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10
Typical Performance Characteristics Unless otherwise specified, CIN = COUT = 1 µF Ceramic,
CBYPASS = 0.01 µF, VIN = VOUT + 0.2V, TA = 25˚C, Enable pin is tied to VIN. (Continued)
Start Up Time (VIN = VOUT + 0.2V)
Start Up Time (VIN = 4.2V)
10136418
10136419
Line Transient Response
Line Transient Response
10136420
10136421
Load Transient Response (VIN = 3.2V)
Load Transient Response (VIN = 4.2V)
10136423
10136422
11
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Typical Performance Characteristics Unless otherwise specified, CIN = COUT = 1 µF Ceramic,
CBYPASS = 0.01 µF, VIN = VOUT + 0.2V, TA = 25˚C, Enable pin is tied to VIN. (Continued)
Load Transient Response (VIN = 3.2V)
Load Transient Response (VIN = 4.2V)
10136424
10136425
Enable Response (VIN = VOUT + 0.2V)
Enable Response (VIN = 4.2V)
10136453
10136454
Enable Response (VIN = VOUT + 0.2V)
Enable Response (VIN = 4.2V)
10136455
10136456
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Typical Performance Characteristics Unless otherwise specified, CIN = COUT = 1 µF Ceramic,
CBYPASS = 0.01 µF, VIN = VOUT + 0.2V, TA = 25˚C, Enable pin is tied to VIN. (Continued)
Output Impedance (VIN = 4.2V)
Output Impedance (VIN = VOUT + 0.2V)
10136465
10136466
may be used but have a narrower temperature range. With
these and other capacitor types (Y5V, Z6U) that may be
used, selection is dependant on the range of operating con-
ditions and temperature range for that application. (see sec-
tion on Capacitor Characteristics).
Application Hints
EXTERNAL CAPACITORS
Like any low-dropout regulator, the LP3985 requires external
capacitors for regulator stability. The LP3985 is specifically
designed for portable applications requiring minimum board
space and smallest components. These capacitors must be
correctly selected for good performance.
It may also be possible to use tantalum or film capacitors at
the output, but these are not as attractive for reasons of size
and cost (see next section Capacitor Characteristics).
It is also recommended that the output capacitor be placed
within 1cm from the output pin and returned to a clean
ground line.
INPUT CAPACITOR
An input capacitance of ) 1µF is required between the
LP3985 input pin and ground (the amount of the capacitance
may be increased without limit).
CAPACITOR CHARACTERISTICS
The LP3985 is designed to work with ceramic capacitors on
the output to take advantage of the benefits they offer: for
capacitance values in the range of 1µF to 4.7µF range,
ceramic capacitors are the smallest, least expensive and
have the lowest ESR values (which makes them best for
eliminating high frequency noise). The ESR of a typical 1µF
ceramic capacitor is in the range of 20 mΩ to 40 mΩ, which
easily meets the ESR requirement for stability by the
LP3985.
This capacitor must be located a distance of not more than
1cm from the input pin and returned to a clean analog
ground. A ceramic capacitor is recommended although a
good quality tantalum or film capacitor may be used at the
input.
Important: Tantalum capacitors can suffer catastrophic fail-
ures due to surge current when connected to a low-
impedance source of power (like a battery or a very large
capacitor). If a tantalum capacitor is used at the input, it must
be guaranteed by the manufacturer to have a surge current
rating sufficient for the application.
For both input and output capacitors careful interpretation of
the capacitor specification is required to ensure correct de-
vice operation. The capacitor value can change greatly de-
pendant on the conditions of operation and capacitor type.
There are no requirements for the ESR on the input capaci-
tor, but tolerance and temperature coefficient must be con-
sidered when selecting the capacitor to ensure the capaci-
tance will remain within the operational range over the full
range of temperature and operating conditions.
In particular the output capacitor selection should take ac-
count of all the capacitor parameters to ensure that the
specification is met within the application. Capacitance value
can vary with DC bias conditions as well as temperature and
frequency of operation. Capacitor values will also show
some decrease over time due to aging. The capacitor pa-
rameters are also dependant on the particular case size with
smaller sizes giving poorer performance figures in general.
As an example Figure 3 shows a typical graph showing a
comparison of capacitor case sizes in a Capacitance vs. DC
Bias plot. As shown in the graph, as a result of the DC Bias
condition the capacitance value may drop below the mini-
mum capacitance value given in the recommended capacitor
table (0.7µF in this case). Note that the graph shows the
capacitance out of spec for the 0402 case size capacitor at
higher bias voltages. It is therefore recommended that the
capacitor manufacturers’ specifications for the nominal value
OUTPUT CAPACITOR
Correct selection of the output capacitor is important to
ensure stable operation in the intended application.
The output capacitor must meet all the requirements speci-
fied in the recommended capacitor table over all conditions
in the application. These conditions include DC-bias, fre-
quency and temperature. Unstable operation will result if the
capacitance drops below the minimum specified value. (See
the next section Capacitor Characteristics).
The LP3985 is designed specifically to work with very small
ceramic output capacitors. A 1.0µF ceramic capacitor (dia-
lectric type X7R) with ESR between 5mΩ to 500mΩ is
suitable in the LP3985 application circuit. X5R capacitors
13
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The types of capacitors best suited for the noise bypass
capacitor are ceramic and film. High-quality ceramic capaci-
tors with either NPO or COG dielectric typically have very
low leakage. Polypropolene and polycarbonate film capaci-
tors are available in small surface-mount packages and
typically have extremely low leakage current.
Application Hints (Continued)
capacitor are consulted for all conditions as some capacitor
sizes (e.g. 0402) may not be suitable in the actual applica-
tion.
Unlike many other LDO’s, addition of a noise reduction
capacitor does not effect the load transient response of the
device.
NO-LOAD STABILITY
The LP3985 will remain stable and in regulation with no
external load. This is specially important in CMOS RAM
keep-alive applications.
ON/OFF INPUT OPERATION
The LP3985 is turned off by pulling the VEN pin low, and
turned on by pulling it high. If this feature is not used, the VEN
pin should be tied to VIN to keep the regulator output on at all
time. To assure proper operation, the signal source used to
drive the VEN input must be able to swing above and below
the specified turn-on/off voltage thresholds listed in the Elec-
trical Characteristics section under VIL and VIH
.
10136467
FAST ON-TIME
FIGURE 3. Graph Showing A Typical Variation in
Capacitance vs DC Bias
The LP3985 output is turned on after Vref voltage reaches its
final value (1.23V nomial). To speed up this process, the
noise reduction capacitor at the bypass pin is charged with
an internal 70uA current source. The current source is turned
off when the bandgap voltage reaches approximately 95% of
its final value. The turn on time is determined by the time
constant of the bypass capacitor. The smaller the capacitor
value, the shorter the turn on time, but less noise gets
reduced. As a result, turn on time and noise reduction need
to be taken into design consideration when choosing the
value of the bypass capacitor.
The ceramic capacitor’s capacitance can vary with tempera-
ture. The capacitor type X7R, which operates over a tem-
perature range of -55˚C to +125˚C, will only vary the capaci-
tance to within 15%. The capacitor type X5R has a similar
tolerance over a reduced temperature range of -55˚C to
+85˚C. Most large value ceramic capacitors () 2.2µF) are
manufactured with Z5U or Y5V temperature characteristics.
Their capacitance can drop by more than 50% as the tem-
perature goes from 25˚C to 85˚C. Therefore X7R is recom-
mended over Z5U and Y5V in applications where the ambi-
ent temperature will change significantly above or below
25˚C.
micro SMD MOUNTING
The micro SMD package requires specific mounting tech-
niques which are detailed in National Semiconductor Appli-
cation Note (AN-1112). Referring to the section Surface
Mount Technology (SMT) Assembly Considerations, it
should be noted that the pad style which must be used with
the 5 pin package is NSMD (non-solder mask defined) type.
Tantalum capacitors are less desirable than ceramic for use
as output capacitors because they are more expensive when
comparing equivalent capacitance and voltage ratings in the
1µF to 4.7µF range.
Another important consideration is that tantalum capacitors
have higher ESR values than equivalent size ceramics. This
means that while it may be possible to find a tantalum
capacitor with an ESR value within the stable range, it would
have to be larger in capacitance (which means bigger and
more costly ) than a ceramic capacitor with the same ESR
value. It should also be noted that the ESR of a typical
tantalum will increase about 2:1 as the temperature goes
from 25˚C down to −40˚C, so some guard band must be
allowed.
For best results during assembly, alignment ordinals on the
PC board may be used to facilitate placement of the micro
SMD device.
micro SMD LIGHT SENSITIVITY
Exposing the micro SMD device to direct sunlight will cause
misoperation of the device. Light sources such as halogen
lamps can effect electrical performance if brought near to the
device.
The wavelengths which have most detrimental effect are
reds and infra-reds, which means that the fluorescent light-
ing used inside most buildings has very little effect on per-
formance. A micro SMD test board was brought to within
1cm of a fluorescent desk lamp and the effect on the regu-
lated output voltage was negligible, showing a deviation of
less than 0.1% from nominal.
NOISE BYPASS CAPACITOR
Connecting a 0.01µF capacitor between the CBYPASS pin
and ground significantly reduces noise on the regulator out-
put. This cap is connected directly to a high impedance node
in the band gap reference circuit. Any significant loading on
this node will cause a change on the regulated output volt-
age. For this reason, DC leakage current through this pin
must be kept as low as possible for best output voltage
accuracy.
www.national.com
14
Physical Dimensions inches (millimeters)
unless otherwise noted
5-Lead Small Outline Package (MF)
NS Package Number MF05A
micro SMD, 5 Bump, Package (BPA05)
NS Package Number BPA05DNC
The dimensions for X1, X2 and X3 are as given:
X1 = 0.853 +/− 0.03mm
X2 = 1.412 +/− 0.03mm
X3 = 0.900 +/− 0.10mm
15
www.national.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
micro SMD, 5 Bump, Package (BLA05)
NS Package Number BLA05AEC
The dimensions for X1, X2 and X3 are as given:
X1 = 1.006 +/- 0.03mm
X2 = 1.463 +/- 0.03mm
X3 = 0.995 +/- 0.10mm
www.national.com
16
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
thin micro SMD, 5 Bump, Package (TLA05)
NS Package Number TLA05AEA
The dimensions for X1, X2 and X3 are as given:
X1 = 1.006 +/- 0.03mm
X2 = 1.463 +/- 0.03mm
X3 = 0.6 +/- 0.075mm
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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(b) support or sustain life, and whose failure to perform when
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provided in the labeling, can be reasonably expected to result
in a significant injury to the user.
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