935265467118 [NXP]
IC AHC SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16, 3.90 MM, PLASTIC, MS-012, SOT-109-1, SO-16, Multiplexer/Demultiplexer;
| 型号： | 935265467118 |
| 厂家： | 
NXP |
| 描述： | IC AHC SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16, 3.90 MM, PLASTIC, MS-012, SOT-109-1, SO-16, Multiplexer/Demultiplexer 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总20页 (文件大小：89K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
Product specification
2000 Apr 03
File under Integrated Circuits, IC06
Philips Semiconductors
Product specification
74AHC257;
74AHCT257
Quad 2-input multiplexer; 3-state
FEATURES
data from two sources and are controlled by a common
data select input (S).
• ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
CDM EIA/JESD22-C101 exceeds 1000 V
The data inputs from source 0 (1I0 to 4I0) are selected
when input S is LOW and the data inputs from source 1
(1I1 to 4I1) are selected when S is HIGH. Data appears at
the outputs (1Y to 4Y) in true (non-inverting) form from the
selected inputs.
• Balanced propagation delays
• All inputs have Schmitt-trigger actions
• Non-inverting data path
The 74AHC/AHCT257 is the logic implementation of a
4-pole 2-position switch, where the position of the switch is
determined by the logic levels applied to S. The outputs
are forced to a high impedance OFF-state when OE is
HIGH.
• Inputs accept voltages higher than VCC
• For AHC only: operates with CMOS input levels
• For AHCT only: operates with TTL input levels
• Specified from −40 to +85 °C and −40 to +125 °C.
If OE is LOW then the logic equations for the outputs are:
1Y = 1I1 × S + 1I0 × S;
2Y = 2I1 × S + 2I0 × S;
3Y = 3I1 × S + 3I0 × S;
DESCRIPTION
4Y = 4I1 × S + 4I0 × S.
The 74AHC/AHCT257 are high-speed Si-gate CMOS
devices and are pin compatible with Low power Schottky
TTL (LSTTL). They are specified in compliance with
JEDEC standard No. 7A.
The ‘257’ is identical to the ‘258’ but has non-inverting
(true) outputs.
The 74AHC/AHCT257 has four identical 2-input
multiplexers with 3-state outputs, which select 4 bits of
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns.
TYPICAL
SYMBOL
PARAMETER
propagation delay
CONDITIONS
UNIT
AHC
AHCT
tPHL/tPLH
nl0, nI1 to nY
S to nY
CL = 15 pF; VCC = 5 V
2.9
3.7
ns
CL = 15 pF; VCC = 5 V
VI = VCC or GND
3.5
3.0
4.0
5.1
3.0
4.0
ns
pF
pF
CI
input capacitance
output capacitance
CO
CPD
power dissipation
capacitance
CL = 50 pF; fi = 1 MHz; notes 1 and 2
4 outputs switching via input S
1 output switching via input I
45
15
51
15
pF
pF
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
∑ (CL × VCC2 × fo) = sum of outputs;
CL = output load capacitance in pF;
VCC = supply voltage in Volts.
2. The condition is VI = GND to VCC
.
2000 Apr 03
2
Philips Semiconductors
Product specification
74AHC257;
74AHCT257
Quad 2-input multiplexer; 3-state
FUNCTION TABLE
See note 1.
INPUT
OUTPUT
nY
OE
S
nI0
nI1
H
L
L
L
L
X
H
H
L
X
X
X
L
X
L
Z
L
H
X
X
H
L
L
H
H
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high impedance OFF-state.
ORDERING INFORMATION
PACKAGES
PACKAGE
TYPE NUMBER
TEMPERATURE
PINS
MATERIAL
CODE
RANGE
74AHC257D
−40 to +125 °C
16
16
16
16
SO
plastic
plastic
plastic
plastic
SOT109-1
SOT403-1
SOT109-1
SOT403-1
74AHC257PW
74AHCT257D
74AHCT257PW
TSSOP
SO
TSSOP
PINNING
PIN
SYMBOL
DESCRIPTION
1
S
common data select input
data inputs from source 0
data inputs from source 1
multiplexer outputs
2, 5, 11 and 14
1I0 to 4I0
1I1 to 4I1
1Y to 4Y
GND
3, 6, 10 and 13
4, 7, 9 and 12
8
ground (0 V)
15
16
OE
output enable input (active LOW)
DC supply voltage
VCC
2000 Apr 03
3
Philips Semiconductors
Product specification
74AHC257;
74AHCT257
Quad 2-input multiplexer; 3-state
handbook, halfpage
S
1
2
3
4
5
6
7
8
16 V
CC
handbook, halfpage
2
3
5
6
11 10 14 13
1I
15 OE
0
1
1I
14 4I
0
1I
1I
2I
2I
3I
3I
4I
4I
0 1
0
1
0
1
0
1
1Y
13 4I
1
1
S
257
2I
0
12 4Y
15
OE
1Y 2Y 3Y 4Y
2I
1
11 3I
0
2Y
10 3I
1
4
7
9
12
MNA537
GND
9
3Y
MNA536
Fig.1 Pin configuration.
Fig.2 Logic symbol.
handbook, halfpage
1I
handbook, halfpage
1
G1
2
3
0
1Y
2Y
3Y
4
7
15
1I
1
EN
2I
2I
5
6
0
1
2
MUX
1
1
4
7
9
3
5
3-STATE
MULTIPLEXER
OUTPUTS
SELECTOR
3I
3I
11
10
0
1
9
6
11
10
14
13
4I
4I
14
13
0
1
4Y
12
12
S
1
OE
15
MNA538
MNA540
Fig.3 IEC logic symbol.
Fig.4 Functional diagram.
2000 Apr 03
4
Philips Semiconductors
Product specification
74AHC257;
74AHCT257
Quad 2-input multiplexer; 3-state
1I
0
1Y
2Y
3Y
4Y
1I
1
2I
0
2I
1
3I
0
3I
1
4I
0
4I
1
OE
S
MNA539
Fig.5 Logic diagram.
2000 Apr 03
5
Philips Semiconductors
Product specification
74AHC257;
74AHCT257
Quad 2-input multiplexer; 3-state
RECOMMENDED OPERATING CONDITIONS
74AHC
74AHCT
UNIT
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
MIN. TYP. MAX. MIN. TYP. MAX.
VCC
VI
2.0
0
5.0
−
5.5
4.5
0
5.0
−
5.5
V
input voltage
5.5
5.5
V
VO
output voltage
0
−
VCC
+85
0
−
VCC
+85
V
Tamb
operating ambient temperature
see DC and AC
characteristics per
device
−40
−40
+25
+25
−40
+25
+25
°C
+125 −40
+125 °C
tr, tf
(∆t/∆V)
input rise and fall time ratios
VCC = 3.3 ±0.3 V
VCC = 5 ±0.5 V
−
−
−
−
100
20
−
−
−
−
−
ns/V
ns/V
20
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
MIN. MAX. UNIT
VCC
VI
−0.5 +7.0
−0.5 +7.0
V
input voltage
V
IIK
DC input diode current
VI < −0.5 V; note 1
−
−
−20
±20
mA
mA
IOK
DC output clamping diode
current
VO < −0.5 V or VO > VCC + 0.5 V; note 1
IO
DC output sink current
−0.5 V < VO < VCC + 0.5 V
−
±25
±75
mA
mA
I
CC; IGND DC VCC or GND current
−
Tstg
PD
storage temperature
−65
−
+150 °C
500 mW
power dissipation per package
for temperature range: −40 to +125 °C; note 2
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. For SO packages: above 70 °C the value of PD derates linearly with 8 mW/K.
For TSSOP packages: above 60 °C the value of PD derates linearly with 5.5 mW/K.
2000 Apr 03
6
Philips Semiconductors
Product specification
74AHC257;
74AHCT257
Quad 2-input multiplexer; 3-state
DC CHARACTERISTICS
74AHC family
Over recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
Tamb (°C)
−40 to +85 −40 to +125 UNIT
MIN. TYP. MAX. MIN. MAX. MIN. MAX.
SYMBOL
PARAMETER
25
OTHER VCC (V)
VIH
HIGH-level input
voltage
2.0
3.0
5.5
2.0
3.0
5.5
2.0
3.0
4.5
3.0
1.5
2.1
3.85
−
−
−
1.5
2.1
3.85
−
−
1.5
2.1
3.85
−
−
V
V
V
V
V
V
V
V
V
V
−
−
−
−
−
−
−
−
VIL
LOW-level input
voltage
−
0.5
0.9
1.65
−
0.5
0.9
1.65
−
0.5
0.9
1.65
−
−
−
−
−
−
−
−
−
VOH
HIGH-level output VI = VIH or VIL;
voltage
1.9
2.9
4.4
2.58
2.0
3.0
4.5
−
1.9
2.9
4.4
2.48
1.9
2.9
4.4
2.40
IO = −50 µA
−
−
−
−
−
−
VI = VIH or VIL;
−
−
−
IO = −4.0 mA
VI = VIH or VIL;
4.5
3.94
−
−
3.8
−
3.70
−
V
IO = −8.0 mA
VOL
LOW-level output VI = VIH or VIL;
2.0
3.0
4.5
3.0
−
−
−
−
0
0
0
−
0.1
0.1
0.1
0.36
−
−
−
−
0.1
0.1
0.1
0.44
−
−
−
−
0.1
0.1
0.1
0.55
V
V
V
V
voltage
IO = 50 µA
VI = VIH or VIL;
IO = 4.0 mA
VI = VIH or VIL;
IO = 8.0 mA
4.5
−
−
−
−
−
−
−
−
−
3
0.36
0.1
−
−
0.44
1.0
±2.5
40
−
−
−
−
−
0.55
2.0
V
II
input leakage
current
VI = VCC or GND 5.5
µA
IOZ
ICC
CI
3-state output
OFF current
VI = VIH or VIL;
VO = VCC or GND
5.5
±0.25 −
±10.0 µA
quiescent supply VI = VCC or GND; 5.5
4.0
10
−
−
80
10
µA
current
IO = 0
input capacitance
−
10
pF
2000 Apr 03
7
Philips Semiconductors
Product specification
74AHC257;
74AHCT257
Quad 2-input multiplexer; 3-state
74AHCT family
Over recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
T
amb (°C)
−40 to +85 −40 to +125 UNIT
MIN. TYP. MAX. MIN. MAX. MIN. MAX.
SYMBOL
PARAMETER
25
OTHER VCC (V)
VIH
VIL
HIGH-level input
voltage
4.5 to 5.5 2.0
−
−
2.0
−
2.0
−
V
LOW-level input
voltage
4.5 to 5.5 −
−
0.8
−
−
0.8
−
−
0.8
−
V
VOH
HIGH-level output VI = VIH or VIL;
voltage
4.5
4.5
4.5
4.5
5.5
5.5
4.4 4.5
4.4
3.8
−
4.4
3.70
−
V
IO = −50 µA
VI = VIH or VIL;
IO = −8.0 mA
3.94
−
0
−
−
−
−
−
−
V
VOL
LOW-level output VI = VIH or VIL;
voltage
−
−
−
−
0.1
0.36
0.1
0.1
0.44
1.0
±2.5
0.1
0.55
2.0
V
IO = 50 µA
VI = VIH or VIL;
IO = 8.0 mA
−
−
V
II
input leakage
current
VI = VIH or VIL
−
−
µA
IOZ
3-state output
OFF current
VI = VIH or VIL;
VO = VCC or GND
per input pin;
±0.25 −
−
±10.0 µA
other inputs at
VCC or GND;
IO = 0
ICC
quiescent supply
current
VI = VCC or GND; 5.5
IO = 0
−
−
−
4.0
−
−
40
−
−
80
µA
∆ICC
additional
VI = VCC − 2.1 V 4.5 to 5.5 −
1.35
1.5
1.5
mA
quiescent supply
current per input
pin
other inputs at
VCC or GND;
IO = 0
CI
input capacitance
−
−
3
10
−
10
−
10
pF
2000 Apr 03
8
Philips Semiconductors
Product specification
74AHC257;
74AHCT257
Quad 2-input multiplexer; 3-state
AC CHARACTERISTICS
Type 74AHC257
GND = 0 V; tr = tf ≤ 3.0 ns.
TEST CONDITIONS
Tamb (°C)
SYMBOL
PARAMETER
25
−40 to +85
−40 to +125 UNIT
WAVEFORMS
CL
MIN. TYP. MAX. MIN. MAX. MIN. MAX.
VCC = 3.0 to 3.6 V; note 1
tPHL/tPLH propagation delay
nI0 to nY; nI1 to nY
see Figs 6
and 8
15 pF −
4.2
5.2
4.5
5.1
6.0
7.4
6.4
7.2
9.3
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
11.0
13.0
12.5
11.0
14.5
16.5
16.0
13.5
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
12.0
14.0
13.5
11.5
16.0
18.5
17.5
14.5
ns
ns
ns
ns
ns
ns
ns
ns
propagation delay
S to nY
−
11.0
10.5
9.5
t
t
t
PZH/tPZL 3-state output enable see Figs 7
−
time OE to nY
and 8
PHZ/tPLZ 3-state output disable
time OE to nY
−
PHL/tPLH propagation delay
nI0 to nY; nI1 to nY
see Figs 6
and 8
50 pF −
12.8
14.5
14.0
12.0
propagation delay
S to nY
−
−
−
tPZH/tPZL 3-state output enable see Figs 7
time OE to nY
and 8
t
PHZ/tPLZ 3-state output disable
time OE to nY
VCC = 4.5 to 5.5 V; note 2
tPHL/tPLH propagation delay
nI0 to nY; nI1 to nY
see Figs 6
and 8
15 pF −
2.9
3.5
3.2
3.4
4.2
5.0
4.5
4.9
5.9
6.8
6.8
6.5
7.9
8.8
8.8
7.9
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
7.0
8.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
7.5
ns
ns
ns
ns
ns
ns
ns
ns
propagation delay
S to nY
−
8.5
tPZH/tPZL 3-state output enable see Figs 7
−
8.0
8.5
time OE to nY
and 8
t
PHZ/tPLZ 3-state output disable
time OE to nY
−
7.0
8.5
tPHL/tPLH propagation delay
nI0 to nY; nI1 to nY
see Figs 6
and 8
50 pF −
9.0
11.5
12.5
12.5
9.5
propagation delay
S to nY
−
−
−
10.0
10.0
9.0
tPZH/tPZL 3-state output enable see Figs 7
time OE to nY
and 8
t
PHZ/tPLZ 3-state output disable
time OE to nY
Notes
1. Typical values at VCC = 3.3 V.
2. Typical values at VCC = 5.0 V.
2000 Apr 03
9
Philips Semiconductors
Product specification
74AHC257;
74AHCT257
Quad 2-input multiplexer; 3-state
Type 74AHCT257
GND = 0 V; tr = tf ≤ 3.0 ns.
TEST CONDITIONS
WAVEFORMS CL
Tamb (°C)
−40 to +85
SYMBOL
PARAMETER
25
−40 to +125 UNIT
MIN. TYP. MAX. MIN. MAX. MIN. MAX.
VCC = 4.5 to 5.5 V; note 1
tPHL/tPLH propagation delay
nI0 to nY; nI1 to nY
see Figs 6
and 8
15 pF −
3.7
5.1
3.9
4.5
4.9
6.4
5.1
6.5
6.5
9.0
8.0
7.5
8.5
10.5
10.0
9.5
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
8.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
9.0
ns
ns
ns
ns
ns
ns
ns
ns
propagation delay
S to nY
−
10.5
9.0
11.5
10.0
8.5
tPZH/tPZL 3-state output enable see Figs 7
−
time OE to nY
and 8
tPHZ/tPLZ 3-state output disable
−
8.0
time OE to nY
tPHL/tPLH propagation delay
nI0 to nY; nI1 to nY
see Figs 6
and 8
50 pF −
10.0
12.5
11.0
10.5
11.0
13.5
12.0
11.5
propagation delay
S to nY
−
−
−
t
PZH/tPZL 3-state output enable see Figs 7
time OE to nY
and 8
tPHZ/tPLZ 3-state output disable
time OE to nY
Note
1. Typical values at VCC = 5.0 V.
AC WAVEFORMS
V
handbook, halfpage
nI , nI , S
I
0
1
(1)
V
M
input
GND
t
t
PHL
PLH
V
OH
(2)
V
nY output
M
V
MNA486
OL
(1)
(2)
VI INPUT
VM
VM
FAMILY
REQUIREMENTS INPUT OUTPUT
AHC
GND to VCC
50% VCC 50% VCC
1.5 V 50% VCC
AHCT
GND to 3.0 V
Fig.6 The data inputs (1I0, 1I1) and common data select input (S) to output (nY) propagation delays.
2000 Apr 03
10
Philips Semiconductors
Product specification
74AHC257;
74AHCT257
Quad 2-input multiplexer; 3-state
V
I
(1)
t
V
OE input
M
GND
t
PLZ
PZL
V
CC
output
LOW-to-OFF
OFF-to-LOW
(2)
V
M
V
+ 0.3 V
V
OL
V
OL
t
t
PHZ
PZH
V
OH
− 0.3 V
OH
output
(2)
V
HIGH-to-OFF
OFF-to-HIGH
M
GND
outputs
enabled
outputs
enabled
outputs
disabled
MNA450
(1)
(2)
VI INPUT
VM
VM
FAMILY
REQUIREMENTS INPUT OUTPUT
GND to VCC 50% VCC 50% VCC
GND to 3.0 V 1.5 V 50% VCC
AHC
AHCT
Fig.7 3-state enable and disable times.
S1
V
CC
open
V
CC
GND
1000 Ω
V
V
O
I
PULSE
D.U.T.
GENERATOR
C
R
L
T
MNA219
TEST
S1
t
PLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
open
VCC
Definitions for test circuit.
CL = load capacitance including jig and probe capacitance (See Chapter “AC characteristics”).
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
GND
Fig.8 Load circuitry for switching times.
11
2000 Apr 03
Philips Semiconductors
Product specification
74AHC257;
74AHCT257
Quad 2-input multiplexer; 3-state
PACKAGE OUTLINES
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
c
y
H
v
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.050
1.05
0.041
1.75
0.25
0.01
0.25
0.01
0.25
0.1
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.39
0.014 0.0075 0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
97-05-22
99-12-27
SOT109-1
076E07
MS-012
2000 Apr 03
12
Philips Semiconductors
Product specification
74AHC257;
74AHCT257
Quad 2-input multiplexer; 3-state
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.40
0.06
mm
1.10
0.65
0.25
1.0
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-04-04
99-12-27
SOT403-1
MO-153
2000 Apr 03
13
Philips Semiconductors
Product specification
74AHC257;
74AHCT257
Quad 2-input multiplexer; 3-state
SOLDERING
If wave soldering is used the following conditions must be
observed for optimal results:
Introduction to soldering surface mount packages
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
Reflow soldering
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Wave soldering
Manual soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
2000 Apr 03
14
Philips Semiconductors
Product specification
74AHC257;
74AHCT257
Quad 2-input multiplexer; 3-state
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
BGA, LFBGA, SQFP, TFBGA
WAVE
not suitable
REFLOW(1)
suitable
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS
PLCC(3), SO, SOJ
not suitable(2)
suitable
suitable
suitable
LQFP, QFP, TQFP
not recommended(3)(4) suitable
not recommended(5)
suitable
SSOP, TSSOP, VSO
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2000 Apr 03
15
Philips Semiconductors
Product specification
74AHC257;
74AHCT257
Quad 2-input multiplexer; 3-state
DATA SHEET STATUS
PRODUCT
DATA SHEET STATUS
STATUS
DEFINITIONS (1)
Objective specification
Development This data sheet contains the design target or goal specifications for
product development. Specification may change in any manner without
notice.
Preliminary specification Qualification
This data sheet contains preliminary data, and supplementary data will be
published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.
Product specification
Production
This data sheet contains final specifications. Philips Semiconductors
reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
Note
1. Please consult the most recently issued data sheet before initiating or completing a design.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
Application information
Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2000 Apr 03
16
Philips Semiconductors
Product specification
74AHC257;
74AHCT257
Quad 2-input multiplexer; 3-state
NOTES
2000 Apr 03
17
Philips Semiconductors
Product specification
74AHC257;
74AHCT257
Quad 2-input multiplexer; 3-state
NOTES
2000 Apr 03
18
Philips Semiconductors
Product specification
74AHC257;
74AHCT257
Quad 2-input multiplexer; 3-state
NOTES
2000 Apr 03
19
Philips Semiconductors – a worldwide company
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5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
69
SCA
© Philips Electronics N.V. 2000
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613507/01/pp20
Date of release: 2000 Apr 03
Document order number: 9397 750 06997
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