PI6C49S1506FAIE [PERICOM]
Low Skew Clock Driver, 6C Series, 12 True Output(s), 0 Inverted Output(s), PQFP32, GREEN, MS-026D/ABA, TQFP-32;
| 型号： | PI6C49S1506FAIE |
| 厂家： | 
PERICOM SEMICONDUCTOR CORPORATION |
| 描述： | Low Skew Clock Driver, 6C Series, 12 True Output(s), 0 Inverted Output(s), PQFP32, GREEN, MS-026D/ABA, TQFP-32 驱动 逻辑集成电路 |
| 文件： | 总9页 (文件大小：751K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PI6C49S1506
High Performance Differential Fanout Buffer
Features
Description
Î 6 differential outputs with 2 banks
e PI6C49S1506 is a high performance fanout buffer device-
which supports up to 1.5GHz frequency. It also integrates a
unique feature with user configurable output signaling stan-
dards on per bank basis which provide great flexibilities to
users. e device also uses Pericom's proprietary input detection
technique to make sure illegal input conditions will be detected
and reflected by output states. is device is ideal for systems
that need to distribute low jitter clock signals to multiple desti-
nations.
Î User configurable output signaling standard for each bank:
LVDS or LVPECL or HCSL
Î Up to 1.5GHz output frequency for differential outputs
Î Ultra low additive phase jitter: < 0.03 ps (typ) (differential
156.25MHz, 12KHz to 20MHz integration range)
Î Selectable reference inputs support either single-ended
or differential or Xtal
Î Low skew between outputs within banks (<40ps)
Î Low delay from input to output (Tpd typ. 1.5ns)
Î Separate Input output supply voltage for level shiꢀing
Î 2.5V / 3.3V power supply
Applications
Î Networking systems including switches and Routers
Î High frequency backplane based computing and telecom
platforms
Î Industrial temperature support
Î TQFP-32 package
Pin Configuration (32-Pin TQFP)
Block Diagram
OPMODEA[1:0]
QA[0:2]
3
VDDO
nQA1
QA1
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
VDDO
QB1
XT
OSC
XTN
OPMODEB[1:0]
CLK0
nQB1
VDDO
QB2
nCLK0
QB[0:2]
3
VEE
nQA0
CLK1
nCLK1
QA0
nQB2
CLK_SEL1
IREF
CLK_SEL[1:0]
Iref
CLK_SEL0
VEE
PI6C49S1506
Rev A
10/30/12
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PI6C49S1506
High Performance Differential Fanout Buffer
Pinout Table
Pin #
Pin Name
VDDO
Type
Description
1, 21, 24
Power
Power supply pins for outputs
nQA1
Bank A differential output pair 1. Pin selectable
LVPECL/LVDS/HCSL interface levels.
2,3
Output
Power
QA1
4, 16
5, 6
VEE
Connect to Negative power supply
nQA0
Bank A differential output pair 0. Pin selectable
LVPECL/LVDS/HCSL interface levels.
Output
QA0
7
CLK_SEL0
VEE
Input
Power
Input
Output
Input
Input
Input
Input
Power
Input
Input
Input clock source selection
Negative power supply
XTAL input
8
9
XT
10
XTN
XTAL output
CLK0
Differential clock input
Differential clock input
Differential clock input
Differential clock input
Power supply pins for device core
Reference current
11, 12
13, 14
nCLK0
CLK1
nCLK1
VDD
15
17
18
IREF
CLK_SEL1
QB2
Input clock source selection
Bank B differential output pair 5. Pin selectable
LVPECL/LVDS/HCSL interface levels.
19, 20
22, 23
Output
Output
nQB2
nQB1
Bank B differential output pair 4. Pin selectable
LVPECL/LVDS/HCSL interface levels.
QB1
25
26
OPMODEB0
OPMODEB1
nQB0
Input
Input
Bank B output selection pin
Bank B output selection pin
Bank B differential output pair 3. Pin selectable
LVPECL/LVDS/HCSL interface levels.
27, 28
29, 30
Output
Output
QB0
nQA2
Bank A differential output pair 2. Pin selectable
LVPECL/LVDS/HCSL interface levels.
QA2
31
32
OPMODEA1
OPMODEA0
Input
Input
Bank A output selection pin
Bank A output selection pin
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Rev A
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PI6C49S1506
High Performance Differential Fanout Buffer
Function Table
Table 1: Input select function
CLK_SEL [1]
CLK_SEL [0]
Function
0
0
1
0
XTAL is the selected input
1
CLK0 is the selected reference input
CLK1 is the selected reference input
X
Table 2: Output Mode select function
OPMODEA/B [1]
OPMODEA/B [0]
Output Bank A / Bank B Mode
0
0
1
1
0
1
0
1
LVPECL
LVDS
HCSL
Hi-Z
PI6C49S1506
Rev A
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PI6C49S1506
High Performance Differential Fanout Buffer
Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested)
Note:
Storage temperature...................................................-55 to +150ºC
Supply Voltage to Ground Potential (VDD) .......... -0.5 to +4.6V
Inputs (Referenced to GND) ...........................-0.5 to VDD+0.5V
Clock Output (Referenced to GND)...............-0.5 to VDD+0.5V
Soldering Temperature (Max of 10 seconds) ....................+260ºC
Latch up..................................................................................200mA
ESD Protection (Input) ..................................2000 V min (HBM)
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device. is
is a stress rating only and functional operation of the device
at these or any other conditions above those indicated in
the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
Power Supply Characteristics and Operating Conditions
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Units
3.135
2.375
3.135
2.375
3.465
2.625
3.465
2.625
70
V
V
V
V
Core Supply Voltage
VDD
Output Supply Voltage
VDDO
IDD
Core Power Supply Current
All LVPECL outputs unloaded
All LVDS outputs loaded
75
85
55
85
mA
°C
Output Power Supply Current
IDDO
All HCSL outputs unloaded
Ambient Operating Temperature
-40
TA
DC Electrical Specifications - Differential Inputs
Symbol
Parameter
Min.
Typ.
Max.
Units
uA
uA
PF
Input High current
Input Low current
Input capacitance
Input high voltage
Input low voltage
150
IIH
Input = VDD
Input = GND
-150
IIL
3
CIN
VIH
VIL
V
VDD+0.3
-0.3
V
Input Differential Amplitude
PK-PK
0.15
1.3
V
V
VPk-Pk
VCM
Common model input voltage
GND + 0.5
VDD-0.85
PI6C49S1506
Rev A
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PI6C49S1506
High Performance Differential Fanout Buffer
DC Electrical Specifications - LVCMOS Inputs
Symbol Parameter
Conditions
Min.
Typ.
Max.
Units
Input High current
150
uA
IIH
Input = VDD
Input Low current
Input high voltage
Input low voltage
Input high voltage
Input low voltage
Input = GND
VDD=3.3V
VDD=3.3V
VDD=2.5V
VDD=2.5V
-150
2.0
uA
V
IIL
VIH
VIL
VIH
VIL
VDD+0.3
0.8
-0.3
1.7
V
V
VDD+0.3
0.7
-0.3
V
DC Electrical Specifications- LVPECL Outputs
Parameter
Description
Conditions
Min.
Typ.
Max.
2.6
Units
2.1
1.3
1.3
0.5
V
DD=3.3V
DD=2.5V
DD=3.3V
DD=2.5V
Output High voltage
V
V
VOH
1.6
V
1.8
V
Output Low voltage
VOL
0.8
V
DC Electrical Specifications- LVDS Outputs
Parameter
Description
Conditions
Min.
Typ.
Max.
Units
Output High voltage
1.433
1.064
1.25
V
V
V
VOH
Output Low voltage
VOL
Vocm
Output common mode voltage
Change in Vocm between output
states
DVocm
55
mV
W
Ro
Output impedance
85
140
PI6C49S1506
Rev A
10/30/12
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PI6C49S1506
High Performance Differential Fanout Buffer
DC Electrical Specifications- HCSL Outputs
Parameter Description
Conditions
Min.
Typ.
800
0
Max.
Units
mV
Output High voltage
Output Low voltage
520
VOH
VOL
150
mV
AC Electrical Specifications – Differential Outputs
Parameter Description
Conditions
Min.
Typ.
Max. Units
LVPECL, LVDS
1500
MHz
250
Clock output frequency
FOUT
HCSL
Output rise time
Output fall time
Output duty cycle
From 20% to 80%
From 80% to 20%
Frequency<650MHz, LVPECL input
LVPECL outputs
LVDS outputs, <650MHz
HCSL outputs
150
150
ps
ps
Tr
Tf
48
52
%
TODC
400
250
520
Output swing Single-ended
mV
VPP
Buffer additive jitter RMS
Absolute crossing voltage
0.03
ps
T
j
HCSL
160
460
140
mV
mV
VCROSS
Total variation of crossing voltage HCSL
DVCROSS
6 outputs devices, outputs in same
bank, with same load, at DUT.
Output Skew
40
ps
TSK
Propagation Delay
Valid to HiZ
1500
ps
ns
ns
TPD
TOD
TOE
200
200
HiZ to valid
PI6C49S1506
Rev A
10/30/12
12-0262
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PI6C49S1506
High Performance Differential Fanout Buffer
Output Skew
Propagation Delay
Output Skew T
SK
Propagation Delay T
PD
VOH
CLK/nCLK
QAn/QBn
V
OL
TPLHx
T
PHLx
CLK/ nCLK
VOH
TPLH
T
PHL
VOH
VOL
T
SK
T
SK
VOH
QA/QB
VOL
TR
TF
QAn+1/QBn+1
VOL
T
PLHy
T
PHLy
TSK = TPLH2 - TPLH1 or TSK = TPHL2 - TPHL1
T
SK = TPLHy - TPLHx or TSK = TPHLy - TPHLx
PI6C49S1506
Rev A
10/30/12
12-0262
7
PI6C49S1506
High Performance Differential Fanout Buffer
Configuration Test Load Board Termination for HCSL outputs
Rs
33
Clock
Ω
5%
TLA
TLB
PI6C49S1506
Rs
Clock#
33Ω
5%
2pF
5%
2pF
5%
Rp
Rp
49.9Ω
475Ω
49.9Ω
1%
1%
1%
Configuration Test Load Board Termination for LVPECL/ LVDS
LVPECL/LVDS Buffer
VDDQx
Z = 50Ω
o
L = 0 ~ 10 in.
100Ω
Z = 50Ω
o
150*Ω
150*Ω
* remove for LVDS
PI6C49S1506
Rev A
10/30/12
12-0262
8
PI6C49S1506
High Performance Differential Fanout Buffer
Packaging Mechanical:
DOCUMENT CONTROL NO.
PD - 1814
9.00
BSC
.354
Square
REVISION: C
DATE: 03/09/05
Square
7.00 BSC
.276
0.09
0.20
.004
.008
GAUGE PLANE
0°
7°
0.45
0.75
.018
.030
1.20
Max.
1.00 REF
.039
.047
.004
0.10
Seating Plane
0.95
1.05
0.05
0.15
0.30
0.45
0.80 BSC
.032
.012
.018
.037
.041
.002
.006
X.XX
X.XX
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
DENOTES DIMENSIONS
IN MILLIMETERS
1-800-435-2335 • www.pericom.com
Notes:
1. Controlling dimensions in millimeters
2. Ref.: JEDEC MS-026D/ABA
3. Package Outline Exclusive of Mold Flash and Metal Burr
DESCRIPTION: 32-Pin, Thin Quad Flat Package, TQFP
PACKAGE CODE: FA
Ordering Code
PI6C49S1506FAIE
Notes:
Package Code Package Type
Operating Temperature
FA
Pb-free & Green, 32-pin TQFP
-40 °C to 85 °C
1. ermal characteristics can be found on the company web site at www.pericom.com/packaging/
2. “E” denotes Pb-free and Green
3. Adding an “X” at the end of the ordering code denotes tape and Reel packaging
PI6C49S1506
Rev A
10/30/12
12-0262
9
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