PI6C20400_08 [PERICOM]
1:4 Clock Driver for Intel PCI Express Chipsets; 1 ：英特尔的PCI Express芯片组4时钟驱动器
| 型号： | PI6C20400_08 |
| 厂家： | 
PERICOM SEMICONDUCTOR CORPORATION |
| 描述： | 1:4 Clock Driver for Intel PCI Express Chipsets |
| 文件： | 总10页 (文件大小：400K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PI6C20400
1:4 Clock Driver for Intel
PCI Express Chipsets
Features
Description
• Four Pairs of Differential Clocks
Pericom Semiconductor's PI6C20400 is a high-speed, low-noise
differential clock buffer designed to be companion to PI6C410B.
The device distributes the differential SRC clock from PI6C410B
to four differential pairs of clock outputs either with or without
PLL. The clock outputs are controlled by input selection of
SRC_STOP#, PWRDWN# and SMBus, SCLK and SDA. When
input of either SRC_STOP# or PWRDWN# is low, the output
clocks are Tristated. When PWRDWN# is low, the SDA and
SCLK inputs must be Tri-stated.
• Low skew < 50ps
• Low jitter < 50ps
• Output Enable for all outputs
• Outputs tristate control via SMBus
• Power Management Control
• Programmable PLL Bandwidth
• PLL or Fanout operation
• 3.3V Operation
• Packaging (Pb-free and Green):
— 28-Pin SSOP (H28) & 28-Pin TSSOP (L28)
Block Diagram
Pin Configuration
OE_INV
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VDD
SRC
SCR#
VSS
VDD
OUT0
OUT0#
OE_0
OUT1
OUT1#
VDD
VDD_A
VSS_A
IREF
OE_INV
VDD
OUT3
OUT3#
OE_3
OUT2
OUT2#
VDD
1
OE_0 & OE_3
SRC_STOP#
PWRDWN#
Output
Control
2
3
OUT0
OUT0#
4
OUT0
OUT1#
5
SMBus
Controller
SCLK
SDA
6
OUT2
OUT2#
7
8
PLL/BYPASS#
OUT3
OUT3#
9
SRC
SRC#
10
11
12
13
14
PLL/BYPASS#
SCLK
PLL_BW#
SRC_STOP#
PWRDWN#
DIV
PLL_BW#
PLL
SDA
08-0298
PS8744C
11/13/08
1
PI6C20400
1:4 Clock Driver for Intel
PCI Express Chipsets
Pin Descriptions
Pin Name
Type
Input
Pin No
Description
SRC & SRC#
2, 3
0.7V Differential SRC input from PI6C410 clock synthesizer
3.3V LVTTL input for enabling outputs, active high.
OE_0 for OUT0 / OUT0#
OE_3 for OUT3 / OUT3#
OE_0 & OE_3
OE_INV
Input
8, 21
3.3V LVTTL input for inverting the OE, SRC_STOP# and
PWRDWN# pins.
When 0 = same stage
Input
25
When 1 = OE_0, OE_3, SRC_STOP#, PWRDWN# inverted.
6, 7, 9, 10, 19, 20,
22, 23
OUT[0:3] & OUT[0:3]# Output
0.7V Differential outputs
PLL/BYPASS#
SCLK
Input
Input
I/O
12
3.3V LVTTL input for selecting fan-out of PLL operation.
SMBus compatible SCLOCK input
13
SDA
14
SMBus compatible SDATA
IREF
Input
Input
Input
Input
Power
Ground
26
External resistor connection to set the differential output current
3.3V LVTTL input for SRC stop, active low
3.3V LVTTL input for selecting the PLL bandwidth
3.3V LVTTL input for Power Down operation, active low
3.3V Power Supply for Outputs
SRC_STOP#
PLL_BW#
PWRDWN#
16
17
15
V
DD
1, 5, 11, 18, 24
4
VSS
Ground for Outputs
VSS_A
VDD_A
Ground 27
Power 28
Ground for PLL
3.3V Power Supply for PLL
Serial Data Interface (SMBus)
PI6C20400 is a slave only SMBus device that supports indexed block read and indexed block write protocol using a single 7-bit
address and read/write bit as shown below.
Address assignment
A6
A5
A4
A3
A2
A1
A0
R/W
1
1
0
1
1
1
0
0/1
Data Protocol
1 bit
7 bits
1
1
8 bits
1
8 bits
1
8 bits
1
8 bits
Data
Byte N Ack
- 1
1
1 bit
Byte
Count
= N
Start
bit
Slave
Addr
Register
offset
Data
Byte 0
Stop
bit
R/W Ack
Ack
Ack
Ack
…
Notes:
1. Register offset for indicating the starting register for indexed block write and indexed block read. Byte Count in write mode cannot be 0.
08-0298
PS8744C
2
11/13/08
PI6C20400
1:4 Clock Driver for Intel
PCI Express Chipsets
Data Byte 0: Control Register
Source
Pin
Bit
Descriptions
Type
Power Up Condition
Output(s) Affected
Outputs Mode
0
0 = Divide by 2
1 = Normal
RW
1 = Normal
OUT[0:3], OUT[0:3]#
OUT[0:3], OUT[0:3]#
OUT[0:3], OUT[0:3]#
NA
PLL/BYPASS#
0 = Fanout
1 = PLL
1
2
RW
RW
1 = PLL
1 = Low
NA
NA
PLL Bandwidth
0 = High Bandwidth,
1 = Low Bandwidth
3
4
5
TBD
TBD
TBD
NA
NA
NA
SRC_STOP#
6
7
0 = Driven when stopped
1 = Tristate
RW
RW
0 = Driven when stopped
0 = Driven when stopped
OUT[0:3], OUT[0:3]#
OUT[0:3], OUT[0:3]#
PWRDWN#
0 = Driven when stopped
1 = Tristate
NA
Data Byte 1: Control Register
Source
Pin
Bit
Descriptions
Type
Power Up Condition
Output(s) Affected
0
1
OUTPUTS enable
1 = Enabled
0 = Disabled
RW
RW
1 = Enabled
1 = Enabled
OUT0, OUT0#
OUT1, OUT1#
NA
NA
2
3
4
5
OUTPUTS enable
1 = Enabled
0 = Disabled
RW
RW
1 = Enabled
1 = Enabled
OUT2, OUT2#
OUT3, OUT3#
NA
NA
6
7
08-0298
PS8744C
11/13/08
3
PI6C20400
1:4 Clock Driver for Intel
PCI Express Chipsets
Data Byte 2: Control Register
Source
Pin
Bit
Descriptions
Type
Power Up Condition
Output(s) Affected
0
1
Allow control of OUTPUTS with
assertion of SRC_STOP#
0 = Free running
RW
RW
0 = Free running
0 = Free running
OUT0, OUT0#
OUT1, OUT1#
NA
NA
2
1 = Stopped with SRC_Stop#
3
4
5
Allow control of OUTPUTS with
assertion of SRC_STOP#
0 = Free running
RW
RW
0 = Free running
0 = Free running
OUT2, OUT2#
OUT3, OUT3#
NA
NA
6
7
1 = Stopped with SRC_Stop#
Data Byte 3: Control Register
Source
Pin
Bit
Descriptions
Type
Power Up Condition
Output(s) Affected
0
1
2
3
4
5
6
7
RW
RW
RW
RW
RW
RW
RW
RW
TBD
Data Byte 4: Pericom ID Register
Bit
Descriptions
Type
R
Power Up Condition
Output(s) Affected
Pin
NA
NA
NA
NA
NA
NA
NA
NA
0
0
0
0
0
0
1
0
0
NA
NA
NA
NA
NA
NA
NA
NA
1
R
2
R
3
R
Pericom ID
4
R
5
R
6
R
7
R
08-0298
PS8744C
11/13/08
4
PI6C20400
1:4 Clock Driver for Intel
PCI Express Chipsets
Functionality
PWRDWN#
OUT
OUT#
Normal
Low
SRC_Stop#
OUT
OUT#
1
0
Normal
1
0
Normal
Normal
I
× 2 or Float
I
× 6 or Float
Low
REF
REF
Power Down (PWRDWN# assertion)
PWRDWN#
OUT
OUT#
Figure 1. Power down sequence
Power Down (PWRDWN# De-assertion)
Tstable
<1ms
PWRDWN#
OUT
OUT#
Tdrive_PwrDwn#
<300us, >200mV
Figure 2. Power down de-assert sequence
08-0298
PS8744C
11/13/08
5
PI6C20400
1:4 Clock Driver for Intel
PCI Express Chipsets
Current-mode output buffer characteristics of OUT[0:3], OUT[0:3]#
VDD
(3.3V ± 5%)
Slope ~ 1/Rs
RO
IOUT
ROS
Iout
VOUT = 0.85V max
0V
0.85V
Figure 9. Simplified diagram of current-mode output buffer
Differential Clock Buffer characteristics
Symbol
Minimum
3000Ω
Maximum
N/A
R
O
R
unspecified
N/A
unspecified
850mV
OS
V
OUT
Current Accuracy
Symbol
Conditions
V = 3.30 ±5%
DD
Configuration
Load
Min.
Max.
R
= 475Ω 1%
Nominal test load for given
configuration
-12%
+12%
REF
I
OUT
I
= 2.32mA
I
I
REF
NOMINAL
NOMINAL
Note:
1. INOMINAL refers to the expected current based on the configuration of the device.
Differential Clock Output Current
Board Target Trace/Term Z
Reference R, Iref = V /(3xRr)
Output Current
= 6 x I
V
@ Z
DD
OH
100Ω
R
REF
= 475Ω 1%,
I
0.7V @ 50
OH
REF
(100Ω differential ≈ 15% coupling ratio)
I
= 2.32mA
REF
08-0298
PS8744C
11/13/08
6
PI6C20400
1:4 Clock Driver for Intel
PCI Express Chipsets
Absolute Maximum Ratings (Over operating free-air temperature range)
Symbol Parameters
Min.
-0.5
-0.5
Max.
4.6
Units
V
3.3V Core Supply Voltage
3.3V I/O Supply Voltage
Input High Voltage
Input Low Voltage
DD_A
V
4.6
DD
V
V
4.6
IH
V
-0.5
-65
IL
Ts
Storage Temperature
ESD Protection
150
°C
V
V
2000
ESD
Note:
1. Stress beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
DC Electrical Characteristics (V = 3.3±5%, V
= 3.3±5%)
DD
DD_A
Symbol
Parameters
Condition
Min.
3.135
3.135
2.0
Max.
Units
V
DD_A
3.3V Core Supply Voltage
3.3V I/O Supply Voltage
3.3V Input High Voltage
3.3V Input Low Voltage
Input Leakage Current
3.3V Output High Voltage
3.3V Output Low Voltage
3.465
3.465
V
DD
V
V
IH
V
DD
V
+ 0.3
DD
V
IL
V
– 0.3
SS
0.8
I
IK
0 < V < V
DD
-5
+5
μA
IN
V
OH
I
OH
= -1mA
2.4
12.2
3
V
V
OL
I
OL
= 1mA
0.4
I
I
= 6 x I
,
OH
REF
I
Output High Current
mA
OH
= 2.32mA
REF
15.6
5
C
Input Pin Capacitance
Output Pin Capacitance
Pin Inductance
IN
pF
C
OUT
6
L
7
nH
PIN
DD
I
Power Supply Current
Power Down Current
Power Down Current
Ambient Temperature
V
DD
= 3.465V, F
= 200MHz
CPU
200
40
12
70
I
Driven outputs
Tristate outputs
mA
°C
SS
SS
I
T
A
0
08-0298
PS8744C
11/13/08
7
PI6C20400
1:4 Clock Driver for Intel
PCI Express Chipsets
AC Switching Characteristics (V = 3.3±5%, V
= 3.3±5%)
DD
DD_A
Symbol
Parameters
Min
Max.
Units Notes
T
/ T
Rise and Fall Time (measured between 0.175V to 0.525V)
175
700
ps
2
2
2
rise
fall
ΔT
ΔT
/
rise
Rise and Fall Time Variation
125
ps
fall
Rise/Fall Matching
20
±250
6.5
%
ps
PLL Mode
T
pd
Non-PLL Mode
2.5
ns
T
Output-to-Output Skew
Cycle – Cycle Jitter
50
ps
3
3, 4
2
skew
T
50
ps
jitter
V
Voltage High including overshoot
Voltage Low including undershoot
Absolute crossing point voltages
Total Variation of Vcross over all edges
Duty Cycle
660
-300
250
1150
mV
mV
mV
mV
%
HIGH
LOW
cross
V
V
2
550
140
55
2
ΔV
2
cross
T
45
3
DC
Notes:
1. Test configuration is Rs = 33.2Ω, Rp = 49.9Ω, and 2pF.
2. Measurement taken from Single Ended waveform.
3. Measurement taken from Differential waveform.
4. Measurement taken using M1 data capture analysis tool.
Configuration Test Load Board Termination
Rs
33Ω
5%
OUT
TLA
TLB
Rs
33Ω
5%
PI6C20400
OUT#
2pF
5%
2pF
5%
Rp
49.9Ω
1%
Rp
49.9Ω
1%
475Ω
1%
08-0298
PS8744C
11/13/08
8
PI6C20400
1:4 Clock Driver for Intel
PCI Express Chipsets
$/#5-%.4 #/.42/, ./ꢈ
0$ ꢃ ꢅꢇꢅꢇ
2%6)3)/.ꢀ
$
ꢈꢃ
$!4%ꢀ ꢉꢇꢊꢉꢋꢊꢉꢌ
ꢀꢇꢄꢊ
ꢀꢇꢂꢂ
ꢆꢀꢁ
ꢆꢀꢉ
ꢅꢀꢅꢊ
ꢅꢀꢈꢅ
ꢀꢅꢅꢆ
ꢀꢅꢅꢃ
ꢇ
ꢀꢁꢂꢃ
ꢀꢁꢃꢄ
ꢅꢀꢆꢉ ꢀꢅꢇꢃ
ꢅꢀꢂꢉ ꢀꢅꢁꢅ
ꢊꢀꢄ
ꢊꢀꢃ
ꢀꢈꢉꢈ
"3#
ꢄꢀꢆ
ꢀꢅꢆꢂ
ꢇꢀꢈꢅ
-AX
3%!4).'
0,!.%
ꢀꢅꢅꢈ
ꢀꢅꢅꢄ
ꢅꢀꢅꢉ
ꢅꢀꢇꢉ
ꢀꢅꢅꢂ
ꢀꢅꢇꢈ
ꢅꢀꢇꢊ
ꢅꢀꢁꢅ
ꢀꢅꢈꢉꢄ
"3#
ꢅꢀꢄꢉ
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2335 • www.pericom.com
Note:
1. Package Outline Exclusive of Mold Flash and Metal Burr
2. Controlling dimentions in millimeters
3. Ref: JEDEC MO-153F/AE
$%3#2)04)/.ꢀ ꢁꢂꢃ0INꢄ ꢅꢆꢇꢃ-IL 7IDEꢄ433/0
0!#+!'% #/$%ꢀ ,
08-0298
PS8744C
11/13/08
9
PI6C20400
1:4 Clock Driver for Intel
PCI Express Chipsets
$/#5-%.4 #/.42/, ./ꢈ
0$ ꢃ ꢅꢇꢅꢇ
2%6)3)/.ꢀ
$
ꢈꢃ
$!4%ꢀ ꢉꢇꢊꢉꢋꢊꢉꢌ
ꢀꢇꢄꢊ
ꢀꢇꢂꢂ
ꢆꢀꢁ
ꢆꢀꢉ
ꢅꢀꢅꢊ
ꢅꢀꢈꢅ
ꢀꢅꢅꢆ
ꢀꢅꢅꢃ
ꢇ
ꢀꢁꢂꢃ
ꢀꢁꢃꢄ
ꢅꢀꢆꢉ ꢀꢅꢇꢃ
ꢅꢀꢂꢉ ꢀꢅꢁꢅ
ꢊꢀꢄ
ꢊꢀꢃ
ꢀꢈꢉꢈ
"3#
ꢄꢀꢆ
ꢀꢅꢆꢂ
ꢇꢀꢈꢅ
-AX
3%!4).'
0,!.%
ꢀꢅꢅꢈ
ꢀꢅꢅꢄ
ꢅꢀꢅꢉ
ꢅꢀꢇꢉ
ꢀꢅꢅꢂ
ꢀꢅꢇꢈ
ꢅꢀꢇꢊ
ꢅꢀꢁꢅ
ꢀꢅꢈꢉꢄ
"3#
ꢅꢀꢄꢉ
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2335 • www.pericom.com
Note:
1. Package Outline Exclusive of Mold Flash and Metal Burr
2. Controlling dimentions in millimeters
3. Ref: JEDEC MO-153F/AE
$%3#2)04)/.ꢀ ꢁꢂꢃ0INꢄ ꢅꢆꢇꢃ-IL 7IDEꢄ433/0
0!#+!'% #/$%ꢀ ,
(1-3)
Ordering Information
Ordering Code
PI6C20400HE
PI6C20400LE
Package Code
Package Description
HE
LE
28-pin, 209-mil wide, SSOP, Pb-Free and Green
28-pin, 173-mil wide, TSSOP, Pb-Free and Green
Notes:
1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
2. E = Pb-free and Green
3. Adding an X suffix = Tape/Reel
Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com
08-0298
PS8744C
11/13/08
10
相关型号：
PI6C20800BAE
PLL Based Clock Driver, 6C Series, 8 True Output(s), 0 Inverted Output(s), PDSO48, TSSOP-48
DIODES
PI6C20800BAEX
PLL Based Clock Driver, 6C Series, 8 True Output(s), 0 Inverted Output(s), PDSO48, 0.240 INCH, GREEN, MO-153FE, TSSOP-48
PERICOM
PI6C20800BIAEX
Clock Driver, 6C Series, 8 True Output(s), 0 Inverted Output(s), PDSO48, 0.240 INCH, GREEN, MO-153FE, TSSOP-48
DIODES
PI6C20800SAEX
PLL Based Clock Driver, 6C Series, 16 True Output(s), 0 Inverted Output(s), PDSO48, 0.240 INCH, GREEN, MO-153ED, TSSOP-48
PERICOM
PI6C20800SAEX
PLL Based Clock Driver, 6C Series, 16 True Output(s), 0 Inverted Output(s), PDSO48, 0.240 INCH, GREEN, MO-153ED, TSSOP-48
DIODES
©2020 ICPDF网 联系我们和版权申明