NTD32N06LT4 [ONSEMI]

Power MOSFET 32 Amps, 60 Volts, Logic Level(N−Channel DPAK); 功率MOSFET 32安培, 60伏特,逻辑电平( N沟道DPAK )
NTD32N06LT4
型号: NTD32N06LT4
厂家: ONSEMI    ONSEMI
描述:

Power MOSFET 32 Amps, 60 Volts, Logic Level(N−Channel DPAK)
功率MOSFET 32安培, 60伏特,逻辑电平( N沟道DPAK )

晶体 晶体管 开关 脉冲
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NTD32N06L  
Power MOSFET  
32 Amps, 60 Volts, Logic Level  
N−Channel DPAK  
Designed for low voltage, high speed switching applications in  
power supplies, converters and power motor controls and bridge  
circuits.  
http://onsemi.com  
Features  
V
R
TYP  
I MAX  
D
DSS  
DS(ON)  
Smaller Package than MTB30N06VL  
Lower R  
60 V  
23.7 mW  
32 A  
, V  
, and Total Gate Charge  
DS(on)  
DS(on)  
Lower and Tighter V  
Lower Diode Reverse Recovery Time  
Lower Reverse Recovery Stored Charge  
SD  
N−Channel  
D
Typical Applications  
Power Supplies  
Converters  
Power Motor Controls  
Bridge Circuits  
G
4
S
MARKING DIAGRAMS  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
4
Rating  
Symbol Value Unit  
Drain  
2
3
1
Drain−to−Source Voltage  
V
V
60  
60  
Vdc  
Vdc  
Vdc  
DSS  
Drain−to−Gate Voltage (R = 10 MW)  
DPAK  
GS  
DGR  
CASE 369C  
(Surface Mount)  
Style 2  
Gate−to−Source Voltage  
− Continuous  
V
V
"20  
"30  
GS  
GS  
− Non−Repetitive (t v10 ms)  
p
2
Drain Current  
− Continuous @ T = 25°C  
1
Gate  
3
4
Drain  
I
I
32  
22  
90  
Adc  
D
D
Source  
A
− Continuous @ T = 100°C  
A
4
I
Apk  
W
DM  
− Single Pulse (t v10 ms)  
p
Drain  
Total Power Dissipation @ T = 25°C  
P
93.75  
A
D
0.625 W/°C  
1
2
3
Derate above 25°C  
Total Power Dissipation @ T = 25°C (Note 1)  
Total Power Dissipation @ T = 25°C (Note 2)  
2.88  
1.5  
W
W
A
A
DPAK  
CASE 369D  
(Straight Lead)  
Style 2  
Operating and Storage Temperature Range  
T , T  
55 to  
+175  
°C  
J
stg  
Single Pulse Drain−to−Source Avalanche  
E
AS  
313  
mJ  
Energy − Starting T = 25°C (Note 3)  
J
1
2
3
32N06L  
Y
WW  
Device Code  
= Year  
= Work Week  
(V = 50 Vdc, V = 5 Vdc, L = 1.0 mH,  
DD  
GS  
Gate Drain Source  
I
= 25 A, V = 60 Vdc, R = 25 W)  
DS G  
L(pk)  
Thermal Resistance  
− Junction−to−Case  
°C/W  
°C  
R
R
R
1.6  
52  
100  
q
JC  
JA  
JA  
ORDERING INFORMATION  
q
q
− Junction−to−Ambient (Note 1)  
− Junction−to−Ambient (Note 2)  
Device  
Package  
Shipping  
Maximum Lead Temperature for Soldering  
Purposes, 1/8from case for 10 seconds  
T
260  
L
NTD32N06L  
DPAK  
75 Units/Rail  
DPAK  
Straight Lead  
Maximum ratings are those values beyond which device damage can occur.  
Maximum ratings applied to the device are individual stress limit values (not  
normal operating conditions) and are not valid simultaneously. If these limits  
are exceeded, device functional operation is not implied, damage may occur  
and reliability may be affected.  
NTD32N06L−1  
75 Units/Rail  
NTD32N06LT4  
DPAK  
2500/Tape & Reel  
1. When surface mounted to FR4 board using 0.5pad size.  
2. When surface mounted to FR4 board using minimum recommended pad  
size.  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
3. Repetitive rating; pulse width limited by maximum junction temperature.  
Semiconductor Components Industries, LLC, 2004  
1
Publication Order Number:  
April, 2004 − Rev. 3  
NTD32N06L/D  
 
NTD32N06L  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
J
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Drain−to−Source Breakdown Voltage (Note 4)  
V
Vdc  
mV/°C  
mAdc  
(BR)DSS  
(V = 0 Vdc, I = 250 mAdc)  
60  
70  
62  
GS  
D
Temperature Coefficient (Positive)  
Zero Gate Voltage Drain Current  
I
DSS  
(V = 60 Vdc, V = 0 Vdc)  
1.0  
10  
DS  
GS  
(V = 60 Vdc, V = 0 Vdc, T = 150°C)  
DS  
GS  
J
Gate−Body Leakage Current (V = ±20 Vdc, V = 0 Vdc)  
I
±100  
nAdc  
GS  
ON CHARACTERISTICS (Note 4)  
Gate Threshold Voltage (Note 4)  
DS  
GSS  
V
GS(th)  
Vdc  
mV/°C  
mW  
(V = V , I = 250 mAdc)  
1.0  
1.7  
4.8  
2.0  
DS  
GS  
D
Threshold Temperature Coefficient (Negative)  
Static Drain−to−Source On−Resistance (Note 4)  
R
V
DS(on)  
(V = 5 Vdc, I = 16 Adc)  
23.7  
28  
GS  
D
Static Drain−to−Source On−Resistance (Note 4)  
(V = 5 Vdc, I = 20 Adc)  
Vdc  
DS(on)  
0.48  
0.78  
0.61  
0.67  
GS  
D
(V = 5 Vdc, I = 32 Adc)  
GS  
D
(V = 5 Vdc, I = 16 Adc, T = 150°C)  
GS  
D
J
Forward Transconductance (Note 4) (V = 6 Vdc, I = 16 Adc)  
g
FS  
27  
mhos  
pF  
DS  
D
DYNAMIC CHARACTERISTICS  
Input Capacitance  
C
1214  
343  
87  
1700  
480  
iss  
(V = 25 Vdc, V = 0 Vdc,  
DS  
GS  
Output Capacitance  
Transfer Capacitance  
C
oss  
f = 1.0 MHz)  
C
180  
rss  
SWITCHING CHARACTERISTICS (Note 5)  
Turn−On Delay Time  
t
12.8  
221  
37  
30  
450  
80  
260  
50  
ns  
d(on)  
(V = 30 Vdc, I = 32 Adc,  
Rise Time  
t
r
DD  
D
V
= 5 Vdc,  
GS  
Turn−Off Delay Time  
Fall Time  
t
d(off)  
R
= 9.1 W) (Note 4)  
G
t
f
128  
23  
Gate Charge  
Q
T
Q
1
Q
2
nC  
(V = 48 Vdc, I = 32 Adc,  
DS  
D
4.5  
14  
V
GS  
= 5 Vdc) (Note 4)  
SOURCE−DRAIN DIODE CHARACTERISTICS  
Forward On−Voltage  
(I = 20 Adc, V = 0 Vdc) (Note 4)  
V
SD  
0.89  
0.95  
0.74  
1.0  
Vdc  
ns  
S
GS  
(I = 32 Adc, V = 0 Vdc) (Note 4)  
S
GS  
(I = 20 Adc, V = 0 Vdc, T = 150°C)  
S
GS  
J
Reverse Recovery Time  
t
rr  
56  
31  
(I = 32 Adc, V = 0 Vdc,  
S
GS  
t
a
dI /dt = 100 A/ms) (Note 4)  
S
t
b
25  
Reverse Recovery Stored Charge  
Q
0.093  
mC  
RR  
4. Pulse Test: Pulse Width 300 ms, Duty Cycle 2%.  
5. Switching characteristics are independent of operating junction temperatures.  
http://onsemi.com  
2
 
NTD32N06L  
60  
50  
40  
30  
20  
10  
0
60  
V
= 10 V  
V
> = 10 V  
GS  
DS  
V
= 4.5 V  
GS  
50  
40  
30  
20  
10  
0
V
V
= 5 V  
GS  
V
= 4 V  
GS  
= 6 V  
= 8 V  
GS  
V
GS  
= 3.5 V  
= 3 V  
V
GS  
T = 25°C  
J
V
GS  
T = 100°C  
J
T = −55°C  
J
0
1
2
3
4
1.8  
2.2  
2.6  
, GATE−TO−SOURCE VOLTAGE (VOLTS)  
GS  
3
3.4  
3.8  
4.2  
4.6  
5
V
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)  
V
DS  
Figure 1. On−Region Characteristics  
Figure 2. Transfer Characteristics  
0.042  
0.042  
0.038  
0.034  
0.03  
V
GS  
= 5 V  
V
GS  
= 10 V  
0.038  
0.034  
0.03  
T = 100°C  
J
T = 25°C  
J
T = 100°C  
J
0.026  
0.022  
0.018  
0.026  
0.022  
0.018  
0.014  
0.01  
T = 25°C  
J
T = −55°C  
J
T = −55°C  
J
0.014  
0.01  
0
10  
20  
30  
40  
50  
60  
0
10  
20  
30  
40  
50  
60  
I , DRAIN CURRENT (AMPS)  
D
I , DRAIN CURRENT (AMPS)  
D
Figure 3. On−Resistance vs. Drain Current  
Figure 4. On−Resistance vs. Drain Current  
10000  
1000  
100  
1.8  
1.6  
V
GS  
= 0 V  
I
V
= 16 A  
= 5 V  
D
T = 150°C  
J
GS  
1.4  
1.2  
1
T = 125°C  
J
T = 100°C  
J
0.8  
10  
0.6  
−50 −25  
0
25  
50  
75 100 125 150 175  
0
10  
20  
30  
40  
50  
60  
T , JUNCTION TEMPERATURE (°C)  
J
V
DS  
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)  
Figure 5. On−Resistance Variation with  
Temperature  
Figure 6. Drain−to−Source Leakage Current  
vs. Voltage  
http://onsemi.com  
3
NTD32N06L  
6
4000  
3600  
3200  
2800  
2400  
2000  
1600  
1200  
800  
V
= 0 V  
V
= 0 V  
T = 25°C  
DS  
GS  
J
Q
T
5
4
3
2
1
0
V
GS  
C
C
iss  
rss  
Q
Q
2
1
C
iss  
C
C
oss  
I
D
= 32 A  
400  
T = 25°C  
J
rss  
0
10  
V
GS  
V
DS  
5
0
5
10  
15  
20  
25  
0
4
8
12  
16  
20  
24  
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE  
(VOLTS)  
Q , TOTAL GATE CHARGE (nC)  
g
Figure 7. Capacitance Variation  
Figure 8. Gate−to−Source and  
Drain−to−Source Voltage vs. Total Charge  
1000  
32  
V
I
= 30 V  
= 32 A  
= 5 V  
DS  
V
GS  
= 0 V  
28  
24  
20  
16  
D
T = 25°C  
J
V
GS  
t
t
r
f
100  
12  
8
t
d(off)  
4
t
d(on)  
10  
0
1
10  
R , GATE RESISTANCE (W)  
100  
0.6 0.64 0.68 0.72 0.76 0.8 0.84 0.88 0.92 0.96  
V
SD  
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)  
G
Figure 9. Resistive Switching Time Variation  
vs. Gate Resistance  
Figure 10. Diode Forward Voltage vs. Current  
1000  
350  
V
GS  
= 20 V  
R
Limit  
DS(on)  
I
D
= 32 A  
SINGLE PULSE  
= 25°C  
Thermal Limit  
Package Limit  
300  
250  
200  
150  
100  
50  
T
C
100  
10  
1
dc  
10 ms  
1 ms  
100 ms  
Mounted on 3sq. FR4 board (1sq.  
2 oz. Cu 0.06thick single sided)  
with one die operating,10 s max  
0.1  
0
0.1  
1
10  
100  
25  
50  
75  
100  
125  
150  
175  
V
DS  
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)  
T , STARTING JUNCTION TEMPERATURE (°C)  
J
Figure 11. Maximum Rated Forward Biased  
Safe Operating Area  
Figure 12. Maximum Avalanche Energy vs.  
Starting Junction Temperature  
http://onsemi.com  
4
NTD32N06L  
10  
Normalized to R  
at Steady State  
q
JC  
1
0.1  
0.01  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
10  
t, TIME (s)  
Figure 13. Thermal Response  
10  
Normalized to R  
1square Cu Pad, Cu Area 1.127 in ,  
at Steady State,  
q
JA  
2
3 x 3 inch FR4 board  
1
0.1  
0.01  
0.00001  
0.0001  
0.001  
0.01  
0.1  
t, TIME (s)  
1
10  
100  
1000  
Figure 14. Thermal Response  
http://onsemi.com  
5
NTD32N06L  
PACKAGE DIMENSIONS  
DPAK−3  
CASE 369C−01  
ISSUE O  
SEATING  
PLANE  
−T−  
C
B
R
INCHES  
DIM MIN MAX  
MILLIMETERS  
E
V
MIN  
5.97  
6.35  
2.19  
0.69  
0.46  
0.94  
MAX  
6.22  
6.73  
2.38  
0.88  
0.58  
1.14  
A
B
C
D
E
F
G
H
J
0.235 0.245  
0.250 0.265  
0.086 0.094  
0.027 0.035  
0.018 0.023  
0.037 0.045  
0.180 BSC  
0.034 0.040  
0.018 0.023  
0.102 0.114  
0.090 BSC  
4
2
Z
A
K
S
1
3
4.58 BSC  
U
0.87  
0.46  
2.60  
1.01  
0.58  
2.89  
K
L
2.29 BSC  
F
J
R
S
U
V
Z
0.180 0.215  
0.025 0.040  
4.57  
0.63  
0.51  
0.89  
3.93  
5.45  
1.01  
−−−  
1.27  
−−−  
L
H
0.020  
0.035 0.050  
0.155 −−−  
−−−  
D 2 PL  
M
STYLE 2:  
PIN 1. GATE  
2. DRAIN  
G
0.13 (0.005)  
T
3. SOURCE  
4. DRAIN  
SOLDERING FOOTPRINT  
6.20  
3.0  
0.244  
0.118  
2.58  
0.101  
5.80  
0.228  
1.6  
0.063  
6.172  
0.243  
mm  
inches  
ǒ
Ǔ
SCALE 3:1  
http://onsemi.com  
6
NTD32N06L  
PACKAGE DIMENSIONS  
DPAK−3  
CASE 369D−01  
ISSUE B  
C
B
R
NOTES:  
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
V
S
E
INCHES  
DIM MIN MAX  
MILLIMETERS  
4
2
MIN  
5.97  
6.35  
2.19  
0.69  
0.46  
0.94  
MAX  
6.35  
6.73  
2.38  
0.88  
0.58  
1.14  
Z
A
B
C
D
E
F
G
H
J
K
R
S
V
Z
0.235 0.245  
0.250 0.265  
0.086 0.094  
0.027 0.035  
0.018 0.023  
0.037 0.045  
0.090 BSC  
0.034 0.040  
0.018 0.023  
0.350 0.380  
0.180 0.215  
0.025 0.040  
0.035 0.050  
A
K
1
3
−T−  
SEATING  
PLANE  
2.29 BSC  
0.87  
0.46  
8.89  
4.45  
0.63  
0.89  
3.93  
1.01  
0.58  
9.65  
5.45  
1.01  
1.27  
−−−  
J
F
H
0.155  
−−−  
D 3 PL  
STYLE 2:  
G
M
PIN 1. GATE  
0.13 (0.005)  
T
2. DRAIN  
3. SOURCE  
4. DRAIN  
http://onsemi.com  
7
NTD32N06L  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
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NTD32N06L/D  

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