NTB25P06T4 [ONSEMI]

Power MOSFET −60 V, −27.5 A, P−Channel D2PAK; 功率MOSFET -60 V, -27.5 A, P沟道D2PAK
NTB25P06T4
型号: NTB25P06T4
厂家: ONSEMI    ONSEMI
描述:

Power MOSFET −60 V, −27.5 A, P−Channel D2PAK
功率MOSFET -60 V, -27.5 A, P沟道D2PAK

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NTB25P06  
Power MOSFET  
−60 V, 27.5 A, P−Channel D2PAK  
Designed for low voltage, high speed switching applications and to  
withstand high energy in the avalanche and commutation modes.  
Features  
http://onsemi.com  
Pb−Free Packages are Available  
V
R
TYP  
I MAX  
D
(BR)DSS  
DS(on)  
Typical Applications  
PWM Motor Controls  
Power Supplies  
Converters  
−60 V  
65 mW @ −10 V  
−27.5 A  
P−Channel  
Bridge Circuits  
D
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Rating  
Symbol Value  
Unit  
G
Drain−to−Source Voltage  
V
DSS  
−60  
V
Gate−to−Source Voltage  
− Continuous  
S
V
"15  
"20  
V
Vpk  
GS  
− Non−Repetitive (t v10 ms)  
V
GSM  
p
MARKING DIAGRAM  
& PIN ASSIGNMENT  
Drain  
Drain Current  
− Continuous @ T = 25°C  
4
I
27.5  
80  
A
Apk  
A
D
− Single Pulse (t v10 ms)  
I
p
DM  
2
3
Total Power Dissipation @ T = 25°C  
P
120  
W
1
A
D
Operating and Storage  
Temperature Range  
T , T  
J
55 to  
+175  
°C  
stg  
NTB25P06  
YWW  
2
D PAK  
CASE 418B  
STYLE 2  
Single Pulse Drain−to−Source Avalanche  
E
AS  
600  
mJ  
°C/W  
°C  
Energy − Starting T = 25°C  
J
Drain  
(V = 25 V, V = 10 V,  
DD  
GS  
I
= 20 A, L = 3 mH, R = 25 W)  
G
L(pk)  
Gate  
NTB25P06 = Device Code  
Source  
Thermal Resistance  
− Junction−to−Case  
R
R
R
1.25  
46.8  
63.2  
q
JC  
JA  
JA  
Y
WW  
= Year  
− Junction−to−Ambient (Note 1)  
− Junction−to−Ambient (Note 2)  
q
q
= Work Week  
Maximum Lead Temperature for Soldering  
T
260  
L
Purposes, (1/8from case for 10 s)  
ORDERING INFORMATION  
Maximum ratings are those values beyond which device damage can occur.  
Maximum ratings applied to the device are individual stress limit values (not  
normal operating conditions) and are not valid simultaneously. If these limits are  
exceeded, device functional operation is not implied, damage may occur and  
reliability may be affected.  
Device  
Package  
Shipping  
2
NTB25P06  
D PAK  
50 Units/Rail  
50 Units/Rail  
2
NTB25P06G  
D PAK  
1. When surface mounted to an FR4 board using 1pad size  
(Pb−Free)  
2
(Cu Area 1.127 in ).  
2
2. When surface mounted to an FR4 board using the minimum recommended  
NTB25P06T4  
D PAK  
800/Tape & Reel  
800/Tape & Reel  
2
pad size (Cu Area 0.412 in ).  
2
NTB25P06T4G  
D PAK  
(Pb−Free)  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
Semiconductor Components Industries, LLC, 2004  
1
Publication Order Number:  
August, 2004 − Rev. 2  
NTB25P06/D  
 
NTB25P06  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
C
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Drain−to−Source Breakdown Voltage (Note 3)  
(V = 0 V, I = −250 mA)  
V
V
(BR)DSS  
−60  
64  
GS  
D
mV/°C  
mA  
(Positive Temperature Coefficient)  
Zero Gate Voltage Drain Current  
I
DSS  
(V = 0 V, V = −60 V, T = 25°C)  
−10  
−100  
GS  
DS  
J
(V = 0 V, V = −60 V, , T = 150°C)  
GS  
DS  
J
Gate−Body Leakage Current (V = ±15 V, V = 0 V)  
I
±100  
nA  
GS  
DS  
GSS  
ON CHARACTERISTICS (Note 3)  
Gate Threshold Voltage  
(V = V = −250 mA)  
V
V
mV/°C  
W
GS(th)  
I
GS, D  
−2.0  
−2.8  
6.2  
−4.0  
DS  
(Negative Threshold Temperature Coefficient)  
Static Drain−Source On−State Resistance  
R
DS(on)  
(V = −10 V, I = 12.5 A)  
0.065  
0.070  
0.075  
0.082  
GS  
D
(V = −10 V, I = 25 A)  
GS  
D
Forward Transconductance  
(V = −10 V, I = 12.5 A)  
gFS  
Mhos  
pF  
13  
DS  
D
DYNAMIC CHARACTERISTICS  
Input Capacitance  
C
1200  
345  
90  
1680  
480  
iss  
(V = −25 V, V = 0 V,  
DS  
GS  
Output Capacitance  
C
oss  
F = 1.0 MHz)  
Reverse Transfer Capacitance  
C
180  
rss  
SWITCHING CHARACTERISTICS (Notes 3 & 4)  
Turn−On Delay Time  
t
14  
72  
24  
118  
68  
320  
50  
ns  
ns  
ns  
ns  
nC  
d(on)  
Rise Time  
t
r
(V = −30 V, I = 25 A,  
DD  
D
V
GS  
= −10 V R = 9.1 W)  
G
Turn−Off Delay Time  
Fall Time  
t
43  
d(off)  
t
f
190  
33  
Gate Charge  
Q
T
Q
1
Q
2
(V = −48 V, I = 25 A,  
DS  
D
6.5  
15  
V
GS  
= −10 V)  
BODY−DRAIN DIODE RATINGS (Note 3)  
Diode Forward On−Voltage  
V
SD  
−1.8  
−1.4  
−2.5  
V
(I = −25 A, V = 0 V)  
S
GS  
(I = −25 A, V = 0 V, T = 150°C)  
S
GS  
J
Reverse Recovery Time  
t
70  
50  
20  
0.2  
ns  
rr  
(I = −25 A, V = 0 V,  
dI /dt = 100 A/ms)  
S
S
GS  
t
a
t
b
Reverse Recovery Stored Charge  
Q
mC  
RR  
3. Indicates Pulse Test: Pulse Width 300 ms, Duty Cycle 2%.  
4. Switching characteristics are independent of operating junction temperatures.  
http://onsemi.com  
2
 
NTB25P06  
50  
45  
50  
V
= −10 V  
T = 25°C  
GS  
V
DS  
10 V  
J
−7 V  
−8 V  
T = 25°C  
J
−9 V  
40  
35  
40  
30  
20  
30  
25  
T = −55°C  
J
−6 V  
T = 125°C  
J
−5.5 V  
−5 V  
20  
15  
10  
5
10  
0
−4.5 V  
−4.2 V  
0
0
2
4
6
8
10  
2
4
6
8
−V , DRAIN−TO−SOURCE VOLTAGE (VOLTS)  
DS  
−V , GATE−TO−SOURCE VOLTAGE (VOLTS)  
GS  
Figure 1. On−Region Characteristics  
Figure 2. Transfer Characteristics  
0.2  
0.15  
0.1  
0.095  
0.085  
V
GS  
= −10 V  
T = 25°C  
J
T = 125°C  
J
V
GS  
= −10 V  
T = 25°C  
J
0.075  
0.065  
T = −55°C  
V
GS  
= −15 V  
J
0.05  
0
0
10  
20  
30  
40  
50  
10  
20  
30  
40  
50  
−I , DRAIN CURRENT (AMPS)  
D
−I , DRAIN CURRENT (AMPS)  
D
Figure 3. On−Resistance vs. Drain Current and  
Temperature  
Figure 4. On−Resistance vs. Drain Current and  
Gate Voltage  
10000  
1000  
100  
1.75  
1.5  
1.25  
1
V
GS  
= 0 V  
I
V
= −25 A  
D
= −10 V  
GS  
T = 150°C  
J
T = 125°C  
J
0.75  
0.5  
10  
−50 −25  
0
25  
50  
75  
100 125  
150  
0
10  
20  
30  
40  
50  
60  
T , JUNCTION TEMPERATURE (°C)  
J
−V , DRAIN−TO−SOURCE VOLTAGE (VOLTS)  
DS  
Figure 5. On−Resistance Variation with  
Temperature  
Figure 6. Drain−to−Source Leakage Current  
vs. Voltage  
http://onsemi.com  
3
NTB25P06  
3000  
2500  
2000  
1500  
1000  
10  
Q
V
= 0 V  
V
= 0 V  
T
T = 25°C  
DS  
GS  
J
V
DS  
C
8
6
4
2
0
iss  
V
GS  
Q
Q
1
2
C
rss  
C
C
iss  
oss  
500  
0
I
D
= −25 A  
C
rss  
T = 25°C  
J
−V  
GS  
−V  
DS  
10  
5
0
5
10  
15  
20  
25  
0
4
10  
15  
20  
25  
30  
35  
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE  
(VOLTS)  
Q , TOTAL GATE CHARGE (nC)  
g
Figure 7. Capacitance Variation  
Figure 8. Gate−to−Source and  
Drain−to−Source Voltage vs. Total Charge  
1000  
100  
10  
25  
20  
15  
10  
5
V
= 0 V  
GS  
T = 25°C  
J
t
t
r
f
t
d(off)  
t
d(on)  
V
DD  
= −30 V  
I
D
= −25 A  
V
= −10 V  
GS  
1
0
1
10  
R , GATE RESISTANCE (W)  
100  
0
0.25  
0.5  
0.75  
1
1.25  
1.5  
1.75  
−V , SOURCE−TO−DRAIN VOLTAGE (VOLTS)  
SD  
G
Figure 9. Resistive Switching Time Variation  
vs. Gate Resistance  
Figure 10. Diode Forward Voltage vs. Current  
1000  
600  
V
GS  
= −20 V  
I
D
= −25 A  
SINGLE PULSE  
= 25°C  
500  
400  
T
C
100  
10  
dc  
300  
200  
100  
0
10 ms  
1 ms  
100 ms  
1
R
Limit  
DS(on)  
Thermal Limit  
Package Limit  
0.1  
0.1  
1
10  
100  
25  
50  
75  
100  
125  
150  
−V , DRAIN−TO−SOURCE VOLTAGE (VOLTS)  
DS  
T , STARTING JUNCTION TEMPERATURE (°C)  
J
Figure 11. Maximum Rated Forward Biased  
Safe Operating Area  
Figure 12. Maximum Avalanche Energy vs.  
Starting Junction Temperature  
http://onsemi.com  
4
NTB25P06  
PACKAGE DIMENSIONS  
D2PAK  
CASE 418B−04  
ISSUE H  
C
NOTES:  
1. DIMENSIONING AND TOLERANCING  
PER ANSI Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
3. 418B−01 THRU 418B−03 OBSOLETE,  
NEW STANDARD 418B−04.  
E
V
W
−B−  
4
INCHES  
DIM MIN MAX  
MILLIMETERS  
MIN  
MAX  
A
B
C
D
E
F
G
H
J
0.340 0.380  
0.380 0.405  
0.160 0.190  
0.020 0.035  
0.045 0.055  
0.310 0.350  
0.100 BSC  
8.64  
9.65 10.29  
4.06  
0.51  
1.14  
7.87  
9.65  
A
S
1
2
3
4.83  
0.89  
1.40  
8.89  
−T−  
SEATING  
PLANE  
K
2.54 BSC  
W
0.080  
0.018 0.025  
0.090 0.110  
0.110  
2.03  
0.46  
2.29  
1.32  
7.11  
5.00 REF  
2.00 REF  
0.99 REF  
2.79  
0.64  
2.79  
1.83  
8.13  
J
G
K
L
H
0.052 0.072  
0.280 0.320  
0.197 REF  
0.079 REF  
0.039 REF  
D 3 PL  
M
N
P
R
S
V
M
M
0.13 (0.005)  
T
B
0.575 0.625 14.60 15.88  
0.045 0.055 1.14 1.40  
VARIABLE  
CONFIGURATION  
ZONE  
N
P
STYLE 2:  
PIN 1. GATE  
R
U
2. DRAIN  
3. SOURCE  
4. DRAIN  
L
L
L
M
M
M
F
F
F
VIEW W−W  
1
VIEW W−W  
2
VIEW W−W  
3
SOLDERING FOOTPRINT*  
8.38  
0.33  
1.016  
0.04  
10.66  
0.42  
5.08  
0.20  
3.05  
0.12  
17.02  
0.67  
mm  
inches  
ǒ
Ǔ
SCALE 3:1  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
http://onsemi.com  
5
NTB25P06  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
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Order Literature: http://www.onsemi.com/litorder  
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Phone: 81−3−5773−3850  
For additional information, please contact your  
local Sales Representative.  
NTB25P06/D  

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