NSBC144WPDP6 [ONSEMI]
Complementary Bias Resistor Transistors R1 = 47 k, R2 = 22 k; 互补偏置电阻晶体管R1 = 47千欧， R2 = 22 K·
| 型号： | NSBC144WPDP6 |
| 厂家： | 
ONSEMI |
| 描述： | Complementary Bias Resistor Transistors R1 = 47 k, R2 = 22 k |
| 文件： | 总6页 (文件大小：134K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NSBC144WPDP6
Complementary Bias
Resistor Transistors
R1 = 47 kW, R2 = 22 kW
NPN and PNP Transistors with Monolithic
Bias Resistor Network
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PIN CONNECTIONS
(2)
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base-emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
(3)
(1)
R
1
R
2
Q
1
Q
2
Features
R
2
R
1
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
(4)
(5)
(6)
S and NSV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable
MARKING DIAGRAMS
This Device is Pb-Free, Halogen Free/BFR Free and is RoHS
Compliant
SOT−963
CASE 527AD
M G
G
1
MAXIMUM RATINGS
(T = 25C both polarities Q (PNP) & Q (NPN), unless otherwise noted)
A
1
2
T
M
G
=
=
=
Specific Device Code
Date Code*
Pb-Free Package
Rating
Symbol
Max
50
Unit
Vdc
Collector-Base Voltage
Collector-Emitter Voltage
V
CBO
CEO
(Note: Microdot may be in either location)
V
50
Vdc
*Date Code orientation may vary depending
upon manufacturing location.
Collector Current − Continuous
Input Forward Voltage
I
100
40
mAdc
Vdc
C
V
IN(fwd)
Input Reverse Voltage
V
IN(rev)
10
Vdc
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
†
Device
Package
Shipping
NSBC144WPDP6T5G
SOT−963
8,000/Tape & Reel
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Semiconductor Components Industries, LLC, 2012
1
Publication Order Number:
September, 2012 − Rev. 0
DTC144WP/D
NSBC144WPDP6
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
NSBC144WPDP6 (SOT−963) ONE JUNCTION HEATED
Total Device Dissipation
P
D
T = 25C
(Note 1)
231
269
1.9
2.2
MW
A
(Note 2)
(Note 1)
(Note 2)
Derate above 25C
mW/C
Thermal Resistance,
Junction to Ambient
R
C/W
q
JA
(Note 1)
(Note 2)
540
464
NSBC144WPDP6 (SOT−963) BOTH JUNCTION HEATED (Note 3)
Total Device Dissipation
P
D
T = 25C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
339
408
2.7
3.3
MW
A
Derate above 25C
mW/C
Thermal Resistance,
Junction to Ambient
R
C/W
C
q
JA
(Note 1)
(Note 2)
369
306
Junction and Storage Temperature Range
T , T
J
−55 to +150
stg
2
2
1. FR−4 @ 100 mm , 1 oz. copper traces, still air.
2. FR−4 @ 500 mm , 1 oz. copper traces, still air.
3. Both junction heated values assume total power is sum of two equally powered channels.
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2
NSBC144WPDP6
ELECTRICAL CHARACTERISTICS (T = 25C both polarities Q (PNP) & Q (NPN), unless otherwise noted)
A
1
2
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector-Base Cutoff Current
I
I
nAdc
nAdc
mAdc
Vdc
CBO
(V = 50 V, I = 0)
−
−
−
−
−
−
−
100
500
0.13
−
CB
E
Collector-Emitter Cutoff Current
(V = 50 V, I = 0)
CEO
CE
B
Emitter-Base Cutoff Current
(V = 6.0 V, I = 0)
I
EBO
−
EB
C
Collector-Base Breakdown Voltage
(I = 10 mA, I = 0)
V
V
(BR)CBO
(BR)CEO
50
50
C
E
Collector-Emitter Breakdown Voltage (Note 4)
(I = 2.0 mA, I = 0)
Vdc
−
C
B
ON CHARACTERISTICS
DC Current Gain (Note 4)
h
FE
(I = 5.0 mA, V = 10 V)
80
140
−
C
CE
Collector-Emitter Saturation Voltage (Note 4)
(I = 10 mA, I = 0.3 mA)
V
V
CE(sat)
−
−
0.25
C
B
Input Voltage (Off)
(V = 5.0 V, I = 100 mA) (NPN)
V
Vdc
i(off)
i(on)
−
−
1.7
1.7
−
−
CE
C
(V = 5.0 V, I = 100 mA) (PNP)
CE
C
Input Voltage (On)
(V = 0.2 V, I = 3.0 mA) (NPN)
V
Vdc
−
−
2.6
2.7
−
−
CE
C
(V = 0.2 V, I = 3.0 mA) (PNP)
CE
C
Output Voltage (On)
(V = 5.0 V, V = 4.0 V, R = 1.0 kW)
V
Vdc
Vdc
kW
OL
−
−
0.2
CC
B
L
Output Voltage (Off)
V
OH
(V = 5.0 V, V = 0.5 V, R = 1.0 kW)
4.9
32.9
1.7
−
−
CC
B
L
Input Resistor
Resistor Ratio
R1
R /R
47
2.1
61.1
2.6
1
2
4. Pulsed Condition: Pulse Width = 300 ms, Duty Cycle 2%.
250
200
(1)
150
2
(1) SOT−963; 100 mm , 1 oz. Copper Trace
100
50
0
−50 −25
0
25
50
75
100
125 150
AMBIENT TEMPERATURE (C)
Figure 1. Derating Curve
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3
NSBC144WPDP6
TYPICAL CHARACTERISTICS − NPN TRANSISTOR
NSBC144WPDP6
1
1000
I /I = 10
C
B
V
CE
= 10 V
25C
150C
−55C
25C
100
0.1
150C
−55C
10
1
0.01
0
10
20
30
40
50
0.1
1
10
100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 2. VCE(sat) vs. IC
Figure 3. DC Current Gain
2.4
2
100
10
f = 10 kHz
= 0 A
T = 25C
A
I
E
−55C
1.6
1.2
0.8
0.4
0
25C
1
0.1
150C
V
O
= 5 V
0.01
0
10
20
30
40
50
0
4
8
12
16
20
24
28
V , REVERSE VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 4. Output Capacitance
Figure 5. Output Current vs. Input Voltage
100
−55C
25C
10
150C
1
V
O
= 0.2 V
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 6. Input Voltage vs. Output Current
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4
NSBC144WPDP6
TYPICAL CHARACTERISTICS − PNP TRANSISTOR
NSBC144WPDP6
10
1
1000
I /I = 10
C
B
V
CE
= 10 V
150C
25C
100
−55C
150C
0.1
0.01
10
1
25C
−55C
10
0
20
30
40
50
0.1
1
10
100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 7. VCE(sat) vs. IC
Figure 8. DC Current Gain
7
6
5
4
3
2
1
0
100
10
f = 10 kHz
= 0 A
T = 25C
A
−55C
I
E
1
25C
0.1
150C
0.01
0.001
V
O
= 5 V
0
10
20
30
40
50
0
4
8
12
16
20
24
28
V , REVERSE VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 9. Output Capacitance
Figure 10. Output Current vs. Input Voltage
100
−55C
25C
10
150C
1
V
O
= 0.2 V
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 11. Input Voltage vs. Output Current
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5
NSBC144WPDP6
PACKAGE DIMENSIONS
SOT−963
CASE 527AD
ISSUE E
NOTES:
D
X
Y
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
A
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
6
5
4
3
H
E
E
1
2
MILLIMETERS
DIM MIN
NOM
0.37
0.15
0.12
1.00
0.80
0.35 BSC
1.00
0.19 REF
0.10
MAX
0.40
0.20
0.17
1.05
0.85
C
TOP VIEW
e
A
b
C
D
E
0.34
0.10
0.07
0.95
0.75
SIDE VIEW
6X
L
e
HE
0.95
0.05
1.05
0.15
L
L2
6X
b
6X
L2
0.08
X Y
BOTTOM VIEW
RECOMMENDED
MOUNTING FOOTPRINT*
6X
6X
0.35
0.20
PACKAGE
OUTLINE
1.20
0.35
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
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DTC144WP/D
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