NSB9435T1G_10 [ONSEMI]
High Current Bias Resistor Transistor; 高电流偏置电阻晶体管![NSB9435T1G_10](http://pdffile.icpdf.com/pdf1/p00146/img/icpdf/NSB94_809687_icpdf.jpg)
型号: | NSB9435T1G_10 |
厂家: | ![]() |
描述: | High Current Bias Resistor Transistor |
文件: | 总5页 (文件大小:108K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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NSB9435T1G
High Current Bias Resistor
Transistor
PNP Silicon
Features
http://onsemi.com
• Collector −Emitter Sustaining Voltage −
V
= 30 Vdc (Min) @ I = 10 mAdc
C
CEO(sus)
POWER BJT
• High DC Current Gain −
IC = 3.0 AMPERES
BVCEO = 30 VOLTS
CE(sat) = 0.275 VOLTS
h
FE
= 125 (Min) @ I = 0.8 Adc
C
= 90 (Min) @ I = 3.0 Adc
C
V
• Low Collector −Emitter Saturation Voltage −
V
CE(sat)
= 0.275 Vdc (Max) @ I = 1.2 Adc
C
COLLECTOR 2,4
= 0.55 Vdc (Max) @ I = 3.0 Adc
C
• SOT−223 Surface Mount Packaging
BASE
1
• ESD Rating − Human Body Model: Class 1B
− Machine Model: Class B
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
EMITTER 3
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
C
SOT−223
CASE 318E
STYLE 1
Rating
Symbol
Value
Unit
Collector−Emitter Voltage
V
CEO
30
Vdc
Collector−Base Voltage
Emitter−Base Voltage
V
45
6.0
1.0
Vdc
Vdc
Adc
Adc
CB
MARKING DIAGRAM
V
EB
Base Current − Continuous
I
B
AYW
9435R G
G
Collector Current − Continuous
− Peak
I
3.0
5.0
C
1
Total Power Dissipation @ T = 25_C
P
D
3.0
24
W
mW/_C
W
C
A
Y
W
= Assembly Location
= Year
= Work Week
Derate above 25_C
1.56
Total P @ T = 25_C mounted on 1″ sq.
D
A
(645 sq. mm) Collector pad on FR−4 bd
material
9435R = Device Code
G
= Pb−Free Package
0.72
W
Total P @ T = 25_C mounted on 0.012″
D
A
sq. (7.6 sq. mm) Collector pad on FR−4 bd
(Note: Microdot may be in either location)
material
ORDERING INFORMATION
Operating and Storage Junction
Temperature Range
T , T
–55 to
+150
_C
J
stg
†
Device
Package
Shipping
NSB9435T1G
SOT−223
(Pb−Free)
1000/Tape & Reel
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2010
1
Publication Order Number:
September, 2010 − Rev. 6
NSB9435T1/D
NSB9435T1G
THERMAL CHARACTERISTICS
Characteristic
Symbol
Value
Unit
Thermal Resistance
_C/W
Junction−to−Case
R
42
80
174
q
JC
JA
JA
Junction−to−Ambient on 1″ sq.(645 sq. mm) Collector pad on FR−4 board material
Junction−to−Ambient on 0.012″ sq. (7.6 sq. mm) Collector pad on FR−4 board material
R
q
R
q
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 5 s
T
L
260
_C
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristics
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage
V
Vdc
Vdc
CEO(sus)
(I = 10 mAdc, I = 0 Adc)
30
−
−
−
−
C
B
Emitter−Base Voltage
(I = 50 mAdc, I = 0 Adc)
V
EBO
6.0
E
C
Collector Cutoff Current
(V = 25 Vdc)
I
mAdc
CER
−
−
−
−
20
200
CE
(V = 25 Vdc, T = 125°C)
CE
J
Emitter Cutoff Current
I
mAdc
EBO
(V = 5.0 Vdc)
−
−
700
BE
ON CHARACTERISTICS (Note 1)
Collector−Emitter Saturation Voltage
V
V
Vdc
CE(sat)
(I = 0.8 Adc, I = 20 mAdc)
−
−
−
0.155 0.210
C
B
(I = 1.2 Adc, I = 20 mAdc)
−
−
0.275
0.550
C
B
(I = 3.0 Adc, I = 0.3 Adc)
C
B
Base−Emitter Saturation Voltage
(I = 3.0 Adc, I = 0.3 Adc)
Vdc
Vdc
−
BE(sat)
−
−
−
−
1.25
1.10
C
B
Base−Emitter On Voltage
V
BE(on)
(I = 1.2 Adc, V = 4.0 Vdc)
C
CE
DC Current Gain
h
FE
(I = 0.8 Adc, V = 1.0 Vdc)
125
110
90
220
−
−
−
−
−
C
CE
(I = 1.2 Adc, V = 1.0 Vdc)
C
CE
(I = 3.0 Adc, V = 1.0 Vdc)
C
CE
Resistor
R1
7.5
10
12.5
kW
DYNAMIC CHARACTERISTICS
Output Capacitance
C
pF
pF
ob
(V = 10 Vdc, I = 0 Adc, f = 1.0 MHz)
−
−
−
100
135
110
150
−
CB
E
Input Capacitance
C
ib
(V = 8.0 Vdc)
EB
Current−Gain − Bandwidth Product (Note 2)
(I = 500 mA, V = 10 V, F = 1.0 MHz)
f
T
MHz
−
C
CE
test
1. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
2. f = |h | S f
T
FE
test
http://onsemi.com
2
NSB9435T1G
0.3
1000
0.25
0.2
I
C
= 3.0 A
T = 150°C
A
25°C
0.15
0.1
100
10
−55°C
1.2 A
0.8 A
0.5 A
0.25 A
0.05
0
V
CE
= 1.0 V
0.001
0.01
0.1
1
0.1
1
10
I , BASE CURRENT (mA)
B
I , COLLECTOR CURRENT (A)
C
Figure 1. Collector Saturation Region
Figure 2. DC Current Gain
1000
10
1
T = 150°C
A
V
BE(sat)
25°C
100
10
−55°C
V
CE(sat)
0.1
V
CE
= 4.0 V
I /I = 10
C B
0.01
0.1
1
10
1.0E−01
1.0E+00
1.0E+01
I , COLLECTOR CURRENT (A)
C
I , COLLECTOR CURRENT (A)
C
Figure 3. DC Current Gain
Figure 4. “ON” Voltages
1.0E+00
1.2
V
V
BE(sat)
1
−55°C
25°C
CE(sat)
0.8
0.6
0.4
T = 155°C
A
1.0E−01
1.0E−02
0.2
0
I /I = 50
C
B
1.0E−01
1.0E+00
1.0E+01
0.1
1
10
I , COLLECTOR CURRENT (A)
C
I , COLLECTOR CURRENT (A)
C
Figure 5. “ON” Voltages
Figure 6. VBE(on) Voltage
http://onsemi.com
3
NSB9435T1G
1000
100
10
0.5 ms
5.0 ms
1.0
0.1
100 ms
10
1
0.01
BONDING WIRE LIMIT
THERMAL LIMIT (Single Pulse)
SECONDARY BREAKDOWN LIMIT
f = 1 MHz
T = 25°C
A
0.001
0.1
1
10
100
0.1
1.0
, COLLECTOR−EMITTER VOLTAGE (VOLTS)
CE
10
100
V , REVERSE VOLTAGE (V)
V
R
Figure 7. Output Capacitance
Figure 8. Active Region Safe Operating Area
4.0
3.0
2.0
There are two limitations on the power handling ability of
a transistor: average junction temperature and secondary
breakdown. Safe operating area curves indicate I − V
C
CE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
T
C
The data of Figure 8 is based on T
variable depending on conditions. Secondary breakdown
= 150_C; T is
J(pk)
C
pulse limits are valid for duty cycles to 10% provided T
J(pk)
1.0
0
v 150_C. T
may be calculated from the data in
J(pk)
Figure 10. At high case temperatures, thermal limitations
will reduce the power that can be handled to values less than
the limitations imposed by secondary breakdown.
T
A
25
50
75
100
125
150
T, TEMPERATURE (°C)
Figure 9. Power Derating
1.0
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
P
(pk)
0.01
R
(t) = r(t) q
JA
q
JA
q
= 174°C/W
JA
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
SINGLE PULSE
0.001
t
1
0.001
t
1
2
T
- T = P q (t)
A (pk) JA
J(pk)
DUTY CYCLE, D = t /t
1 2
0.0001
0.0001
0.01
0.1
t, TIME (seconds)
1.0
10
100
1000
Figure 10. Thermal Response
http://onsemi.com
4
NSB9435T1G
PACKAGE DIMENSIONS
SOT−223 (TO−261)
CASE 318E−04
ISSUE N
D
b1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCH.
MILLIMETERS
INCHES
NOM
0.064
0.002
0.030
0.121
0.012
0.256
0.138
0.091
0.037
−−−
4
2
DIM
A
A1
b
b1
c
D
E
e
e1
L
L1
MIN
1.50
0.02
0.60
2.90
0.24
6.30
3.30
2.20
0.85
0.20
1.50
6.70
0°
NOM
1.63
0.06
0.75
3.06
0.29
6.50
3.50
2.30
0.94
−−−
1.75
7.00
−
MAX
MIN
0.060
0.001
0.024
0.115
0.009
0.249
0.130
0.087
0.033
0.008
0.060
0.264
0°
MAX
0.068
0.004
0.035
0.126
0.014
0.263
0.145
0.094
0.041
−−−
H
E
E
1.75
0.10
0.89
3.20
0.35
6.70
3.70
2.40
1.05
−−−
2.00
7.30
10°
1
3
b
e1
e
0.069
0.276
−
0.078
0.287
10°
C
q
H
E
A
q
0.08 (0003)
STYLE 1:
A1
PIN 1. BASE
2. COLLECTOR
3. EMITTER
L
L1
4. COLLECTOR
SOLDERING FOOTPRINT*
3.8
0.15
2.0
0.079
6.3
0.248
2.3
0.091
2.3
0.091
2.0
0.079
mm
inches
1.5
0.059
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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NSB9435T1/D
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