NCP362AMUTBG [ONSEMI]
USB Positive Overvoltage and Overcurrent Protection with TVS for VBUS and Low Capacitance ESD Diodes for Data; USB正过压和过流保护带电视的VBUS及低电容ESD二极管用于数据
| 型号： | NCP362AMUTBG |
| 厂家： | 
ONSEMI |
| 描述： | USB Positive Overvoltage and Overcurrent Protection with TVS for VBUS and Low Capacitance ESD Diodes for Data |
| 文件： | 总16页 (文件大小：723K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP362
USB Positive Overvoltage
and Overcurrent Protection
with TVS for VBUS and Low
Capacitance ESD Diodes for
Data
The NCP362 disconnects systems at its output when wrong VBUS
operating conditions are detected at its input. The system is positive
overvoltage protected up to +20 V, overcurrent protected up to
750 mA, and receives protection from ESD diodes for the high speed
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MARKING
DIAGRAMS
XXXM
G
UDFN10
CASE 517AV
USB data and V
lines. Thanks to an integrated PMOS FET, no
BUS
external device is necessary, reducing the system cost and the PCB
area of the application board.
XXX
M
G
= Specific Device Code
= Date Code
= Pb−Free Package
The NCP362 is able to instantaneously disconnect the output from
the input if the input voltage exceeds the overvoltage threshold
OVLO. Thanks to an overcurrent protection, the integrated PMOS
turns off when the charge current exceeds the current limit (see
options in ordering information).
The NCP362 provides a negative going flag (FLAG) output, which
alerts the system that voltage, current or overtemperature faults have
occurred.
PIN CONNECTIONS
1
EN
GND
IN
10 FLAG
PAD1
GND
9
8
7
6
OUT
GND
NC
2
3
4
5
In addition, the device integrates ESD diodes for V
and data
BUS
V
TVS
BUS
lines which are IEC61000−4−2, level 4 compliant. The ESD diodes
for D+ and D− are compatible with high speed USB thanks to an ultra
low capacitance of 0.5 pF.
PAD2
GND
GND
NC
NCP362A Version
+ OVP/OCP)
Features
(V
BUS TVS
• Overvoltage Protection up to 20 V
• Undervoltage and Overvoltage Lockout (UVLO/OVLO)
• Overcurrent Protection
1
EN
GND
IN
10 FLAG
PAD1
GND
9
8
7
6
OUT
GND
D+
2
3
4
5
• Transient Voltage Suppressor for V
Pin
BUS
• Ultra Low Capacitance ESD for Data Lines
• Alert FLAG Output and EN Enable Pin
• Thermal Shutdown
• Compliance to IEC61000−4−2 (Level 4)
• Compliance Machine Model and Human Body Model
• 10 Lead UDFN 2x2.5 mm Package
• This is a Pb−Free Device
Applications
• USB Devices
• Mobile Phones
• Peripheral
NC
PAD2
GND
GND
D−
NCP362B Version
(D+/− ESD low cap + OVP/OCP)
1
2
3
EN
10 FLAG
PAD1
GND
GND
IN
9
8
7
6
OUT
GND
D+
V
TVS
GND
4
5
BUS
PAD2
GND
D−
• Personal Digital Assistant
• MP3/MP4 Players
• TV and Set Top Boxes
NCP362C Version
+ D+/− ESD low cap + OVP/OCP)
(V
BUS TVS
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 15 of this data sheet.
©
Semiconductor Components Industries, LLC, 2009
1
Publication Order Number:
March, 2009 − Rev. 0
NCP362/D
NCP362
USB Connector
Bottom Connector
VIN/VBUS
VBUS
OUT
Pin 1
Battery Charger
System
D+
D−
ID
Pin 2
Pin 3
Pin 4
Soft
start
I limit
>550 mA
GND
Pin 5
VREF
Driver
OVLO
UVLO
Thermal
shutdown
Logic
VBUS TVS
FLAG
EN pin
GND
NCP362A
D+
USB Transciever
D−
Figure 1. Typical Application Circuit with Wall Adapter / VBUS TVS Protection (NCP362A)
USB Connector
VIN/VBUS
VBUS
OUT
Pin 1
Battery Charger
System
D+
D−
ID
Pin 2
Pin 3
Pin 4
Soft
start
I limit
>550 mA
GND
Pin 5
VREF
Driver
Logic
OVLO
UVLO
Thermal
shutdown
VBUS TVS
FLAG
EN pin
D+
D−
GND
NCP362C
D+
USB Transciever
D−
Figure 2. Typical Application Circuit with Full Integrated ESD for USB (NCP362C)
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2
NCP362
PIN FUNCTION DESCRIPTION
Pin No.
Name
Type
Description
1
EN
INPUT
Enable Pin. The device enters in shutdown mode when this pin is tied to a high level. In this case the
output is disconnected from the input. To allow normal functionality, the EN pin shall be connected to
GND or to a I/O pin. This pin does not have an impact on the fault detection.
2
3
GND
IN
POWER Ground
POWER Input Voltage Pin. This pin is connected to the V
must be connected between this pin and GND.
. A 1 mF low ESR ceramic capacitor, or larger,
BUS
4
V
BUS
TVS
INPUT
Cathode of the V
transient voltage suppressor diode. (NCP362A & NCP362C) This pin is not
BUS
connected in the NCP362B
5
6
7
8
9
GND
POWER Ground
D−
D+
INPUT
INPUT
Cathode of the D− ESD diode. (NCP362B & NCP362C) This pin is not connected in the NCP362A
Cathode of the D+ ESD diode. (NCP362B & NCP362C) This pin is not connected in the NCP362A
GND
OUT
POWER Ground
OUTPUT Output Voltage Pin. The output is disconnected from the V
power supply when the input voltage is
BUS
above OVLO threshold or below UVLO threshold. A 1 mF capacitor must be connected to this pin.
The two OUT pins must be hardwired to common supply.
10
FLAG
OUTPUT Fault Indication Pin. This pin allows an external system to detect a fault on V
pin. The FLAG pin
BUS
goes low when input voltage exceeds OVLO threshold. Since the FLAG pin is open drain functional-
ity, an external pull up resistor to V must be added.
CC
PAD1
PAD2
GND
GND
POWER Ground. Must be used for power dissipation. See PCB recommendations.
POWER Anode of the TVS and/or ESD diodes. Must be connected to GND.
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3
NCP362
MAXIMUM RATINGS
Rating
Symbol
Value
−0.3
Unit
V
MinimumVoltage to GND (Pins IN, EN, OUT, FLAG)
Maximum Voltage to GND (Pin IN)
Vmin
Vmax
21
V
in
Maximum Voltage to GND (Pins EN, OUT, FLAG)
Maximum DC Current from Vin to Vout (PMOS) (Note 1)
Thermal Resistance, Junction−to−Air
Vmax
Imax
R
7.0
V
600
mA
°C/W
°C
°C
°C
V
280
q
JA
Operating Ambient Temperature Range
Storage Temperature Range
T
A
−40 to +85
−65 to +150
150
T
stg
Junction Operating Temperature
T
J
Human Body Model (HBM) (Note 2)
Pins EN, IN, OUT, GND
2000
V
16000
BUS TVS
Machine Model (MM) (Note 3)
Pins EN, IN, OUT, GND
V
200
400
V
BUS TVS
IEC 61000−4−2
Pin V
Vesd
BUS TVS
Contact
Air
30
30
kV
kV
Pins D+ & D−
Contact
Air
10
15
kV
kV
Forward Voltage @ 10 mA
V
Pin V
Pins D+ & D−
1.1
1.0
BUS TVS
Moisture Sensitivity
MSL
Level 1
−
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
RecommendedOperating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. With minimum PCB area. By decreasing R , the current capability increases. See PCB recommendation page 9.
q
JA
2. Human Body Model, 100 pF discharged through a 1.5 kW resistor following specification JESD22/A114.
3. Machine Model, 200 pF discharged through all pins following specification JESD22/A115.
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NCP362
ELECTRICAL CHARACTERISTICS
(Min/Max limits values (−40°C < T < +85°C) and V = +5.0 V. Typical values are T = +25°C, unless otherwise noted.)
A
in
A
Characteristic
Symbol
Conditions
Min
1.2
Typ
Max
20
Unit
V
Input Voltage Range
V
in
Undervoltage Lockout Threshold
Uvervoltage Lockout Hysteresis
Overvoltage Lockout Threshold
Overvoltage Lockout Hysteresis
UVLO
UVLO
V
falls below UVLO threshold
rises above OVLO threshold
2.85
50
3.0
70
3.15
90
V
in
mV
V
hyst
OVLO
OVLO
V
in
5.43
50
5.675
100
150
750
20
5.9
125
200
950
35
mV
mV
mA
mA
mA
mA
mV
hyst
V
in
versus V Dopout
V
drop
V = 5 V, I charge = 500 mA
in
out
Overcurrent Limit
I
lim
V
in
= 5 V
550
Supply Quiescent Current
Standby Current
Idd
No Load, V = 5.25 V
in
I
V
in
= 5 V, EN = 1.2 V
26
37
std
Zero Gate Voltage Drain Current
FLAG Output Low Voltage
I
V
DS
= 20 V, V = 0 V
0.08
DSS
GS
Vol
V
in
> OVLO
400
flag
Sink 1 mA on FLAG pin
FLAG Leakage Current
EN Voltage High
FLAG
FLAG level = 5 V
5.0
nA
V
leak
V
ih
V
V
from 3.3 V to 5.5 V
from 3.3 V to 5.5 V
1.2
in
EN Voltage Low
V
il
0.55
V
in
EN Leakage Current
EN
EN = 5.5 V or GND
170
nA
leak
TIMINGS
Start Up Delay
t
From V > UVLO to V = 0.8xV , See Fig 3 & 9
4.0
3.0
0.7
15
ms
ms
ms
on
in
out
in
FLAG going up Delay
Output Turn Off Time
t
t
From V > UVLO to FLAG = 1.2 V, See Fig 3 & 10
in
start
t
off
From V > OVLO to V ≤ 0.3 V, See Fig 4 & 11
1.5
in
out
V
in
increasing from 5 V to 8 V at 3 V/ms.
Alert Delay
From V > OVLO to FLAG ≤ 0.4 V, See Fig 4 & 12
1.0
3.0
ms
ms
stop
in
V
in
increasing from 5 V to 8 V at 3 V/ms
Disable Time
t
dis
From EN 0.4 to 1.2V to V ≤ 0.3 V, See Fig 5 & 13
out
V
in
= 4.75 V.
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
T
150
30
°C
°C
sd
T
sdhyst
ESD DIODES (T = 25°C, unless otherwise noted)
A
Capacitance (Note 7)
Pin V
Pins D+ & D−
C
pF
V
30
0.5
BUS TVS
0.9
Clamping Voltage (Notes 5, 6, 7)
V
C
Pin V
Pins D+ & D−
@ I = 5.9 A
23.7
9.8
BUS TVS
PP
@ I = 1.0 A
PP
Working Peak Reverse Voltage
(Note 7)
V
RWM
V
Pin V
12
BUS TVS
Pins D+ & D−
5.0
Maximum Reverse Leakage
Current
I
R
@ V
1.0
mA
RWM
Breakdown Voltage (Note 4)
V
BR
@ I = 1.0 mA
V
T
Pin V
Pins D+ & D−
13.5
5.4
BUS TVS
4. V is measured with a pulse test current I at an ambient temperature of 25°C.
BR
T
5. Surge current waveform per Figure 28 in ESD paragraph.
6. For test procedures see Figures 26 and 27: IEC61000−4−2 spec, diagram of ESD test setup and Application Note AND8307/D.
7. ESD diode parameters are guaranteed by design.
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5
NCP362
ELECTRICAL CHARACTERISTICS
A
I
(T = 25°C unless otherwise noted)
I
F
Symbol
Parameter
Maximum Reverse Peak Pulse Current
Clamping Voltage @ I
I
PP
V
C
PP
V
RWM
Working Peak Reverse Voltage
V
C
V
V
I
Maximum Reverse Leakage Current @ V
BR RWM
R
RWM
V
I
V
F
R
T
V
BR
Breakdown Voltage @ I
Test Current
T
I
I
T
I
F
Forward Current
V
F
Forward Voltage @ I
F
P
Peak Power Dissipation
Max. Capacitance @V = 0 and f = 1 MHz
pk
I
PP
C
R
*AdditionalV , V
and V voltage can be available. Please
BR
C
RWM
Uni−Directional TVS
contact your ON Semiconductor representative for availability.
<OVLO
OVLO
UVLO
V
in
V
in
t
off
t
on
V
− R
x I
in
DSon
V
in
− R
x I
DS(on)
0.8 V
in
V
out
V
out
0.3 V
t
stop
t
start
FLAG
FLAG
1.2 V
0.4 V
Figure 3. Start Up Sequence
Figure 4. Shutdown on Over Voltage Detection
EN
1.2 V
EN
V
1.2 V
t
dis
OVLO
V
out
UVLO
out
0.3 V
V
in
− R
x I
DS(on)
t
start
FLAG
FLAG
Figure 5. Disable on EN = 1
Figure 6. FLAG Response with EN = 1
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6
NCP362
CONDITIONS
IN
OUT
V
IN
> OVLO or V < UVLO
IN
Voltage, Current and Thermal Detection
Figure 7.
CONDITIONS
IN
OUT
UVLO < V < OVLO
IN
Voltage, Current and Thermal Detection
Figure 8.
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7
NCP362
TYPICAL OPERATING CHARACTERISTICS
Figure 9. Start Up. Vin=Ch1, Vout=Ch2
Figure 10. FLAG Going Up Delay. Vin=Ch1,
FL:AG=Ch3
Figure 12. Alert Delay. Vout=Ch1, FLAG=Ch3
Figure 11. Output Turn Off time. Vin=Ch1,
Vout=Ch2
Figure 13. Disable Time. EN=Ch4, Vin=Ch1,
Vout=Ch2
Figure 14. Thermal Shutdown. Vin=Ch1,
Vout=Ch2, FLAG=Ch3
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NCP362
TYPICAL OPERATING CHARACTERISTICS
450
400
350
300
250
200
V
in
= 3.6 V
150
100
50
V
in
= 5 V
0
−50
0
50
100
150
TEMPERATURE (°C)
Figure 15. RDS(on) vs. Temperature
(Load = 500 mA)
Figure 16. Output Short Circuit
900
880
860
840
820
800
780
760
740
720
180
160
140
120
100
80
V
V
V
= 3.25 V
in
in
in
= 3.6 V
= 4.2 V
125°C
25°C
V
= 5 V
in
60
40
−40°C
V
in
= 5.25 V
20
0
−50
0
50
TEMPERATURE (°C)
100
150
1
3
5
7
9
11
13 15 17
19 21
V , INPUT VOLTAGE (V)
in
Figure 18. Overcurrent Protection Threshold
vs. Temperature
Figure 17. Quiescent Current vs. Input Voltage
900
25°C
880
860
840
820
800
780
760
740
720
125°C
85°C
0°C
−25°C
−40°C
3
3.5
4
4.5
5
5.5
INPUT VOLTAGE (V)
Figure 19. Overcurrent Protection Threshold
vs. Input Voltage
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NCP362
Figure 21. VBUS TVS Clamping Voltage Screenshot
Figure 20. VBUS TVS Clamping Voltage Screenshot
Negative 8 kV contact per IEC 61000−4−2
Positive 8 kV contact per IEC 61000−4−2
Figure 22. D+ & D− Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2
Figure 23. D+ & D− Clamping Voltage Screenshot
Negative 8 kV Contact per IEC61000−4−2
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10
NCP362
Operation
is automatically turned off (5 ms) if the charge current
NCP362 provides overvoltage protection for positive
voltage, up to 20 V. A PMOS FET protects the systems
exceeds I . NCP362 goes into turn on and turn off mode
lim
as long as defect is present. The internal ton delay (4 ms
typical) allows limiting thermal dissipation. The Flag pin
goes to low level when an overcurrent fault appears. That
allows the microcontroller to count defect events and turns
off the PMOS with EN pin.
(i.e.: VBUS) connected on the V pin, against positive
out
overvoltage. The Output follows the VBUS level until
OVLO threshold is overtaken.
Undervoltage Lockout (UVLO)
To ensure proper operation under any conditions, the
device has a built−in undervoltage lock out (UVLO)
V
out
circuit. During V positive going slope, the output remains
in
disconnected from input until V voltage is above 3.0 V
in
nominal. The FLAG output is pulled to low as long as V
in
does not reach UVLO threshold. This circuit has a 70 mV
hysteresis to provide noise immunity to transient condition.
t
I
I
limit
V
in
(V)
20 V
OVLO
UVLO
0
t
on
t
t
off
Retrieve normal
operation
Overcurrent
V
out
Figure 25. Overcurrent Event Example
FLAG Output
OVLO
NCP362 provides a FLAG output, which alerts external
systems that a fault has occurred.
UVLO
0
This pin is tied to low as soon as: 1.2 V < V < UVLO,
in
V
> OVLO, I
> I , T > 150°C. When NCP362
in
charge limit J
Figure 24. Output Characteristic vs. Vin
Overvoltage Lockout (OVLO)
recovers normal condition, FLAG is held high. The pin is
an open drain output, thus a pull up resistor (typically 1 MW
− Minimum 10 kW) must be provided to V . FLAG pin is
an open drain output.
To protect connected systems on V
pin from
out
CC
overvoltage, the device has a built−in overvoltage lock out
(OVLO) circuit. During overvoltage condition, the output
remains disabled until the input voltage exceeds 6.0 V.
EN Input
To enable normal operation, the EN pin shall be forced
to low or connected to ground. A high level on the pin
disconnects OUT pin from IN pin. EN does not overdrive
an OVLO or UVLO fault.
FLAG output is tied to low until V is higher than
in
OVLO. This circuit has a 100 mV hysteresis to provide
noise immunity to transient conditions.
Overcurrent Protection (OCP)
Internal PMOS FET
The NCP362 integrates overcurrent protection to
prevent system/battery overload or defect. The current
limit threshold is internally set at 750 mA. This value can
be changed from 150 mA to 750 mA by a metal tweak,
please contact your ON Semiconductor representative for
availability. During current fault, the internal PMOS FET
The NCP362 includes an internal PMOS FET to protect
the systems, connected on OUT pin, from positive
overvoltage. Regarding electrical characteristics, the
R
, during normal operation, will create low losses on
pin, characterized by V versus V dropout.
DS(on)
V
out
in out
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11
NCP362
IEC61000−4−2 Waveform
IEC 61000−4−2 Spec.
I
peak
Test
Voltage
(kV)
First Peak
100%
90%
Current at
30 ns (A)
Current at
60 ns (A)
Current
(A)
Level
1
2
3
4
2
4
6
8
7.5
15
4
8
2
4
6
8
I @ 30 ns
22.5
30
12
16
I @ 60 ns
10%
t
P
= 0.7 ns to 1 ns
Figure 26. IEC61000−4−2 Spec
Oscilloscope
ESD Gun
TVS
50 W
Cable
50 W
Figure 27. Diagram of ESD Test Setup
The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping
voltage at the device level. ON Semiconductor has
developed a way to examine the entire voltage waveform
across the ESD protection diode over the time domain of
an ESD pulse in the form of an oscilloscope screenshot,
which can be found on the datasheets for all ESD protection
diodes. For more information on how ON Semiconductor
creates these screenshots and how to interpret them please
refer to AND8307/D.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
100
t
PEAK VALUE I
@ 8 ms
r
RSM
90
80
70
60
50
40
30
20
PULSE WIDTH (t ) IS DEFINED
P
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
HALF VALUE I /2 @ 20 ms
RSM
t
P
10
0
0
20
40
t, TIME (ms)
60
80
Figure 28. 8 X 20 ms Pulse Waveform
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NCP362
PCB Recommendations
two different example of current capability, depending on
PCB area:
• With 280°C/W (without PCB area), allowing DC
The NCP362 integrates a 500 mA rated PMOS FET, and
the PCB rules must be respected to properly evacuate the
heat out of the silicon. The UDFN PAD1 must be connected
to ground plane to increase the heat transfer if necessary
from an application standpoint. Of course, in any case, this
pad shall be not connected to any other potential.
current is 500 mA
2
• With 210°C/W (200 mm ), the charge DC current
allows with a 85°C ambient temperature is:
I = √(T -T )/(R
x R
)
DSON
J
A
JA
q
By increasing PCB area, the R
of the package can be
JA
q
I = 800 mA
decreased, allowing higher charge current to fill the battery.
Taking into account that internal bondings (wires
between package and silicon) can handle up to 1 A (higher
than thermal capability), the following calculation shows
In every case, we recommend to make thermal
measurement on final application board to make sure of the
final Thermal Resistance.
310
290
1 oz C.F.
270
1 oz Sim
2 oz Sim
2 oz C.F.
250
230
210
190
175
150
0
25 50 75 100 125150175 200225 250275 300 325350
2
COPPER HEAT SPREADING AREA (mm )
Figure 29.
Top View
Bottom View
Figure 30. Demo Board Layout
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NCP362
TP3
Vcc
Vcc
R1
R2
J4
10k
TP1
10k
HEADER 3
TP2
VBUS IN
1
2
3
VBUS TVS
TP4
J5
J2
U1
In
/FLAG
9
1
2
3
4
5
6
7
8
3
4
1
2
3
4
5
6
Out
/Flag
/EN
TP5
/EN
2
1
C2
1μF
VBus
C1
1μF
NCP362
S1 STRAP2
10
1
6
7
D−
D+
R3
9
10
11
USB OUT
10k
HEADER 11
J3
1
2
TP6
ID
GND
Figure 31. Demo Board Schematic
Manufacturer
Bill of Material
Designation
Specification
R1, R2
10k - CMS0805 1%
C1, C2
Murata − GRM188R61E105KA12D
ON Semiconductor
1 mF, 25 V, X5R, CM0805
NCP362
GND Jumper
EN, FLAG, IN, V
WM8083-ND
Jumper Ground 1mm pitch 10.16 mm
SMB R 114 665 PCB Plated Gold
5 pins USB mini
, ID, Vcc
BUS
USB Input Connector
USB Output Connector
Hirose UX60-MB-5S
AU Y1006 R
4 pins USB A
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14
NCP362
ORDERING INFORMATION
Device
†
Marking
Package
Shipping
NCP362AMUTBG
ADA
UDFN10
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
(Pb−Free)
NCP362BMUTBG
NCP362CMUTBG
ADG
ADC
UDFN10
(Pb−Free)
UDFN10
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
SELECTION GUIDE
The NCP362 can be available in several undervoltage, overvoltage, overcurrent and clamping voltage versions.
Part number is designated as follows:
NCP362xxxMUxxTBG
a b c
d e f g
Code
Contents
a
ESD diode options
A: TVS diode on pin 4
B: ESD diodes on pins 6 & 7
C: Option A & B
b
c
d
e
f
TVS Pin 4 V
ESD Pin 6 & 7 V
voltage −: 12 V
RWM
voltage −: 5 V
RWM
Overcurrent Typical Threshold
−: 750 mA
UVLO Typical Threshold
−: 3.00 V
OVLO Typical Threshold
−: 5.675 V
Tape & Reel Type
B: = 3000
g
Pb−Free
NOTE: Please contact your ON Semiconductor representative for
availability of additional options.
http://onsemi.com
15
NCP362
PACKAGE DIMENSIONS
UDFN10 2x2.5, 0.5P
CASE 517AV−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
D
B
E
L
L
A
L1
DETAIL A
PIN ONE
REFERENCE
OPTIONAL
CONSTRUCTIONS
MILLIMETERS
2X
0.15 C
DIM
A
MIN
0.45
0.00
MAX
0.55
0.05
MOLD CMPD
EXPOSED Cu
A1
A3
b
0.13 REF
2X
0.15
C
TOP VIEW
0.20
0.30
D
2.50 BSC
A3
D2
D3
E
1.35
0.30
1.55
0.50
DETAIL B
A3
A
C
2.00 BSC
0.10
0.08
C
C
A1
E2
e
0.95
1.15
DETAIL B
0.50 BSC
1.08 BSC
OPTIONAL
F
CONSTRUCTION
K
0.20
---
0.30
0.15
A1
L
0.20
---
NOTE 4
SEATING
PLANE
L1
SIDE VIEW
SOLDERING FOOTPRINT*
0.10
C
A
B
10X b
1.55
D2
0.10
C
C
A
B
10X
DETAIL A
1.13
0.35
F
NOTE 3
0.05
10X
L
1
5
6
10X
E2
0.45
1.15 2.30
0.10
C
A
B
10
K
D3
PACKAGE
OUTLINE
e
F
1
0.50
0.10
C
A
B
1.13
0.50
PITCH
BOTTOM VIEW
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
MountingTechniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under
its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,
or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your loca
Sales Representative
NCP362/D
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