NCP146 [ONSEMI]
300 mA CMOS Low Dropout Regulator;
| 型号： | NCP146 |
| 厂家： | 
ONSEMI |
| 描述： | 300 mA CMOS Low Dropout Regulator |
| 文件： | 总6页 (文件大小：73K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP146
Product Preview
300 mA CMOS Low Dropout
Regulator
The NCP146 is 300 mA LDO that provides the engineer with a very
stable, accurate voltage with low noise suitable for space constrained,
noise sensitive applications. In order to optimize performance for
battery operated portable applications, the NCP146 employs the
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MARKING
DIAGRAM
dynamic quiescent current adjustment for very low I consumption at
Q
no−load.
8
XXXXX
ALYW
G
Features
SOIC−8
CASE 751
8
• Operating Input Voltage Range: 1.7 V to 5.5 V
• Available in Fixed Voltage Options: 1.8 V
• Very Low Quiescent Current of Typ. 50 mA
• Low Dropout: 280 mV Typical at 300 mA
1
1
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
•
1% Accuracy at Room Temperature
• High Power Supply Ripple Rejection: 75 dB at 1 kHz
• Thermal Shutdown and Current Limit Protections
• Stable with a 1 mF Ceramic Output Capacitor
PIN CONNECTIONS
• Available in SOIC−8 Package
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
IN
1
2
3
4
8
7
6
OUT
GND
GND
N/C
GND
GND
N/C
Typical Applicaitons
• PDAs, Mobile phones, GPS, Smartphones
®
®
• Wireless Handsets, Wireless LAN, Bluetooth , Zigbee
5
• Portable Medical Equipment
SOIC−8
(Top View)
• Other Battery Powered Applications
V
V
IN
OUT
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 5 of this data sheet.
IN
OUT
NCP146
GND
C
OUT
C
1 mF
Ceramic
IN
Figure 1. Typical Application Schematic
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
January, 2016 − Rev. P0
NCP146/D
NCP146
IN
THERMAL
SHUTDOWN
BANDGAP
MOSFET
DRIVER WITH
CURRENT LIMIT
REFERENCE
OUT
AUTO LOW
POWER MODE
GND
Figure 2. Simplified Schematic Block Diagram
Description
PIN FUNCTION DESCRIPTION
Pin No.
Pin Name
1
OUT
Regulated output voltage pin. A small ceramic capacitor with minimum value of 1 mF is needed from this
pin to ground to assure stability.
2, 3, 6, 7
GND
IN
Power supply ground.
8
Input pin. A small capacitor is needed from this pin to ground to assure stability.
Not connected. This pin can be tied to ground to improve thermal dissipation.
4, 5
N/C
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
VIN
Value
Unit
V
Input Voltage (Note 1)
−0.3 V to 6 V
Output Voltage
VOUT
−0.3 V to VIN + 0.3 V or 6 V
V
Output Short Circuit Duration
Maximum Junction Temperature
Storage Temperature
tSC
∞
150
s
TJ(MAX)
TSTG
°C
°C
V
−55 to 150
2000
ESD Capability, Human Body Model (Note 2)
ESD Capability, Machine Model (Note 2)
ESDHBM
ESDMM
200
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114,
ESD Machine Model tested per EIA/JESD22−A115,
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS (Note 3)
Rating
Symbol
Value
Unit
Thermal Characteristics, SOIC−8
Thermal Resistance, Junction−to−Air
R
TBD
°C/W
q
JA
2
3. Single component mounted on 1 oz, FR 4 PCB with 645 mm Cu area.
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2
NCP146
ELECTRICAL CHARACTERISTICS
−40°C ≤ T ≤ 85°C; V = 2.8 V, I
= 1 mA, C = C
= 1 mF. Typical values are at T = +25°C. Min./Max. are for T = −40°C and T =
J
IN
OUT
IN
OUT
J
J
J
+85°C respectively (Note 4).
Parameter
Test Conditions
Symbol
Min
1.7
−2
Typ
Max
5.5
+3
Unit
V
Operating Input Voltage
Output Voltage Accuracy
Line Regulation
V
IN
−40°C ≤ T ≤ 85°C
V
OUT
%
J
VOUT + 0.5 V ≤ VIN ≤ 5.5 V
IOUT = 1 mA to 150 mA
IOUT = 1 mA to 300 mA
Reg
0.01
15
0.1
%/V
mV
LINE
Load Regulation
Reg
LOAD
LOAD
Load Regulation
30
Load Transient
I
= 1 mA to 300 mA or 300 mA to 1 mA Tran
−50/
+30
mV
OUT
in 1 ms, C
= 1 mF
OUT
Dropout Voltage (Note 5)
Output Current Limit
I
= 300 mA
V
280
600
50
mV
mA
mA
OUT
DO
V
= 90% V
I
CL
300
OUT
OUT(nom)
Quiescent Current
IOUT = 0 mA
I
95
Q
Power Supply Rejection Ratio
V
IN
= 2.8 V, V
= 1.8 V
f = 1 kHz
PSRR
75
dB
OUT
I
= 150 mA
OUT
Output Noise Voltage
V
IN
= 2.8 V, V
= 1.8 V, I
= 150 mA
V
N
70
mV
rms
OUT
OUT
f = 10 Hz to 100 kHz
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
Temperature increasing from TJ = +25°C
T
160
20
°C
°C
SD
Temperature falling from T
T
SDH
SD
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at
T = T = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
J
A
5. Characterized when VOUT falls 100 mV below the regulated voltage at VIN = VOUT(NOM) + 1 V.
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3
NCP146
APPLICATIONS INFORMATION
Thermal Shutdown
General
The NCP146 is a high performance 300 mA Low Dropout
When the die temperature exceeds the Thermal Shutdown
Linear Regulator. This device delivers very high PSRR
(over 75 dB at 1 kHz) and excellent dynamic performance
as load/line transients. In connection with very low
quiescent current this device is very suitable for various
battery powered applications such as tablets, cellular
phones, wireless and many others. The device is fully
protected in case of output overload, output short circuit
condition and overheating, assuring a very robust design.
threshold (T − 160°C typical), Thermal Shutdown event
is detected and the device is disabled. The IC will remain in
this state until the die temperature decreases below the
SD
Thermal Shutdown Reset threshold (T
− 140°C typical).
SDU
Once the IC temperature falls below the 140°C the LDO is
enabled again. The thermal shutdown feature provides the
protection from a catastrophic device failure due to
accidental overheating. This protection is not intended to be
used as a substitute for proper heat sinking.
Input Capacitor Selection (CIN)
It is recommended to connect at least a 1 mF Ceramic X5R
or X7R capacitor as close as possible to the IN pin of the
device. This capacitor will provide a low impedance path for
unwanted AC signals or noise modulated onto constant
input voltage. There is no requirement for the min. /max.
ESR of the input capacitor but it is recommended to use
ceramic capacitors for their low ESR and ESL. A good input
capacitor will limit the influence of input trace inductance
and source resistance during sudden load current changes.
Larger input capacitor may be necessary if fast and large
load transients are encountered in the application.
Power Dissipation
As power dissipated in the NCP146 increases, it might
become necessary to provide some thermal relief. The
maximum power dissipation supported by the device is
dependent upon board design and layout. Mounting pad
configuration on the PCB, the board material, and the
ambient temperature affect the rate of junction temperature
rise for the part. For reliable operation junction temperature
should be limited to +125°C
The maximum power dissipation the NCP146 can handle
is given by:
ƪ
ƫ
125° C * TA
Output Decoupling (COUT
)
(eq. 1)
PD(MAX)
+
The NCP146 requires an output capacitor connected as
close as possible to the output pin of the regulator. The
recommended capacitor value is 1 mF and X7R or X5R
dielectric due to its low capacitance variations over the
specified temperature range. The NCP146 is designed to
remain stable with minimum effective capacitance of
0.22mF to account for changes with temperature, DC bias
and package size. Especially for small package size
capacitors such as 0402 the effective capacitance drops
rapidly with the applied DC bias.
qJA
The power dissipated by the NCP146 for given
application conditions can be calculated from the following
equations:
ǒ
Ǔ
ǒ
Ǔ
(eq. 2)
PD [ VIN IGND@IOUT ) IOUT VIN * VOUT
Reverse Current
The PMOS pass transistor has an inherent body diode
which will be forward biased in the case that V > V .
There is no requirement for the minimum value of
OUT
IN
Equivalent Series Resistance (ESR) for the C
but the
Due to this fact in cases, where the extended reverse current
condition can be anticipated the device may require
additional external protection.
OUT
maximum value of ESR should be less than 2 W. Larger
output capacitors and lower ESR could improve the load
transient response or high frequency PSRR. It is not
recommended to use tantalum capacitors on the output due
to their large ESR. The equivalent series resistance of
tantalum capacitors is also strongly dependent on the
temperature, increasing at low temperature.
Power Supply Rejection Ratio
The NCP146 features very good Power Supply Rejection
ratio. If desired the PSRR at higher frequencies in the range
100 kHz − 10 MHz can be tuned by the selection of C
capacitor and proper PCB layout.
OUT
Output Current Limit
PCB Layout Recommendations
Output Current is internally limited within the IC to a
typical 600 mA. The NCP146 will source this amount of
current measured with a voltage drops on the 90% of the
To obtain good transient performance and good regulation
characteristics place C and C capacitors close to the
IN
OUT
device pins and make the PCB traces wide. In order to
minimize the solution size, use 0402 capacitors. Larger
copper area connected to the pins will also improve the
device thermal resistance. The actual power dissipation can
be calculated from the equation above (Equation 2). Expose
pad should be tied the shortest path to the GND pin.
nominal V
. If the Output Voltage is directly shorted to
= 0 V), the short circuit protection will limit
OUT
ground (V
OUT
the output current to 630 mA (typ). The current limit and
short circuit protection will work properly over whole
temperature range and also input voltage range. There is no
limitation for the short circuit duration.
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4
NCP146
ORDERING INFORMATION
Device
†
Voltage Option
Marking
Package
Shipping
NCP146CD180R2G
1.8 V
TBD
SOIC−8
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
NCP146
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−X−
A
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
MILLIMETERS
DIM MIN MAX
INCHES
G
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N X 45
_
SEATING
PLANE
1.27 BSC
0.050 BSC
−Z−
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
0.10 (0.004)
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
SOLDERING FOOTPRINT*
M
S
S
X
0.25 (0.010)
Z
Y
1.52
0.060
7.0
4.0
0.275
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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ZigBee is a registered trademark of ZigBee Alliance.
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
NCP146/D
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