NCL30081_13_技术文档

NCL30081

Dimmable Quasi-Resonant

Primary Side Current-Mode

Controller for LED Lighting

The NCL30081 is a PWM current mode controller targeting isolated

flyback and non−isolated constant current topologies. The controller

operates in a quasi−resonant mode to provide high efficiency. Thanks

to a novel control method, the device is able to precisely regulate a

constant LED current from the primary side. This removes the need

for secondary side feedback circuitry, biasing and an optocoupler.

The device is highly integrated with a minimum number of external

components. A robust suite of safety protection is built in to simplify

the design. This device is specifically intended for very compact space

efficient designs. It supports step dimming by monitoring the AC line

and detecting when the line has been toggled on−off−on by the user to

reduce the light intensity in 5 steps down to 5% dimming.

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1

TSOP−6

SN SUFFIX

CASE 318G

MARKING DIAGRAM

Features

AAxAYWG

• Quasi−resonant Peak Current−mode Control Operation

• Primary Side Sensing (no optocoupler needed)

G

1

• Wide V Range

CC

AAx = Specific Device Code

• Precise LED Constant Current Regulation 1% Typical

• Line Feed−forward for Enhanced Regulation Accuracy

• Low LED Current Ripple

x

= G or H

= Assembly Location

= Year

= Work Week

= Pb−Free Package

A

Y

W

G

• 250 mV 2% Guaranteed Voltage Reference for Current Regulation

• ~ 0.9 Power Factor with Valley Fill Input Stage

• Low Start−up Current (10 mA typ.)

(Note: Microdot may be in either location)

• Small Space Saving Low Profile Package

• 5 State Quasi−log Dimmable

PIN CONNECTIONS

1

• Wide Temperature Range of −40 to +125°C

• Pb−free, Halide−free MSL1 Product

ZCD

GND

CS

VIN

VCC

DRV

• Robust Protection Features

♦ Over Voltage / LED Open Circuit Protection

♦ Secondary Diode Short Protection

♦ Output Short Circuit Protection

(Top View)

♦ Shorted Current Sense Pin Fault Detection

♦ Latched and Auto−recoverable Versions

♦ Brown−out

Typical Applications

• Integral LED Bulbs

• LED Power Driver Supplies

• LED Light Engines

♦ V Under Voltage Lockout

♦ Thermal Shutdown

CC

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 30 of this data sheet.

©

Semiconductor Components Industries, LLC, 2013

1

Publication Order Number:

April, 2013 − Rev. 0

NCL30081/D

NCL30081

.

Aux

.

1

2

3

6

5

4

Figure 1. Typical Application Schematic for NCL30081

Table 1. PIN FUNCTION DESCRIPTION

Pin No

Pin Name

ZCD

Function

Zero Crossing Detection

−

Pin Description

Connected to the auxiliary winding, this pin detects the core reset event.

The controller ground

1

2

3

4

GND

CS

Current sense

Driver output

This pin monitors the primary peak current

DRV

The current capability of the totem pole gate drive (+0.3/−0.5 A) makes it suit-

able to effectively drive a broad range of power MOSFETs.

5

6

VCC

VIN

Supplies the controller

This pin is connected to an external auxiliary voltage.

Input voltage sensing

This pin observes the HV rail and is used in valley selection. This pin also

monitors and protects for low mains conditions.

Brown−Out

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NCL30081

V

REF

V

DD

STOP

OFF

UVLO

Latch

Aux_SCP

VCC

GND

ZCD

CS

Fault

VCC Management

CS_shorted

Management

Internal

Thermal

Shutdown

VCC_max

WOD_SCP

BO_NOK

VCC Over Voltage

Protection

Ipkmax

Qdrv

V

REF

V

VIN

VCC

Clamp

Circuit

offset_OK

Zero Crossing Detection

Valley Selection

Aux. Winding

Short Circuit Protection

DRV

S

R

Qdrv

Aux_SCP

Q

V

VIN

offset_OK

V

VLY

Line

Feedforward

V

REF

STEP_DIM

STOP

Leading

Edge

Blanking

CS_reset

Constant−Current

Control

Ipkmax

STOP

Max. Peak

Current

Limit

Ipkmax

V

VIN

Step

Dimming

CS Short

Protection

Brown−Out

STEP_DIM

CS_shorted

V

VIN

Winding and

Output diode

Short Circuit

Protection

BO_NOK

WOD_SCP

Figure 2. Internal Circuit Architecture

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NCL30081

Table 2. MAXIMUM RATINGS TABLE

Symbol

Rating

Value

Unit

V

Maximum Power Supply voltage, VCC pin, continuous voltage

Maximum current for VCC pin

−0.3, +35

Internally limited

V

mA

CC(MAX)

I

CC(MAX)

V

Maximum driver pin voltage, DRV pin, continuous voltage

Maximum current for DRV pin

−0.3, V

(Note 1)

V

mA

DRV(MAX)

DRV

I

−500, +800

DRV(MAX)

V

Maximum voltage on low power pins (except pins DRV and VCC)

Current range for low power pins (except pins ZCD, DRV and VCC)

−0.3, +5.5

−2, +5

V

mA

MAX

I

MAX

V

Maximum voltage for ZCD pin

Maximum current for ZCD pin

−0.3, +10

−2, +5

V

mA

ZCD(MAX)

I

ZCD(MAX)

R

Thermal Resistance, Junction−to−Air

Maximum Junction Temperature

Operating Temperature Range

Storage Temperature Range

360

150

°C/W

°C

θ

J−A

T

J(MAX)

−40 to +125

−60 to +150

4

°C

ESD Capability, HBM model (Note 2)

ESD Capability, MM model (Note 2)

kV

V

200

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

1. V

is the DRV clamp voltage V

when V is higher than V

. V

is V unless otherwise noted.

DRV

DRV(high)

CC

DRV(high) DRV CC

2. This device series contains ESD protection and exceeds the following tests: Human Body Model 4000 V per Mil−Std−883, Method 3015.

3. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78 except for VIN pin which passes 60 mA.

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NCL30081

Table 3. ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values T = 25°C, V = 12 V;

J

CC

For min/max values T = −40°C to +125°C, Max T = 150°C, V = 12 V)

J

CC

Description

Test Condition

Symbol

Min

Typ

Max

Unit

STARTUP AND SUPPLY CIRCUITS

Supply Voltage

V

Startup Threshold

Minimum Operating Voltage

V

increasing

decreasing

V

16

8.2

8

18

8.8

–

20

9.4

–

CC

CC(on)

CC(off)

Hysteresis V

– V

V

CC(on)

CC(off)

CC(HYS)

CC(reset)

Internal logic reset

V

3.5

4.5

5.5

Over Voltage Protection

VCC OVP threshold

V

26

28

30

V

CC(OVP)

V

noise filter

t

–

5

20

–

ms

CC(off)

VCC(off)

noise filter−

t

I

CC(reset)

VCC(reset)

Startup current

I

–

13

46

30

60

mA

CC(start)

Startup current in fault mode

CC(sFault)

Supply Current

mA

Device Disabled/Fault

Device Enabled/No output load on pin 5

V

F

> V

= 65 kHz

= 470 pF,

= 65 kHz

I

0.8

–

1.0

2.15

2.6

1.4

4.0

5.0

CC

CC(off)

CC1

CC2

CC3

sw

Device Switching (F = 65 kHz)

C

sw

DRV

F

sw

CURRENT SENSE

Maximum Internal current limit

V

0.95

250

1

1.05

350

V

ILIM

Leading Edge Blanking Duration for V

(T = −25°C to 125°C)

j

t

300

ns

ILIM

LEB

Leading Edge Blanking Duration for V

(T = −40°C to 125°C)

j

t

240

300

350

ns

LEB

Input Bias Current

DRV high

I

–

0.02

50

1.5

120

–

mA

ns

V

bias

Propagation delay from current detection to gate off−state

t

150

1.65

–

ILIM

Threshold for immediate fault protection activation

V

1.35

–

CS(stop)

Leading Edge Blanking Duration for V

t

ns

ms

CS(stop)

BCS

Blanking time for CS to GND short detection V

= 1 V

t

8.0

2.6

14.0

4.6

pinVIN

CS(blank1)

CS(blank2)

Blanking time for CS to GND short detection V

= 3.3 V

–

pinVIN

GATE DRIVE

Drive Resistance

DRV Sink

DRV Source

W

R

SNK

R

SRC

–

13

30

–

Drive current capability

DRV Sink (Note 4)

DRV Source (Note 4)

mA

I

–

500

300

–

SNK

SRC

I

Rise Time (10% to 90%)

Fall Time (90% to 10%)

DRV Low Voltage

C

= 470 pF

t

–

8

40

30

–

ns

V

DRV

r

= 470 pF

t

f

DRV

V

= V

+0.2 V

V

CC

CC(off)

DRV(low)

C

= 470 pF,

DRV

R

= 33 kW

DRV

DRV High Voltage

V

DRV

= 30 V

V

10

12

14

V

CC

DRV(high)

C

= 470 pF,

R

DRV

= 33 kW

4. Guaranteed by design

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NCL30081

Table 3. ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values T = 25°C, V = 12 V;

J

CC

For min/max values T = −40°C to +125°C, Max T = 150°C, V = 12 V)

J

CC

Description

Test Condition

Symbol

Min

Typ

Max

Unit

ZERO VOLTAGE DETECTION CIRCUIT

ZCD threshold voltage

V

increasing

decreasing

increasing

V

25

5

45

25

–

65

45

–

mV

V

ZCD

ZCD(THI)

ZCD(THD)

ZCD(HYS)

ZCD(short)

ZCD threshold voltage (Note 4)

ZCD hysteresis (Note 4)

V

ZCD

V

ZCD

10

0.8

Threshold voltage for output short circuit or aux. winding

short circuit detection

V

1

1.2

Short circuit detection Timer

V

ZCD

< V

t

OVLD

70

3

90

4

110

5

ms

s

ZCD(short)

Auto−recovery timer duration

t

recovery

Input clamp voltage

High state

Low state

V

I

= 3.0 mA

= −2.0 mA

V

–

−0.9

9.5

−0.6

–

−0.3

pin1

CH

CL

I

V

pin1

Propagation Delay from valley detection to DRV high

Equivalent time constant for ZCD input (Note 4)

Blanking delay after on−time

V

ZCD

decreasing

t

–

20

3

150

–

ns

ms

DEM

t

PAR

t

2.25

5

3.75

8

BLANK

Timeout after last demag transition

t

6.5

TIMO

CONSTANT CURRENT CONTROL

Reference Voltage at T = 25°C

V

245

250

175

100

62.5

25

255

mV

j

REF

Reference Voltage T = −40°C to 125°C

242.5

257.5

j

REF

70% reference voltage

40% reference voltage

25% reference voltage

10% reference voltage

5% reference voltage

V

REF50

V

REF50

V

REF50

V

REF50

V

REF50

–

12.5

55

–

Current sense lower threshold for detection of the

leakage inductance reset time

V

30

80

CS(low)

LINE FEED−FORWARD

V

to I

conversion ratio

K

15

67.5

–

17

76.5

15

19

85.5

–

mA/V

mA

VIN

CS(offset)

LFF

I

offset(MAX)

Offset current maximum value

V

= 4.5 V

pinVIN

V

REF

V

REF

value below which the offset current source is turned off

value above which the offset current source is turned on

V

REF

decreases

increases

V

mV

REF(off)

REF(on)

V

REF

–

20

–

VALLEY SELECTION

Threshold for line range detection V increasing

V

increases

decreases

V

HL

2.28

2.18

15

2.4

2.3

25

2.52

2.42

35

V

in

VIN

st

nd

(1 to 2 valley transition for V

> 0.75 V)

REF

Threshold for line range detection V decreasing

V

VIN

V

LL

in

nd

st

(2 to 1 valley transition for V

> 0.75 V)

REF

Blanking time for line range detection

4. Guaranteed by design

t

ms

HL(blank)

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NCL30081

Table 3. ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values T = 25°C, V = 12 V;

J

CC

For min/max values T = −40°C to +125°C, Max T = 150°C, V = 12 V)

J

CC

Description

Test Condition

Symbol

Min

Typ

Max

Unit

VALLEY SELECTION

Valley thresholds

mV

st

nd

rd

1

2

4

7

to 2 valley transition at LL and 2 to 3 valley HL

V

decreases

increases

decreases

increases

decreases

increases

decreases

increases

decreases

increases

V

177.5 187.5 197.5

185.0 195.0 205.0

117.5 125.0 132.5

125.0 132.5 140.0

REF

VLY1−2/2−3

VLY2−1/3−2

VLY2−4/3−5

VLY4−2/5−3

VLY4−7/5−8

VLY7−4/8−5

nd

th

st

rd

nd

to 1 valley transition at LL and 3 to 2 valley HL

REF

th

rd

th

to 4 valley transition at LL and 3 to 5 valley HL

V

REF

nd

th

rd

to 2 valley transition at LL and 5 to 3 valley HL

V

REF

th

to 7 valley transition at LL and 5 to 8 valley HL

V

–

75.0

82.5

37.5

50.0

15.0

20.0

–

th

to 4 valley transition at LL and 8 to 5 valley HL

V

REF

th

to 11 valley transition at LL and 8 to 12 valley HL

V

REF

V

VLY7−11/8−12

VLY11−7/12−8

th

11 to 7 valley transition at LL and 12 to 8 valley HL

11 to 13 valley transition at LL and 12 to 15 valley HL

V

REF

th

V

REF

V

VLY11−13/12−15

VLY13−11/15−12

th

13 to 11 valley transition at LL and 15 to 12 valley HL

V

REF

THERMAL SHUTDOWN

Thermal Shutdown (Note 4)

Device switching

around 65 kHz)

T

130

–

155

55

170

–

°C

SHDN

(F

SW

Thermal Shutdown Hysteresis (Note 4)

BROWN−OUT

T

SHDN(HYS)

Brown−Out ON level (IC start pulsing)

Brown−Out OFF level (IC shuts down)

BO comparators delay

V

increasing

decreasing

V

0.90

0.85

–

1

0.9

30

50

–

1.10

0.95

–

V

SD

BO(on)

V

SD

BO(off)

t

ms

nA

BO(delay)

BO(blank)

Brown−Out blanking time

t

35

65

Brown−out pin bias current

4. Guaranteed by design

I

−250

250

BO(bias)

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NCL30081

TYPICAL CHARACTERISTICS

18.15

18.10

18.05

18.00

8.85

8.80

8.75

8.70

8.65

17.95

17.90

−40 −20

0

20

40

60

80

100 120

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 3. V_CC(on)vs. Junction Temperature

Figure 4. V_CC(off)vs. Junction Temperature

27.80

27.75

27.70

1.09

1.07

1.05

1.03

27.65

27.60

27.55

27.50

1.01

0.99

0.97

0.95

27.45

27.40

−40 −20

0

20

40

60

80

100 120

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 5. V_CC(OVP)vs. Junction Temperature

Figure 6. I_CC1vs. Junction Temperature

2.20

2.15

2.70

2.65

2.60

2.55

2.50

2.45

2.10

2.05

2.00

2.40

2.35

−40 −20

0

20

40

60

80

100 120

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 7. I_CC2vs. Junction Temperature

Figure 8. I_CC3vs. Junction Temperature

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NCL30081

TYPICAL CHARACTERISTICS

54

52

50

19

17

15

13

48

46

44

42

11

9

40

38

−40 −20

0

20

40

60

80

100 120

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 9. I_CC(start)vs. Junction Temperature

Figure 10. I_CC(sFault)vs. Junction Temperature

1.51

1.50

1.49

1.48

1.002

1.000

0.998

0.996

0.994

1.47

1.46

0.992

0.990

−40 −20

0

20

40

60

80

100 120

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 11. V_CS(stop)vs. Junction Temperature

Figure 12. V_ILIMvs. Junction Temperature

305

303

3.00

2.98

2.96

2.94

301

299

297

295

293

291

289

2.92

2.90

287

285

−40 −20

0

20

40

60

80

100 120

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 13. t_LEBvs. Junction Temperature

Figure 14. t_BLANKvs. Junction Temperature

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NCL30081

TYPICAL CHARACTERISTICS

6.80

6.70

6.60

6.50

6.40

254

253

252

251

250

249

248

6.30

6.20

247

246

−40 −20

0

20

40

60

80

100 120

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 15. t_TIMOvs. Junction Temperature

Figure 16. V_REFvs. Junction Temperature

178

177

102

101

176

175

174

100

99

98

173

172

97

96

−40 −20

0

20

40

60

80

100 120

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 17. V_REF70vs. Junction Temperature

Figure 18. V_REF40vs. Junction Temperature

66

65

64

63

62

26.0

25.5

25.0

24.5

24.0

61

60

23.5

23.0

−40 −20

0

20

40

60

80

100 120

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 19. V_REF25vs. Junction Temperature

Figure 20. V_REF10vs. Junction Temperature

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NCL30081

TYPICAL CHARACTERISTICS

14.5

14.0

13.5

55.8

55.6

55.4

55.2

55.0

54.8

54.6

13.0

12.5

12.0

11.5

11.0

54.4

54.2

10.5

10.0

−40 −20

0

20

40

60

80

100 120

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 21. V_REF05vs. Junction Temperature

Figure 22. V_CS(low)vs. Junction Temperature

17.65

17.60

17.55

17.50

2.42

2.41

2.40

2.39

2.38

17.45

17.40

2.37

2.36

−40 −20

0

20

40

60

80

100 120

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 23. K_LFFvs. Junction Temperature

Figure 24. V_HLvs. Junction Temperature

2.30

2.29

2.28

25.5

25.0

24.5

24.0

2.27

2.26

23.5

23.0

−40 −20

0

20

40

60

80

100 120

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 25. V_LLvs. Junction Temperature

Figure 26. t_HL(BLANK)vs. Junction Temperature

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NCL30081

TYPICAL CHARACTERISTICS

186.8

186.6

186.4

200

199

198

197

196

195

194

186.2

186.0

185.8

185.6

185.4

193

192

185.2

185.0

−40 −20

0

20

40

60

80

100 120

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 27. V_{VLY1−2/2−3}vs. Junction

Temperature

Figure 28. V_{VLY2−1/3−2}vs. Junction

Temperature

124.6

124.4

137

136

135

124.2

124.0

123.8

134

133

132

123.6

123.4

131

130

−40 −20

0

20

40

60

80

100 120

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 29. V_{VLY2−4/3−5}vs. Junction

Temperature

Figure 30. V_{VLY4−2/5−3}vs. Junction

Temperature

75.0

74.8

74.6

74.4

88

87

86

85

84

83

82

74.2

74.0

81

80

−40 −20

0

20

40

60

80

100 120

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 31. V_{VLY4−7/5−8}vs. Junction

Temperature

Figure 32. V_{VLY7−4/8−5}vs. Junction

Temperature

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NCL30081

TYPICAL CHARACTERISTICS

37.3

37.2

37.1

50

49

48

47

37.0

36.9

46

45

36.8

36.7

44

43

−40 −20

0

20

40

60

80

100 120

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 33. V_{VLY7−11/8−12}vs. Junction

Temperature

Figure 34. V_{VLY11−7/12−8}vs. Junction

Temperature

15.6

15.1

14.6

14.1

21.0

20.5

20.0

19.5

19.0

18.5

13.6

13.1

12.6

18.0

17.5

−40 −20

0

20

40

60

80

100 120

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 35. V_{VLY11−13/12−15}vs. Junction

Temperature

Figure 36. V_{VLY13−11/15−12}vs. Junction

Temperature

1.000

0.995

0.990

0.985

0.910

0.905

0.900

0.895

0.890

0.980

0.975

−40 −20

0

20

40

60

80

100 120

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 37. V_BO(on)vs. Junction Temperature

Figure 38. V_BO(off)vs. Junction Temperature

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13

NCL30081

TYPICAL CHARACTERISTICS

53.5

53.0

52.5

85.0

84.5

84.0

83.5

83.0

82.5

82.0

81.5

52.0

51.5

51.0

50.5

50.0

81.0

80.5

−40 −20

0

20

40

60

80

100 120

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 39. t_BO(BLANK)vs. Junction

Temperature

Figure 40. t_OVLDvs. Junction Temperature

4.40

4.35

4.30

4.25

4.20

4.15

4.10

4.05

−40 −20

0

20

40

60

80

100 120

T , JUNCTION TEMPERATURE (°C)

J

Figure 41. t_recoveryvs. Junction Temperature

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14

NCL30081

Application Information

The NCL30081 implements a current−mode architecture

• Brown−Out: the controller includes a brown−out

circuit with a validation timer which safely stops the

controller in the event that the input voltage is too low.

The device will automatically restart if the line recovers.

operating in quasi−resonant mode. Thanks to proprietary

circuitry, the controller is able to accurately regulate the

secondary side current of the flyback converter without

using any opto−coupler or measuring directly the secondary

side current.

• Cycle−by−cycle peak current limit: when the current

sense voltage exceeds the internal threshold V

, the

ILIM

• Quasi−Resonance Current−Mode Operation:

implementing quasi−resonance operation in peak

current−mode control, the NCL30081 optimizes the

efficiency by switching in the valley of the MOSFET

drain−source voltage. Thanks to a smart control

algorithm, the controller locks−out in a selected valley

and remains locked until the input voltage or the output

current set point significantly changes.

• Primary Side Constant Current Control: thanks to a

proprietary circuit, the controller is able to compensate

for the leakage inductance of the transformer and allow

accurate control of the secondary side current.

• Line Feed−forward: compensation for possible

variation of the output current caused by system slew

rate variation.

MOSFET is turned off for the rest of the switching cycle.

• Winding Short−Circuit Protection: an additional

comparator with a short LEB filter (t ) senses the CS

BCS

signal and stops the controller if V reaches 1.5 x

CS

V . For noise immunity reasons, this comparator is

ILIM

enabled only during the main LEB duration t

.

LEB

• Output Short−circuit protection: If a very low

voltage is applied on ZCD pin for 90 ms (nominal), the

controllers assume that the output or the ZCD pin is

shorted to ground and enters shutdown. The auto−

restart version (B suffix) waits 4 seconds, then the

controller restarts switching. In the latched version (A

suffix), the controller is latched as long as V stays

CC

above the V

threshold.

CC(reset)

• Step dimming: Each time the IC detects a brown−out

• Open LED protection: if the voltage on the VCC pin

exceeds an internal limit, the controller shuts down and

waits 4 seconds before restarting switching.

condition, the output current is decreased by discrete steps.

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15

NCL30081

Constant Current Control

Figure 43 portrays the primary and secondary current of

a flyback converter in discontinuous conduction mode

(DCM). Figure 42 shows the basic circuit of a flyback

converter.

Transformer

V

bulk

L

leak

N

sp

R

clp

V

out

C

clp

.

L

p

.

Clamping

network

DRV

C

lump

R

sense

Figure 42. Basic Flyback Converter Schematic

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16

NCL30081

During the on−time of the MOSFET, the bulk voltage

is applied to the magnetizing and leakage inductors L

turned off, the drain voltage begins to oscillate because of

the resonating network formed by the inductors (L +L

V

bulk

)

leak

p

and L

and the current ramps up.

and the lump capacitor. This voltage is reflected on the

auxiliary winding wired in flyback mode. Thus, by looking

at the auxiliary winding voltage, we can detect the end of the

conduction time of secondary diode. The constant current

control block picks up the leakage inductor current, the end

of conduction of the output rectifier and controls the drain

current to maintain the output current constant.

leak

When the MOSFET is turned−off, the inductor current

first charges C . The output diode is off until the voltage

lump

across L reverses and reaches:

p

ǒ_V

Ǔ

N_{sp out}) V_f

(eq. 1)

The output diode current increase is limited by the leakage

inductor. As a consequence, the secondary peak current is

reduced:

We have:

V_REF

2N_spR_sense

(eq. 3)

I_out

+

I_L,pk

I

_D,pkt

(eq. 2)

N_sp

The output current value is set by choosing the sense

resistor:

The diode current reaches its peak when the leakage inductor

is reset. Thus, in order to accurately regulate the output

current, we need to take into account the leakage inductor

current. This is accomplished by sensing the clamping

network current. Practically, a node of the clamp capacitor

V_ref

2N_spI_out

(eq. 4)

R_sense

+

From Equation 3, the first key point is that the output

current is independent of the inductor value. Moreover, the

leakage inductance does not influence the output current

value as the reset time is taken into account by the controller.

is connected to R

instead of the bulk voltage V

.

sense

bulk

Then, by reading the voltage on the CS pin, we have an

image of the primary current (red curve in Figure 43).

When the diode conducts, the secondary current decreases

linearly from I

to zero. When the diode current has

D,pk

I

L,pk

N

I

sp D,pk

I (t)

pri

I (t)

sec

time

t

1

t

2

t

on

t

demag

V (t)

aux

time

Figure 43. Flyback Currents and Auxiliary Winding Voltage in DCM

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17

NCL30081

Internal Soft−Start

At startup or after recovering from a fault, there is a small

internal soft−start of 40 ms.

In addition, during startup, as the output voltage is zero

volts, the demagnetization time is long and the constant

current control block will slowly increase the peak current

towards its nominal value as the output voltage grows.

Figure 44 shows a soft−start simulation example for a 9 W

LED power supply.

16.0

12.0

8.00

4.00

0

V

out

1

800m

600m

400m

200m

0

I

2

out

800m

600m

400m

200m

0

V

4

3

Control

CS

604u

1.47m

2.34m

3.21m

4.07m

time in seconds

Figure 44. Startup Simulation Showing the Natural Soft−start

Cycle−by−Cycle Current Limit

When the current sense voltage exceeds the internal

Winding and Output Diode Short−Circuit Protection

In parallel with the cycle−by−cycle sensing of the CS pin,

threshold V , the MOSFET is turned off for the rest of the

ILIM

another comparator with a reduced LEB (t ) and a higher

BCS

switching cycle (Figure 45).

threshold (1.5 V typical) is able to sense winding

short−circuit and immediately stops the DRV pulses. The

controller goes into auto−recovery mode in version B.

In version A, the controller is latched. In latch mode, the

DRV pulses stop and VCC ramps up and down. The circuit

un−latches when VCC pin voltage drops below V

CC(reset)

threshold.

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18

NCL30081

S

aux

Q

DRV

latch

Vdd

Q

VCC

CS

R

Vcc

management

LEB1

+

PWMreset

Ipkmax

Rsense

−

Vcontrol

VCCstop

UVLO

+

grand

reset

8_HICC

OVP

−

V

ILIMIT

OVP

STOP

LEB2

+

WOD_SCP

latch

−

S

OFF

WOD_SCP

S

R

V

Q

CS(stop)

Q

R

8_HICC

grand

reset

from Fault Management Block

Figure 45. Winding Short Circuit Protection, Max. Peak Current Limit Circuits

Step Dimming

Note:

The step dimming function decreases the output current

from 100% to 5% of its nominal value in discrete steps.

There are 5 steps in total. Table 4 shows the different steps

value and the corresponding output current set−point. Each

time a brown−out is detected, the output current is decreased

The power supply designer must ensure that V stays

high enough when the light is turned−off to let the controller

memorize the dimming step state.

CC

The power supply designer should use a split V circuit

CC

for step dimming with a capacitor allowing providing

by decreasing the reference voltage V

current value.

setting the output

enough V for 1 s (47 mF to 100 mF capacitor).

REF

CC

The step dimming state is memorized by the controller

When the 5% dimming step is reached, if a brown−out

event occurs, the controller restarts at 100% of the output

current.

until V crosses V

.

CC

CC(reset)

Table 4. DIMMING STEPS

Dimming Step

I

Perceived Light

out

ON

1

100%

70%

40%

25%

10%

5%

100%

84%

63%

50%

32%

17%

VCC

2

3

4

5

4.7 mF

47 − 100 mF

Figure 46. Split VCC Supply

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19

NCL30081

V

bulk

V

bulk(on)

bulk(off)

V

CC

V

CC(on)

V

CC(off)

V

CC(reset)

BO

comp

100%

I

out

70%

40%

25%

10%

5%

Figure 47. Step Dimming Chronograms

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20

NCL30081

V_CCOver Voltage Protection (Open LED Protection)

If no output load is connected to the LED power supply,

the controller must be able to safely limit the output voltage

excursion.

In the NCL30081, when the V voltage reaches the

CC

V

threshold, the controller stops the DRV pulses and

CC(OVP)

the 4−s timer starts counting. The IC re−start switching after

the 4−s timer has elapsed as long as V ≥ V

. This is

CC(on)

CC

illustrated in Figure 48.

40.0

V

CC(OVP)

30.0

20.0

10.0

0

V

1

CC

V

CC(on)

V

CC(off)

40.0

30.0

20.0

10.0

0

V

2

out

800m

600m

400m

200m

0

I

3

4

out

8.00

6.00

4.00

2.00

0

OVP

1.38

3.96

6.54

9.11

11.7

time in seconds

Figure 48. Open LED Protection Chronograms

Valley Lockout

Quasi−Square wave resonant systems have a wide

switching frequency excursion. The switching frequency

increases when the output load decreases or when the input

voltage increases. The switching frequency of such systems

must be limited.

The NCL30081 changes valley as the input voltage

increases and as the output current set−point is varied

(thermal fold−back and step dimming). This limits the

switching frequency excursion. Once a valley is selected,

the controller stays locked in the valley until the input

voltage or the output current set−point varies significantly.

This avoids valley jumping and the inherent noise caused by

this phenomenon.

The input voltage is sensed by the VIN pin. The internal

logic selects the operating valley according to VIN pin

voltage (Figure 49) and the dimming state imposed by the

Step Dimming feature.

By default, when the output current is not dimmed, the

controller operates in the first valley at low line and in the

second valley at high line.

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21

NCL30081

Vbulk

VIN

+

LLine

HLine

25−ms blanking time

−

2.4 V if LLine low

2.3 V if LLine high

Figure 49. Line Range Detection

VIN pin voltage for valley change

Table 5. VALLEY SELECTION

I

value at which the

I

value at which the

out

V

VIN

decreases

2.3 V

controller changes valley

(I decreasing)

out

(I increasing)

out

0

−LL−

−HL−

5 V

100%

75%

100%

st

nd

1

2

78%

nd

rd

2

3

50%

30%

15%

6%

53%

33%

20%

8%

th

4

5

th

7

8

th

11

12

th

13

15

0%

0

−LL−

2.4 V

−HL−

5 V

V

VIN

increases

VIN pin voltage for valley change

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22

NCL30081

Zero Crossing Detection Block

the valleys. To avoid such a situation, the NCL30081

The ZCD pin allows detecting when the drain−source

voltage of the power MOSFET reaches a valley.

A valley is detected when the voltage on pin 1 crosses

features a Time−Out circuit that generates pulses if the

voltage on ZCD pin stays below the V

threshold

ZCD(THD)

for 6.5 ms.

below the V

internal threshold.

The time−out also acts as a substitute clock for the valley

detection and simulates a missing valley in case of too

damped free oscillations.

ZCD(THD)

At startup or in case of extremely damped free

oscillations, the ZCD comparator may not be able to detect

V

ZCD

3

4

ZCD(THD)

The 3rd valley

is validated

high

low

14

12

2nd, 3rd

The 3rd valley is not detected

by the ZCD comp

The 2nd valley is detected

By the ZCD comparator

high

ZCD comp

TimeOut

low

15

16

high

low

Time−out circuit adds a pulse to

account for the missing 3rd valley

high

low

Clk

17

Figure 50. Time−out Chronograms

Normally with this type of time−out function, in the event

the ZCD pin or the auxiliary winding is shorted, the

controller could continue switching leading to improper

regulation of the LED current. Moreover during an output

short circuit, the controller will strive to maintain constant

current operation.

To avoid these scenarios, a protection circuit consisting of

a comparator and secondary timer starts counting when the

ZCD voltage is below the V

threshold. If this timer

ZCD(short)

reaches 90 ms, the controller detects a fault and shutdown.

The auto−restart version (B suffix) waits 4 seconds, then the

controller restarts switching. In the latched version

(A suffix), the controller is latched as long as V stays

CC

above the V

threshold.

CC(reset)

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23

NCL30081

Line Feed−forward

Because of internal and external propagation delays, the

MOSFET is not turned−off immediately when the current

set−point is reached. As a result, the primary peak current is

slightly higher than expected resulting in a small output

current error which can be compensated for during

component selection.

Normally this error would increase if the input line

voltage increased because the slew rate through the primary

inductance would increase. To compensate the peak current

increase brought by the variation, a positive voltage

proportional to the line voltage is added to the current sense

signal. The amount of offset voltage can be adjusted using

the R

resistor as shown in Figure 51. The offset voltage

LFF

is applied only during the MOSFET on−time and when I

out

is above 6% of the nominal output current.

Bulk rail

V

I

DD

VIN

CS

R

CS(offset)

LFF

R

sense

Q_drv

Offset_OK

Figure 51. Line Feed−forward Schematic

Brown−out

shuts−down if the VIN pin voltage decreases and stays

below 0.9 V for 50 ms nominal. Exiting a brown−out

In order to protect the supply against a very low input

voltage, the NCL30081 features a brown−out circuit with a

fixed ON/OFF threshold. The controller is allowed to start

if a voltage higher than 1 V is applied to the VIN pin and

condition overrides the hiccup on V (V does not wait

CC

to reach V ) and the IC immediately goes into startup

CC(off)

mode (I = I

).

CC

CC(start)

Vbulk

VIN

+

BO_NOK

50−ms blanking time

−

1 V if BONOK high

0.9 V if BONOK low

Figure 52. Brown−out Circuit

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24

NCL30081

160

120

80.0

40.0

0

V

Bulk

1

2

18.0

16.0

14.0

12.0

10.0

V

CC(on)

V

CC

V

CC(off)

1.10

900m

700m

500m

300m

V

BO(on)

BO(off)

V

pinVIN

3

8.00

6.00

4.00

2.00

0

50−ms Timer

BO_NOK low

=> Startup mode

BO_NOK

4

46.1m

138m

231m

time in seconds

323m

415m

Figure 53. Brown−Out Chronograms (Valley Fill circuit is used)

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25

NCL30081

CS Pin Short Circuit Protection

Normally, if the CS pin or the sense resistor is shorted to

ground, the Driver will not be able to turn off, leading to

potential damage of the power supply. To avoid this, the

NCL30081 features a circuit to protect the power supply

against a short circuit of the CS pin. When the MOSFET is

on, if the CS voltage stays below V after the adaptive

CS(low)

blanking timer has elapsed, the controller shuts down and

will attempt to restart on the next V hiccup.

CC

Adaptative

Blanking Time

V

VIN

Q_drv

CS

−

+

S

R

V

Q

CS_short

CS(low)

UVLO

BO_NOK

Figure 54. CS Pin Short Circuit Protection Schematic

Fault Management

In this mode, the DRV pulses are stopped and the

controller turn−off some circuits to decrease the internal

OFF Mode

consumption. V voltage decrease through the controller

The circuit turns off whenever a major condition prevents

it from operating:

CC

own consumption (I ).

CC1

For the output diode short circuit protection, the output /

• Incorrect feeding of the circuit: “UVLO high”. The

aux. winding short circuit protection and the V OVP, the

CC

UVLO signal becomes high when V drops below

CC

controller waits 4 seconds (auto−recovery timer) and then

V

CC(off)

and remains high until V exceeds V

.

CC

CC(on)

initiates a startup sequence (V

re−starting switching.

≥ V

) before

CC(on)

CC

• V OVP

CC

• Output diode short circuit protection: “WOD_SCP

high”

Latch Mode

This mode is activated by the output diode short−circuit

protection (WOD_SCP) and the Aux_SCP in version A

only.

• Output / Auxiliary winding Short circuit protection:

“Aux_SCP high”

• Die over temperature (TSD)

• Brown−Out: “BO_NOK” high

• Pin CS short circuited to GND: “CS_short high”

In this mode, the DRV pulses are stopped and the

controller is latched. There are hiccups on V

.

CC

The circuit un−latches when V < V

.

CC

CC(reset)

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26

NCL30081

Reset

Timer has

finished

counting

V

CC

> V

CC(on)

V

CC

< V

CC(off)

or

BO_NOK ↓

V _OVP

CC

BO_NOK high

or TSD

or CS_Short

Stop

4−s

Timer

V

CC

Disch.

BO_NOK high

or TSD

or CS_Short

WOD_SCP

or Aux_SCP

or V _OVP

CC

Run

V

CC

< V

CC(off)

With states: Reset

→

Controller is reset, I = I

CC CC(start)

Controller is ON, DRV is not switching

Normal switching

Stop

Run

V

CC

Disch.

No switching, I = I

, waiting for V to decrease to V

CC1 CC CC(off)

CC

4−s Timer

the auto−recovery timer is counting, V is ramping up and down between V

and V

CC(on) CC(off)

CC

Figure 55. State Diagram for B Version Faults

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27

NCL30081

Reset

Timer has

finished

counting

V

CC

> V

CC(on)

V

CC

< V

CC(off)

or

BO_NOK ↓

V

CC

< V

CC(reset)

BO_NOK high

or TSD

or CS_Short

4−s

Timer

V _OVP

CC

Stop

V

CC

Disch.

V _OVP

CC

BO_NOK high

or TSD

or CS_Short

Latch

Run

V

CC

< V

CC(off)

WOD_SCP or

Aux_SCP

With states: Reset

→

Controller is reset, I = I

CC CC(start)

Controller is ON, DRV is not switching

Normal switching

Stop

Run

V

CC

Disch.

No switching, I = I

, waiting for V to decrease to V

CC1 CC CC(off)

CC

4−s Timer

Latch

the auto−recovery timer is counting, V is ramping up and down between V

and V

CC

CC(on) CC(off)

Controller is latched off, V is ramping up and down between V

and V

,

CC

CC(on)

CC(off)

only V

can release the latch.

CC(reset)

Figure 56. State Diagram for A Version Faults

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28

NCL30081

PACKAGE DIMENSIONS

TSOP−6

CASE 318G−02

ISSUE V

NOTES:

D

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

H

3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM

LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.

4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,

PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR

GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D

AND E1 ARE DETERMINED AT DATUM H.

6

1

5

2

4

L2

GAUGE

PLANE

E1

E

5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.

3

L

MILLIMETERS

SEATING

PLANE

M

C

NOTE 5

DIM

A

A1

b

c

D

E

E1

e

MIN

0.90

0.01

0.25

0.10

2.90

2.50

1.30

0.85

0.20

NOM

1.00

MAX

1.10

0.10

0.50

0.26

3.10

3.00

1.70

1.05

0.60

b

DETAIL Z

e

0.06

0.38

0.18

3.00

c

2.75

A

0.05

1.50

0.95

L

0.40

A1

L2

M

0.25 BSC

−

DETAIL Z

0°

10°

RECOMMENDED

SOLDERING FOOTPRINT*

6X

0.60

6X

0.95

3.20

0.95

PITCH

DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

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29

NCL30081

OPTIONS

Controller

Output SCP

Winding/Output Diode SCP

Latched

NCL30081A

NCL30081B

Latched

Auto−recovery

ORDERING INFORMATION

Device

†

Package Marking

Package Type

Shipping

NCL30081ASNT1G

AAG

TSOP−6

3000 / Tape & Reel

(Pb−Free, Halide−Free)

NCL30081BSNT1G

AAH

TSOP−6

(Pb−Free, Halide−Free)

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

ON Semiconductor and

are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,

copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC

reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any

particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without

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NCL30081/D

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NCL30081ASNT1G NCL30081BSNT1G


型号：	NCL30081_13
厂家：	ONSEMI
描述：	Dimmable Quasi-Resonant Primary Side Current-Mode Controller for LED Lighting 可调光准谐振初级端电流模式控制器，用于LED照明控制器
文件：	总31页 (文件大小：309K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

NCL30081_13 [ONSEMI]

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