NCL30082B1DR2G [ONSEMI]
Dimmable Quasi-Resonant Primary Side Current-Mode Primary Side Current-Mode;型号: | NCL30082B1DR2G |
厂家: | ONSEMI |
描述: | Dimmable Quasi-Resonant Primary Side Current-Mode Primary Side Current-Mode |
文件: | 总35页 (文件大小:361K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NCL30082
Dimmable Quasi-Resonant
Primary Side Current-Mode
Controller for LED Lighting
with Thermal Fold-back
The NCL30082 is a PWM current mode controller targeting isolated
flyback and non−isolated constant current topologies. The controller
operates in a quasi−resonant mode to provide high efficiency. Thanks
to a novel control method, the device is able to precisely regulate a
constant LED current from the primary side. This removes the need
for secondary side feedback circuitry, biasing and an optocoupler.
The device is highly integrated with a minimum number of external
components. A robust suite of safety protection is built in to simplify
the design. This device supports analog/digital dimming as well as
thermal current fold−back. While the NCL30082 has integrated fixed
overvoltage protection, the designer has the flexibility to program a
lower OVP level.
www.onsemi.com
8
8
1
1
Micro8
DM SUFFIX
CASE 846A
SOIC−8
D SUFFIX
CASE 751
MARKING DIAGRAMS
8
AAx
AYWG
G
Features
• Quasi−resonant Peak Current−mode Control Operation
• Primary Side Sensing (no optocoupler needed)
1
AAx
x
= Specific Device Code
= C, D or H
= Assembly Location
= Year
• Wide V Range
CC
• Source 300 mA / Sink 500 mA Totem Pole Driver with 12 V Gate
Clamp
A
Y
W
G
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
• Precise LED Constant Current Regulation 1% Typical
• Line Feed−forward for Enhanced Regulation Accuracy
• Low LED Current Ripple
8
• 250 mV 2% Guaranteed Voltage Reference for Current Regulation
• ~0.9 Power Factor with Valley Fill Input Stage
• Low Start−up Current (13 mA typ.)
L30082x
ALYW
G
1
• Analog or Digital Dimming
• Thermal Fold−back
L30082x = Specific Device Code
x
= B, B1, B2, B3, D
= Assembly Location
= Wafer Lot
= Year
= Work Week
• Wide Temperature Range of −40 to +125°C
• Pb−Free, Halide−Free MSL1 Product
A
L
Y
W
G
• Robust Protection Features
♦ Over Voltage / LED Open Circuit Protection
♦ Over Temperature Protection
= Pb−Free Package
♦ Secondary Diode Short Protection
♦ Output Short Circuit Protection
♦ Shorted Current Sense Pin Fault Detection
♦ Latched and Auto−recoverable Versions
♦ Brown−out
PIN CONNECTIONS
1
SD
ZCD
CS
DIM
VIN
VCC
DRV
GND
♦ V Under Voltage Lockout
CC
♦ Thermal Shutdown
(Top View)
• These Devices are Pb−Free and Halogen Free/BFR Free
Typical Applications
ORDERING INFORMATION
• Integral LED Bulbs
• LED Power Driver Supplies
• LED Light Engines
See detailed ordering and shipping information on page 33 of
this data sheet.
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
January, 2015 − Rev. 5
NCL30082/D
NCL30082
.
.
Aux
.
V
8
7
6
5
DIM
1
2
3
4
Figure 1. Typical Application Schematic for NCL30082
Table 1. PIN FUNCTION DESCRIPTION
Pin No
Pin Name
Function
Pin Description
1
SD
Thermal Fold−back
and shutdown
Connecting an NTC to this pin allows reducing the output current down to 50%
of its fixed value before stopping the controller. A Zener diode can also be
used to pull−up the pin and stop the controller for adjustable OVP protection
2
3
4
5
ZCD
CS
Zero Crossing Detection
Current sense
−
Connected to the auxiliary winding, this pin detects the core reset event.
This pin monitors the primary peak current
The controller ground
GND
DRV
Driver output
The current capability of the totem pole gate drive (+0.3/−0.5 A) makes it suit-
able to effectively drive a broad range of power MOSFETs.
6
7
VCC
VIN
Supplies the controller
This pin is connected to an external auxiliary voltage.
Input voltage sensing
Brown−Out
This pin observes the HV rail and is used in valley selection. This pin also
monitors and protects for low mains conditions.
8
DIM
Analog / PWM dimming
This pin is used for analog or PWM dimming control. An analog signal than
can be varied between V
and V
can be used to vary the current,
DIM(EN)
DIM100
or a PWM signal with an amplitude greater than V
.
DIM100
www.onsemi.com
2
NCL30082
CS_shorted
Enable
V
REF
V
DD
STOP
Over Voltage
Protection
Aux_SCP
OFF
VCC
UVLO
Latch
Fault
Management
VCC Management
Over Temperature
Protection
Internal
Thermal
Shutdown
VCC_max
VCC Over Voltage
Protection
SD
Ipkmax
Thermal
Foldback
V
TF
WOD_SCP
BO_NOK
Qdrv
V
VIN
V
REF
V
CC
Clamp
Circuit
Zero Crossing Detection
offset_OK
ZCD
Valley Selection
Aux. Winding
DRV
Short Circuit Prot.
S
R
Qdrv
Aux_SCP
Q
V
VIN
offset_OK
V
VLY
Line
Feedforward
V
STOP
V
TF
REF
DIM
Dimming
Type
Detection
CS
Leading
Edge
Blanking
CS_reset
V
DIMA
Constant−Current
Control
Ipkmax
STOP
Enable
Enable
V
DIMA
Max. Peak
Current
Limit
V
VIN
Ipkmax
VIN
Brown−Out
BO_NOK
CS Short
Protection
CS_shorted
V
VIN
Winding and
Output diode
Short Circuit
Protection
WOD_SCP
Note: CS Short Protection is disabled
Note: for NCL30082B1
GND
Figure 2. Internal Circuit Architecture
www.onsemi.com
3
NCL30082
Table 2. MAXIMUM RATINGS TABLE
Symbol
Rating
Value
Unit
V
I
Maximum Power Supply voltage, VCC pin, continuous voltage
Maximum current for VCC pin
−0.3, +35
Internally limited
V
mA
CC(MAX)
CC(MAX)
V
I
Maximum driver pin voltage, DRV pin, continuous voltage
Maximum current for DRV pin
−0.3, V
(Note 1)
V
mA
DRV(MAX)
DRV(MAX)
DRV
−500, +800
V
I
Maximum voltage on low power pins (except pins ZCD, DIM, DRV and VCC)
Current range for low power pins (except pins ZCD, DRV and VCC)
−0.3, +5.5
−2, +5
V
mA
MAX
MAX
V
I
Maximum voltage for ZCD pin
Maximum current for ZCD pin
−0.3, +10
−2, +5
V
mA
ZCD(MAX)
ZCD(MAX)
V
Maximum voltage for DIM pin
−0.3, +10
V
DIM(MAX)
R
Thermal Resistance, Junction−to−Ambient (Note 4)
Micro8 version
°C/W
θ
JA
228
180
SOIC−8 version
Thermal Characterization Parameter, Junction−to−Case Top
Micro8 version
SOIC−8 version
50
45
Y
JC
°C/W
T
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
150
−40 to +125
−60 to +150
4
°C
°C
°C
kV
V
J(MAX)
ESD Capability, HBM model (Note 2)
ESD Capability, MM model (Note 2)
200
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. V
is the DRV clamp voltage V
when V is higher than V
. V
is V unless otherwise noted.
DRV
DRV(high)
CC
DRV(high) DRV CC
2. This device series contains ESD protection and exceeds the following tests: Human Body Model 4000 V per JEDEC JESD22−A114−F and
Machine Model Method 200 V per JEDEC JESD22−A115−A.
3. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78 except for VIN pin which passes 60 mA.
2
4. With a 100 mm , 2 oz copper area based on JEDEC EIA/JESD51-3 board design.
Table 3. ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values T = 25°C, V = 12 V;
J
CC
For min/max values T = −40°C to +125°C, Max T = 150°C, V = 12 V)
J
J
CC
Description
Test Condition
Symbol
Min
Typ
Max
Unit
STARTUP AND SUPPLY CIRCUITS
Supply Voltage
V
Startup Threshold
V
increasing
decreasing
decreasing
V
V
16
8.2
8
18
8.8
–
20
9.4
–
CC
CC(on)
Minimum Operating Voltage
V
CC
V
CC
CC(off)
Hysteresis V
– V
V
CC(on)
CC(off)
CC(HYS)
CC(reset)
Internal logic reset
V
3.5
4.5
5.5
Over Voltage Protection
VCC OVP threshold
V
26
28
30
V
CC(OVP)
V
V
noise filter
t
–
–
5
–
–
ms
CC(off)
VCC(off)
noise filter−
t
I
20
CC(reset)
VCC(reset)
Startup current
I
–
–
13
46
30
60
mA
mA
CC(start)
Startup current in fault mode
CC(sFault)
Supply Current
mA
Device Disabled/Fault
V
> V
I
I
I
0.8
–
1.2
2.3
2.7
1.4
4.0
5.0
CC
CC(off)
CC1
CC2
CC3
Device Enabled/No output load on pin 5
F
= 65 kHz
sw
Device Switching (F = 65 kHz)
C
= 470 pF,
= 65 kHz
–
sw
DRV
F
sw
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. Guaranteed by design.
www.onsemi.com
4
NCL30082
Table 3. ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values T = 25°C, V = 12 V;
J
CC
For min/max values T = −40°C to +125°C, Max T = 150°C, V = 12 V)
J
J
CC
Description
Test Condition
Symbol
Min
Typ
Max
Unit
CURRENT SENSE
Maximum Internal current limit
V
0.95
250
1
1.05
350
V
ILIM
Leading Edge Blanking Duration for V
t
300
ns
ILIM
LEB
(T = −25°C to 125°C) (Not applicable for NCL30082D)
j
Leading Edge Blanking Duration for V
t
240
300
350
ns
ILIM
LEB
(T = −40°C to 125°C)
j
Input Bias Current
DRV high
I
–
–
0.02
50
–
150
1.65
–
mA
ns
V
bias
Propagation delay from current detection to gate off−state
Threshold for immediate fault protection activation
t
ILIM
V
1.35
–
1.5
120
–
CS(stop)
Leading Edge Blanking Duration for V
t
ns
ms
ms
CS(stop)
BCS
Blanking time for CS to GND short detection V
= 1 V
= 1 V
t
6
12
pinVIN
pinVIN
CS(blank1)
Blanking time for CS to GND short detection V
NCL30082D
t
t
8
10.7
14
CS(blank1)D
Blanking time for CS to GND short detection V
= 3.3 V
= 3.3 V
t
2
–
4
ms
ms
pinVIN
CS(blank2)
Blanking time for CS to GND short detection V
NCL30082D
2.6
3.6
4.6
pinVIN
CS(blank2)D
GATE DRIVE
Drive Resistance
DRV Sink
DRV Source
W
R
SNK
R
SRC
–
–
13
30
–
–
Drive current capability
DRV Sink (Note 6)
DRV Source (Note 6)
mA
I
I
–
–
500
300
–
–
SNK
SRC
Rise Time (10% to 90%)
Fall Time (90% to 10%)
DRV Low Voltage
C
C
= 470 pF
= 470 pF
t
–
–
8
40
30
–
–
–
–
ns
ns
V
DRV
DRV
r
t
f
V
= V
+0.2 V
CC(off)
V
CC
DRV(low)
C
= 470 pF,
DRV
R
= 33 kW
DRV
DRV High Voltage
V
DRV
= 30 V
= 470 pF,
= 33 kW
V
10
12
14
V
CC
DRV(high)
C
R
DRV
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. Guaranteed by design.
www.onsemi.com
5
NCL30082
Table 3. ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values T = 25°C, V = 12 V;
J
CC
For min/max values T = −40°C to +125°C, Max T = 150°C, V = 12 V)
J
J
CC
Description
Test Condition
Symbol
Min
Typ
Max
Unit
ZERO VOLTAGE DETECTION CIRCUIT
ZCD threshold voltage
V
increasing
decreasing
increasing
V
25
5
45
25
–
65
45
–
mV
mV
mV
V
ZCD
ZCD(THI)
ZCD(THD)
ZCD(HYS)
ZCD(short)
ZCD threshold voltage (Note 6)
ZCD hysteresis (Note 6)
V
ZCD
V
V
V
ZCD
10
0.8
Threshold voltage for output short circuit or aux. winding
short circuit detection
V
1
1.2
Short circuit detection Timer
Auto−recovery timer duration
V
ZCD
< V
t
OVLD
70
3
90
4
110
5
ms
s
ZCD(short)
t
recovery
Input clamp voltage
High state
Low state
V
I
= 3.0 mA
= −2.0 mA
V
V
–
−0.9
9.5
−0.6
–
−0.3
pin1
CH
I
pin1
CL
Propagation Delay from valley detection to DRV high
Equivalent time constant for ZCD input (Note 6)
Blanking delay after on−time
V
ZCD
decreasing
t
–
–
–
20
3
150
–
ns
ns
ms
ms
DEM
t
PAR
t
2.25
1.2
3.75
2.0
BLANK
Blanking delay after on−time NCL30082B2 and
NCL30082B3
t
1.6
BLANKB2
Timeout after last demag transition
t
5
6.5
8
ms
TIMO
CONSTANT CURRENT CONTROL
Reference Voltage at T = 25°C
V
V
245
242.5
495
492
488
329
325
321
–
250
250
500
500
500
333
333
333
125
125
55
255
257.5
505
508
512
337
341
345
–
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
J
REF
Reference Voltage T = −40°C to 125°C
J
REF
Reference Voltage NCL30082D (T = 25°C)
V
REFD
V
REFD
V
REFD
J
Reference Voltage NCL30082D (T = 0°C to 85°C)
J
Reference Voltage NCL30082D (T = −40°C to 125°C)
J
Reference Voltage NCL30082B3 (T = 25°C)
V
REFB3
V
REFB3
V
REFB3
J
Reference Voltage NCL30082B3 (T = 0°C to 85°C)
J
Reference Voltage NCL30082B3 (T = −40°C to 125°C)
J
50% reference voltage (for thermal foldback)
V
REF50
25% reference voltage (for thermal foldback) NCL30082D
V
−
−
REF25D
Current sense lower threshold for detection of the
leakage inductance reset time
V
30
80
CS(low)
LINE FEED−FORWARD
V
to I
conversion ratio
K
15
67.5
–
17
76.5
37.5
50
19
85.5
–
mA/V
mA
VIN
CS(offset)
LFF
I
offset(MAX)
Offset current maximum value
V
= 4.5 V
pinVIN
V
REF
V
REF
value below which the offset current source is turned off
value above which the offset current source is turned on
V
REF
decreases
increases
V
V
mV
mV
REF(off)
REF(on)
V
REF
–
–
VALLEY SELECTION
Threshold for line range detection V increasing
V
increases
decreases
V
HL
2.28
2.18
15
2.4
2.3
25
2.52
2.42
35
V
V
in
VIN
st
nd
(1 to 2 valley transition for V
> 0.75 V)
REF
Threshold for line range detection V decreasing
V
VIN
V
LL
in
nd
st
(2 to 1 valley transition for V
> 0.75 V)
REF
Blanking time for line range detection
t
ms
HL(blank)
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. Guaranteed by design.
www.onsemi.com
6
NCL30082
Table 3. ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values T = 25°C, V = 12 V;
J
CC
For min/max values T = −40°C to +125°C, Max T = 150°C, V = 12 V)
J
J
CC
Description
Test Condition
Symbol
Min
Typ
Max
Unit
VALLEY SELECTION
Valley thresholds
mV
st
nd
nd
rd
1
2
2
4
4
7
7
to 2 valley transition at LL and 2 to 3 valley HL
V
V
V
V
V
decreases
increases
decreases
increases
decreases
increases
decreases
increases
decreases
increases
V
V
V
V
V
V
177.5 187.5 197.5
185.0 195.0 205.0
117.5 125.0 132.5
125.0 132.5 140.0
REF
VLY1−2/2−3
VLY2−1/3−2
VLY2−4/3−5
VLY4−2/5−3
VLY4−7/5−8
VLY7−4/8−5
nd
nd
th
th
th
th
st
rd
nd
to 1 valley transition at LL and 3 to 2 valley HL
V
REF
REF
th
rd
th
to 4 valley transition at LL and 3 to 5 valley HL
nd
th
rd
to 2 valley transition at LL and 5 to 3 valley HL
V
REF
REF
th
th
th
to 7 valley transition at LL and 5 to 8 valley HL
–
–
–
–
–
–
75.0
82.5
37.5
50.0
15.0
20.0
–
–
–
–
–
–
th
th
th
to 4 valley transition at LL and 8 to 5 valley HL
V
REF
REF
th
th
th
to 11 valley transition at LL and 8 to 12 valley HL
V
V
VLY7−11/8−12
VLY11−7/12−8
th
th
th
th
11 to 7 valley transition at LL and 12 to 8 valley HL
V
REF
REF
th
th
th
th
11 to 13 valley transition at LL and 12 to 15 valley HL
V
V
VLY11−13/12−15
VLY13−11/15−12
th
th
th
th
13 to 11 valley transition at LL and 15 to 12 valley HL
V
REF
DIMMING SECTION
DIM pin voltage for zero output current (OFF voltage)
DIM pin voltage for maximum output current
Dimming range
V
0.66
2.25
–
0.7
2.45
1.75
7.8
0.74
2.65
–
V
V
DIM(EN)
V
DIM100
V
V
DIM(range)
Clamping voltage for DIM pin
V
–
–
V
DIM(CLP)
Dimming pin pull−up current source
I
–
280
–
nA
DIM(pullup)
THERMAL FOLD−BACK AND OVP
Reference current for direct connection of an NTC (Note 6)
SD pin voltage at which thermal fold−back starts
SD pin voltage at which thermal fold−back stops
I
80
0.9
85
1
90
1.1
OTP(REF)
V
V
V
V
TF(start)
0.64
0.68
0.72
TF(stop)
(I = 50% I
)
out
out(nom)
SD pin voltage at which thermal fold−back stops
NCL30082D (I = 25% I
V
0.86
0.90
0.94
V
TF(stop)D
)
out(nom)
out
Reference current for direct connection of an NTC
Fault detection level for OTP
I
80
85
90
mA
V
OTP(REF)
V
decreasing
increasing
V
0.47
0.81
0.64
0.5
0.53
0.89
0.72
SD
OTP(off)
Fault detection level for OTP NCL30082D
V
0.85
0.68
V
OTP(off)D
SD pin level at which controller re−start switching after OTP
detection
V
V
V
SD
OTP(on)
SD pin level at which controller re−start switching after OTP
detection NCL30082D
V
0.86
0.9
0.94
V
OTP(on)D
SD pin Over temperature Protection Hysteresis NCL30082D
V
15
10.8
7.4
5.4
7.4
9.9
9.4
9.9
50
11.7
8.0
100
12.6
8.6
mV
kW
kW
kW
kW
kW
kW
kW
OTP(hys)D
V
V
V
V
V
V
V
over I
over I
over I
over I
over I
over I
over I
ratio (Note 5)
T = +25°C to +125°C
R
TF(start)
TF(stop)
OTP(off)
OTP(on)
TF(stop)
OTP(off)
OTP(on)
OTP(REF)
OTP(REF)
OTP(REF)
OTP(REF)
OTP(REF)
OTP(REF)
OTP(REF)
J
TF(start)
TF(stop)
OTP(off)
OTP(on)
ratio (Note 5)
T = +25°C to +125°C
J
R
ratio (Note 5)
T = +25°C to +125°C
J
R
R
5.9
6.4
ratio (Note 5)
T = +25°C to +125°C
J
8.0
8.6
ratio NCL30082D (Note 5)
ratio NCL30082D (Note 5)
ratio NCL30082D (Note 5)
T = +25°C to +125°C
J
R
R
R
10.5
10.0
10.5
11.1
10.6
11.1
TF(stop)D
OTP(off)D
OTP(on)D
T = +25°C to +125°C
J
T = +25°C to +125°C
J
5. A NTC is generally placed between the SD and GND pins. Parameters R
, R
, R
and R
give the resistance the
TF(start) TF(stop) OTP(off)
OTP(on)
NTC must exhibit to respectively, enter thermal foldback, stop thermal foldback, trigger the OTP limit and allow the circuit recovery after
an OTP situation.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. Guaranteed by design.
www.onsemi.com
7
NCL30082
Table 3. ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values T = 25°C, V = 12 V;
J
CC
For min/max values T = −40°C to +125°C, Max T = 150°C, V = 12 V)
J
J
CC
Description
THERMAL FOLD−BACK AND OVP
Test Condition
Symbol
Min
Typ
Max
Unit
Timer duration after which the controller is allowed to start
pulsing
t
180
–
300
ms
OTP(start)
Clamped voltage (SD pin left open)
Clamp series resistor
SD pin open
V
1.13
–
1.35
1.6
2.5
30
1.57
–
V
kW
V
SD(clamp)
R
SD(clamp)
SD pin detection level for OVP
Delay before OVP or OTP confirmation (OVP and OTP)
THERMAL SHUTDOWN
V
SD
increasing
V
OVP
2.35
15
2.65
45
T
ms
SD(delay)
Thermal Shutdown (Note 6)
Device switching
around 65 kHz)
T
130
–
150
50
170
–
°C
°C
SHDN
(F
SW
Thermal Shutdown Hysteresis (Note 6)
BROWN−OUT
T
SHDN(HYS)
Brown−Out ON level (IC start pulsing)
Brown−Out OFF level (IC shuts down)
BO comparators delay
V
increasing
decreasing
V
V
0.90
0.85
–
1
0.9
30
50
15
–
1.10
0.95
–
V
V
SD
BO(on)
V
SD
BO(off)
t
ms
ms
ms
nA
BO(delay)
BO(blank)
Brown−Out blanking time
t
35
65
Brown−Out blanking time NCL30082D
Brown−out pin bias current
t
10.5
−250
19.5
250
BO(blank)D
I
BO(bias)
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. Guaranteed by design.
www.onsemi.com
8
NCL30082
TYPICAL CHARACTERISTICS
18.20
18.15
18.10
18.05
18.00
8.90
8.85
8.80
8.75
8.70
17.95
17.90
8.65
8.60
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 3. VCC(on) vs. Junction Temperature
Figure 4. VCC(off) vs. Junction Temperature
27.80
27.75
18
17
16
15
14
13
12
27.70
27.65
27.60
27.55
27.50
11
10
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 5. VCC(OVP) vs. Junction Temperature
Figure 6. ICC(start) vs. Junction Temperature
52
50
48
46
44
1.30
1.28
1.26
1.24
1.22
1.20
1.18
1.16
42
40
1.14
1.12
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 7. ICC(sFault) vs. Junction Temperature
Figure 8. ICC1 vs. Junction Temperature
www.onsemi.com
9
NCL30082
TYPICAL CHARACTERISTICS
2.40
2.35
2.30
2.25
2.20
2.85
2.80
2.75
2.70
2.65
2.60
2.55
2.15
2.10
2.50
2.45
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 9. ICC2 vs. Junction Temperature
Figure 10. ICC3 vs. Junction Temperature
1.000
0.995
1.495
1.490
1.485
0.990
0.985
0.980
1.480
1.475
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 11. VILIM vs. Junction Temperature
Figure 12. VCS(stop) vs. Junction Temperature
305
303
1.010
1.005
1.000
0.995
0.990
301
299
297
295
293
291
289
0.985
0.980
287
285
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 13. tLEB vs. Junction Temperature
Figure 14. VZCD(short) vs. Junction
Temperature
www.onsemi.com
10
NCL30082
TYPICAL CHARACTERISTICS
3.20
3.15
3.10
7.1
7.0
6.9
6.8
6.7
3.05
3.00
6.6
6.5
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 15. tBLANK vs. Junction Temperature
Figure 16. tTIMO vs. Junction Temperature
255
254
253
55.0
54.5
54.0
252
251
53.5
53.0
250
249
52.5
52.0
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 17. VREF vs. Junction Temperature
Figure 18. VCS(low) vs. Junction Temperature
16.60
16.55
16.50
16.45
16.40
37.6
37.5
37.4
37.3
37.2
16.35
16.30
37.1
37.0
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 19. KLFF vs. Junction Temperature
Figure 20. VREF(off) vs. Junction Temperature
www.onsemi.com
11
NCL30082
TYPICAL CHARACTERISTICS
49.0
48.5
48.0
47.5
47.0
46.5
46.0
45.5
45.0
2.400
2.395
2.390
2.385
2.380
2.375
2.370
44.5
44.0
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 21. VREF(on) vs. Junction Temperature
Figure 22. VHL vs. Junction Temperature
2.300
2.295
2.290
2.285
28.0
27.5
27.0
2.280
26.5
26.0
2.275
2.270
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 23. VLL vs. Junction Temperature
Figure 24. tHL(BLANK) vs. Junction Temperature
187.0
186.5
186.0
185.5
185.0
198
197
196
195
194
193
184.5
184.0
192
191
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 25. VVLY1−2/2−3 vs. Junction
Temperature
Figure 26. VVLY2−1/3−2 vs. Junction
Temperature
www.onsemi.com
12
NCL30082
TYPICAL CHARACTERISTICS
125.0
124.5
124.0
123.5
123.0
136
135
134
133
132
122.5
122.0
131
130
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 27. VVLY2−4/3−5 vs. Junction
Temperature
Figure 28. VVLY4−2/5−3 vs. Junction
Temperature
76.0
75.5
75.0
87
86
85
84
83
82
74.5
74.0
73.5
73.0
81
80
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 29. VVLY4−7/5−8 vs. Junction
Temperature
Figure 30. VVLY7−4/8−5 vs. Junction
Temperature
37.7
37.6
37.5
50
49
48
47
46
45
37.4
37.3
37.2
37.1
37.0
44
43
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 31. VVLY7−11/8−12 vs. Junction
Temperature
Figure 32. VVLY11−7/12−8 vs. Junction
Temperature
www.onsemi.com
13
NCL30082
TYPICAL CHARACTERISTICS
15.10
15.05
15.00
14.95
14.90
14.85
14.80
21.0
20.5
20.0
19.5
19.0
18.5
18.0
17.5
17.0
14.75
14.70
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 33. VVLY11−13/12−15 vs. Junction
Temperature
Figure 34. VVLY13−11/15−12 vs. Junction
Temperature
0.710
0.705
2.46
2.45
0.700
2.44
0.695
0.690
2.43
2.42
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 35. VDIM(EN) vs. Junction Temperature
Figure 36. VDIM(100) vs. Junction Temperature
88.0
87.5
87.0
86.5
86.0
85.5
85.0
4.55
4.50
4.45
4.40
4.35
4.30
84.5
84.0
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 37. tOVLD vs. Junction Temperature
Figure 38. trecovery vs. Junction Temperature
www.onsemi.com
14
NCL30082
TYPICAL CHARACTERISTICS
2.500
2.495
2.490
2.485
2.480
86.5
86.0
85.5
85.0
84.5
84.0
2.475
2.470
83.5
83.0
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 39. VOVP vs. Junction Temperature
Figure 40. IOTP(ref) vs. Junction Temperature
0.690
0.688
0.686
0.684
0.997
0.995
0.993
0.991
0.989
0.682
0.680
0.987
0.985
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 41. VOTP(on), VTF(stop) vs. Junction
Temperature
Figure 42. VTF(start) vs. Junction Temperature
0.994
0.992
0.990
0.988
0.986
0.906
0.904
0.902
0.900
0.898
0.896
0.984
0.982
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 43. VBO(on) vs. Junction Temperature
Figure 44. VBO(off) vs. Junction Temperature
www.onsemi.com
15
NCL30082
TYPICAL CHARACTERISTICS
504
503
502
501
130
129
128
127
126
125
124
123
122
500
499
498
497
496
121
120
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 45. VREFD vs. Junction Temperature
Figure 46. VREF25D vs. Junction Temperature
0.900
0.898
0.896
0.894
0.892
0.890
0.850
0.848
0.846
0.844
0.842
0.840
0.888
0.886
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 47. VOTP(off)D vs. Junction Temperature
Figure 48. VOTP(on)D, VTF(stop)D vs. Junction
Temperature
48.2
48.0
47.8
47.6
47.4
47.2
15.5
15.4
15.3
15.2
15.1
15.0
47.0
46.8
14.9
14.8
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 49. VOTP(HYS)D vs. Junction
Temperature
Figure 50. tBO(BLANK)D vs. Junction
Temperature
www.onsemi.com
16
NCL30082
TYPICAL CHARACTERISTICS
56.0
55.5
55.0
54.5
54.0
53.5
53.0
52.5
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
Figure 51. tBO(BLANK) vs. Junction Temperature
APPLICATION INFORMATION
The NCL30082 implements a current−mode architecture
temperature exceeds a prescribed level. If the
temperature continues to increase, the current will be
further reduced until the controller is stopped. The
control will automatically restart if the temperature is
reduced. This pin can implement a programmable OVP
shutdown that can also auto−restart the device.
• Brown−Out: the controller includes a brown−out
circuit which safely stops the controller in case the
input voltage is too low. The device will automatically
restart if the line recovers.
operating in quasi−resonant mode. Thanks to proprietary
circuitry, the controller is able to accurately regulate the
secondary side current of the flyback converter without
using any opto−coupler or measuring directly the secondary
side current.
• Quasi−Resonance Current−Mode Operation:
implementing quasi−resonance operation in peak
current−mode control, the NCL30082 optimizes the
efficiency by switching in the valley of the MOSFET
drain−source voltage. Thanks to a smart control
algorithm, the controller locks−out in a selected valley
and remains locked until the input voltage or the output
current set point significantly changes.
• Cycle−by−cycle peak current limit: when the current
sense voltage exceeds the internal threshold V
, the
ILIM
MOSFET is turned off for the rest of the switching
cycle.
• Primary Side Constant Current Control: thanks to a
proprietary circuit, the controller is able to compensate
for the leakage inductance of the transformer and allow
accurate control of the secondary side current.
• Winding Short−Circuit Protection: an additional
comparator with a short LEB filter (t
) senses the CS
BCS
signal and stops the controller if V reaches 1.5 x
CS
V . For noise immunity reasons, this comparator is
ILIM
• Line Feed−forward: compensation for possible
variation of the output current caused by system slew
rate variation.
enabled only during the main LEB duration t
.
LEB
• Output Short−circuit protection: If a very low
voltage is applied on ZCD pin for 90 ms (nominal), the
controllers assume that the output or the ZCD pin is
shorted to ground and enters shutdown. The
• Open LED protection: if the voltage on the VCC pin
exceeds an internal limit, the controller shuts down and
waits 4 seconds before restarting switching.
• Thermal Fold−back / Over Temperature / Over
Voltage Protection: by combining a dual threshold on
the SD pin, the controller allows the direct connection
of an NTC to ground plus a Zener diode to a monitored
voltage. The temperature is monitored and the output
current is linearly reduced in the event that the
auto−restart version (B suffix) waits 4 seconds, then the
controller restarts switching. In the latched version (A
suffix), the controller is latched as long as V stays
CC
above the V
threshold.
CC(reset)
• Linear or PWM dimming: the DIM pin allows
implementing both analog and PWM dimming.
www.onsemi.com
17
NCL30082
Constant Current Control
Figure 53 portrays the primary and secondary current of
a flyback converter in discontinuous conduction mode
(DCM). Figure 52 shows the basic circuit of a flyback
converter.
Transformer
V
bulk
L
leak
N
sp
R
clp
V
out
C
clp
L
p
Clamping
network
DRV
C
lump
R
sense
Figure 52. Basic Flyback Converter Schematic
During the on−time of the MOSFET, the bulk voltage
is applied to the magnetizing and leakage inductors L
When the diode conducts, the secondary current decreases
linearly from I to zero. When the diode current has
V
bulk
p
D,pk
and L
and the current ramps up.
turned off, the drain voltage begins to oscillate because of
the resonating network formed by the inductors (L +L
leak
When the MOSFET is turned−off, the inductor current
first charges C . The output diode is off until the voltage
across L reverses and reaches:
)
leak
p
and the lump capacitor. This voltage is reflected on the
auxiliary winding wired in flyback mode. Thus, by looking
at the auxiliary winding voltage, we can detect the end of the
conduction time of secondary diode. The constant current
control block picks up the leakage inductor current, the end
of conduction of the output rectifier and controls the drain
current to maintain the output current constant.
lump
p
ǒ
Ǔ
Nsp Vout ) Vf
(eq. 1)
The output diode current increase is limited by the leakage
inductor. As a consequence, the secondary peak current is
reduced:
We have:
IL,pk
ID,pk
t
(eq. 2)
VREF
2NspRsense
Nsp
(eq. 3)
Iout
+
The diode current reaches its peak when the leakage inductor
is reset. Thus, in order to accurately regulate the output
current, we need to take into account the leakage inductor
current. This is accomplished by sensing the clamping
network current. Practically, a node of the clamp capacitor
The output current value is set by choosing the sense
resistor:
Vref
(eq. 4)
Rsense
+
2NspIout
is connected to R
Then, by reading the voltage on the CS pin, we have an
image of the primary current (red curve in Figure 53).
instead of the bulk voltage V
.
sense
bulk
From Equation 3, the first key point is that the output
current is independent of the inductor value. Moreover, the
leakage inductance does not influence the output current
value as the reset time is taken into account by the controller.
www.onsemi.com
18
NCL30082
I
L,pk
N
I
sp D,pk
I
pri
(t)
I
(t)
sec
time
t
1
t
2
t
on
t
demag
V
aux
(t)
time
Figure 53. Flyback Currents and Auxiliary Winding Voltage in DCM
Internal Soft−Start
At startup or after recovering from a fault, there is a small
internal soft−start of 40 ms.
In addition, during startup, as the output voltage is zero
volts, the demagnetization time is long and the constant
current control block will slowly increase the peak current
towards its nominal value as the output voltage grows.
Figure 54 shows a soft−start simulation example for a 9 W
LED power supply.
www.onsemi.com
19
NCL30082
16.0
12.0
8.00
4.00
0
V
out
1
800m
600m
400m
200m
0
I
2
out
800m
600m
400m
200m
0
V
V
4
3
Control
CS
604u
1.47m
2.34m
3.21m
4.07m
time in seconds
Figure 54. Startup Simulation Showing the Natural Soft−start
Cycle−by−Cycle Current Limit
Winding and Output Diode Short−Circuit Protection
When the current sense voltage exceeds the internal
In parallel with the cycle−by−cycle sensing of the CS pin,
threshold V , the MOSFET is turned off for the rest of the
ILIM
another comparator with a reduced LEB (t ) and a higher
BCS
switching cycle (Figure 55).
threshold (1.5 V typical) is able to sense winding
short−circuit and immediately stops the DRV pulses. The
controller goes into auto−recovery mode in version B, B1,
B2, B3 and D.
In version A, the controller is latched. In latch mode, the
DRV pulses stop and VCC ramps up and down. The circuit
un−latches when VCC pin voltage drops below V
threshold.
CC(reset)
www.onsemi.com
20
NCL30082
S
aux
DRV
Q
Vdd
Q
latch
VCC
CS
R
Vcc
management
LEB1
+
−
PWMreset
Ipkmax
Rsense
Vcontrol
VCCstop
UVLO
+
−
grand
reset
8_HICC
OVP
V
ILIMIT
OVP
STOP
LEB2
+
−
WOD_SCP
latch
S
OFF
WOD_SCP
S
R
V
Q
Q
CS(stop)
Q
Q
R
8_HICC
grand
reset
from Fault Management Block
Figure 55. Winding Short Circuit Protection, Max. Peak Current Limit Circuits
Thermal Fold−back and Over Voltage / Over
Temperature Protection
constant current control V
is decreased proportionally to
REF
V
V
. When V reaches V
, V
is clamped to
SD
SD
TF(stop)
REF
The thermal fold−back circuit reduces the current in the
LED string when the ambient temperature exceeds a set
point. The current is gradually reduced to 50% of its nominal
value if the temperature continues to rise. (Figure 56). The
thermal foldback starting temperature depends of the
Negative Coefficient Temperature (NTC) resistor chosen by
the power supply designer.
, corresponding to 50% of the nominal output current
REF50
(versions A, B, B1, B2, B3). For the NCL30082D, the output
current is decreased to 25% of the nominal output current.
If V drops below V , the controller enters into the
SD
OTP
auto−recovery fault mode for version B, B1, B2, B3 and D
meaning that the 4−s timer is activated. The controller will
re−start switching after the 4−s timer has elapsed and when
Indeed, the SD pin allows the direct connection of an NTC
to sense the ambient temperature. When the SD pin voltage
V
> V
to provide some temperature hysteresis.
SD
OTP(on)
For version A, this protection is latched: reset occurs when
< V
V
SD
drops below V
, the internal reference for the
TF(start)
V
CC
.
CC(reset)
I
out
Temperature increases
Temperature decreases
I
out
I
out(nom)
I
out(nom)
50% I
out(nom)
25% I
out(nom)
V
SD
V
SD
V
V
TF(start)
OTP(off)
V
TF(start)
V
V
V
OTP(off)
TF(stop)
OTP(on)
V
V
TF(stop)
OTP(on)
Figure 56. Output Current Reduction vs. SD Pin
Voltage for NCL30082 Versions A, B, B1, B2, B3
Figure 57. Output Current Reduction vs. SD Pin
Voltage for NCL30082D
www.onsemi.com
21
NCL30082
At startup, when V reaches V
not allowed to start pulsing for at least 180 ms in order to
, the controller is
filtering capacitor is connected to the SD pin. This is to avoid
flickering of the LED light in case of over temperature.
CC
CC(on)
allow the SD pin voltage to reach its nominal value if a
V
OVP
VCC
Vdd
noise delay
OVP
−
Dz
+
I
OTP(REF)
S
OFF
Q
Q
SD
OTP_Timer end
Rclamp
Vclamp
noise delay
R
−
+
OTP
NTC
4−s Timer
(OTP latched for version A)
S
0.5 V if OTP low
0.7 V if OTP high
V
OTP
Latch
Q
Q
V
TF
R
VCCreset
Figure 58. Thermal Fold−back and OVP/OTP Circuitry
In the case of excess voltage, the Zener diode starts to
conduct and inject current into the internal clamp resistor
this voltage reaches the OVP threshold (2.5 V typ.), the
controller shuts−down and waits for at least 4 seconds before
restarting switching.
R
clamp
thus causing the pin SD voltage to increase. When
www.onsemi.com
22
NCL30082
V
CC
V
V
CC(on)
CC(off)
V
CC
> V
:
CC(on)
DRV pulses restart
V
CC(reset)
V
DRV
4−s Timer
V
> V
:
SD
OVP
4−s timer has elapsed:
waiting for V > V
to restart DRV pulses
V
SD
controller stops
switching
CC
CC(on)
V
OVP
V
SD(clamp)
V
out
Figure 59. OVP with SD Pin Chronograms
www.onsemi.com
23
NCL30082
V
CC
V
CC(on)
V
CC(off)
V
CC(reset)
V
DRV
V
V
> V
> V
and
TF(stop)
SD
4−s Timer
:
CC
CC(on)
DRV pulses restart
V
< V
:
4−s timer has elapsed
SD
OTP(off)
V
SD
controller stops
switching
but V < V
SD
TF(stop)
≥ no restart
V
TF(start)
V
TF(stop)
OTP(off)
V
I
out
Figure 60. Thermal Fold−back / OTP Chronograms
PWM or Linear Dimming Detection
The pin DIM allows implementing either linear dimming
or PWM dimming of the LED light.
If the power supply designer apply an analog signal
If a voltage lower than V
the DRV pulses are disabled. Thus, for PWM dimming, a
PWM signal with a low state value < V and a high
is applied to the DIM pin,
DIM(EN)
DIM(EN)
varying from V
to V
to the DIM pin, the
state value > V
should be applied.
DIM(EN)
DIM100
DIM100
output current will increase or decrease proportionally to the
voltage applied. For V = V , the power supply
delivers the maximum output current.
The DIM pin is pulled up internally by a small current
source. Thus, if the pin is left open, the controller is able to
start.
DIM
DIM100
V
DIM
Analog dimming
PWM dimming
I
V
V
100%
0%
out
DIM100
I
DIM(EN)
out
Figure 61. Pin DIM Chronograms
Note:
• If a PWM voltage with a high state value < V
is
• Thermal Foldback and dimming: if the IC is in a
dimming state and the thermal foldback (TF) is
activated, the output current is further reduced to a
value equal to Dimming*TF.
DIM100
applied to the DIM pin, the product will still be in
PWM dimming mode, but the reference voltage will be
decreased according to V . This allows increased
DIM
dynamic range on the dimming control pin.
www.onsemi.com
24
NCL30082
VCC Over Voltage Protection (Open LED Protection)
If no output load is connected to the LED power supply,
the controller must be able to safely limit the output voltage
excursion.
In the NCL30082, when the V voltage reaches the
CC
V
threshold, the controller stops the DRV pulses and
CC(OVP)
the 4−s timer starts counting. The IC re−start pulsing after
the 4−s timer has elapsed and when V ≥ V
.
CC
CC(on)
40.0
V
CC(OVP)
30.0
V
CC
1
V
CC(on)
20.0
10.0
0
V
CC(off)
40.0
30.0
20.0
10.0
0
V
2
out
800m
600m
400m
200m
0
I
3
4
out
8.00
6.00
4.00
2.00
0
OVP
1.38
3.96
6.54
9.11
11.7
time in seconds
Figure 62. Open LED Protection Chronograms
Valley Lockout
or the output current set−point varies significantly. This
avoids valley jumping and the inherent noise caused by this
phenomenon.
The input voltage is sensed by the VIN pin (line range
detection in Figure 63). The internal logic selects the
operating valley according to VIN pin voltage, SD pin
voltage and DIM pin voltage.
By default, when the output current is not dimmed, the
controller operates in the first valley at low line and in the
second valley at high line.
Quasi−square wave resonant systems have a wide
switching frequency excursion. The switching frequency
increases when the output load decreases or when the input
voltage increases. The switching frequency of such systems
must be limited.
The NCL30082 changes the valley as the input voltage
increases and as the output current set−point is varied
(dimming and thermal fold−back). This limits the switching
frequency excursion. Once a valley is selected, the
controller stays locked in the valley until the input voltage
www.onsemi.com
25
NCL30082
Vbulk
VIN
+
−
LLine
HLine
25−ms blanking time
2.4 V if LLine low
2.3 V if LLine high
Figure 63. Line Range Detector
VIN pin voltage for valley change
Table 4. VALLEY SELECTION
I
value at which the
I
value at which the
out
out
V
VIN
decreases
2.3 V
controller changes valley
controller changes valley
(I decreasing)
out
(I increasing)
out
0
−LL−
−HL−
5 V
100%
75%
100%
st
nd
1
2
78%
nd
rd
2
3
50%
30%
15%
6%
53%
33%
20%
8%
th
th
4
5
th
th
7
8
th
th
11
12
th
th
13
15
0%
0%
0
−LL−
2.4 V
−HL−
5 V
V
VIN
increases
VIN pin voltage for valley change
www.onsemi.com
26
NCL30082
Zero Crossing Detection Block
The ZCD pin allows detecting when the drain−source
voltage of the power MOSFET reaches a valley.
the valleys. To avoid such a situation, the NCL30082
features a Time−Out circuit that generates pulses if the
voltage on ZCD pin stays below the V
threshold
ZCD(THD)
A valley is detected when the voltage on pin 1 crosses
for 6.5 ms.
below the V
internal threshold.
The time−out also acts as a substitute clock for the valley
detection and simulates a missing valley in case of too
damped free oscillations.
ZCD(THD)
At startup or in case of extremely damped free
oscillations, the ZCD comparator may not be able to detect
V
V
ZCD
3
4
ZCD(THD)
The 3rd valley
is validated
high
low
14
12
2nd, 3rd
The 3rd valley is not detected
by the ZCD comp
The 2nd valley is detected
By the ZCD comparator
high
ZCD comp
TimeOut
low
15
16
high
low
Time−out circuit adds a pulse to
account for the missing 3rd valley
high
low
Clk
17
Figure 64. Time−out Chronograms
Normally with this type of time−out function, in the event
the ZCD pin or the auxiliary winding is shorted, the
controller could continue switching leading to improper
regulation of the LED current. Moreover during an output
short circuit, the controller will strive to maintain constant
current operation.
To avoid these scenarios, a protection circuit consisting of
a comparator and secondary timer starts counting when the
ZCD voltage is below the V
threshold. If this timer
ZCD(short)
reaches 90 ms, the controller detects a fault and shutdown.
The auto−restart version (B, B1, B2, D suffix) waits 4
seconds, then the controller restarts switching. In the latched
version (A suffix), the controller is latched as long as V
CC
stays above the V
threshold.
CC(reset)
www.onsemi.com
27
NCL30082
Tblank
Time−Out
ZCD
+
−
Clock
V
.
ZCD(TH)
Tblank
+
−
V
ZCD(short)
90−ms
Timer
Enable_b
S
R
Q
Aux_SCP
Q
4−s Timer
Figure 65. ZCD Block Schematic
Line Feed−Forward
(eq. 5)
Because of the propagation delays, the MOSFET is not
turned−off immediately when the current set−point is
reached. As a result, the primary peak current is higher than
expected and the output current increases. To compensate
the peak current increase brought by the propagation delay,
a positive voltage proportional to the line voltage is added
on the current sense signal. The amount of offset voltage can
VCS(offset) + KLFFVpinVINRCS
The offset voltage is applied only during the MOSFET
on−time.
This offset voltage is removed at light load during
dimming when the output current drops below 15% of the
programmed output current.
be adjusted using the R resistor as shown in Figure 66.
CS
Bulk rail
V
I
DD
VIN
CS
R
CS(offset)
CS
R
sense
Q_drv
Offset_OK
Figure 66. Line Feed−Forward Schematic
www.onsemi.com
28
NCL30082
Brown−out
below 0.9 V for 50 ms nominal. For the NCL30082D, the
blanking time is reduced to 15 ms. Exiting a brown−out
In order to protect the supply against a very low input
voltage, the NCL30082 features a brown−out circuit with a
fixed ON/OFF threshold. The controller is allowed to start
if a voltage higher than 1 V is applied to the VIN pin and
shuts−down if the VIN pin voltage decreases and stays
condition overrides the hiccup on V (V does not wait
CC
CC
to reach V ) and the IC immediately goes into startup
CC(off)
mode (I = I
).
CC
CC(start)
Vbulk
VIN
+
BO_NOK
Blanking time
−
1 V if BONOK high
0.9 V if BONOK low
Figure 67. Brown−out Circuit
160
120
80.0
40.0
0
V
Bulk
1
2
18.0
16.0
14.0
12.0
10.0
V
CC(on)
V
CC
V
CC(off)
1.10
900m
700m
500m
300m
V
V
BO(on)
BO(off)
V
pinVIN
3
8.00
6.00
4.00
2.00
0
BO Blanking Time
BO_NOK low
=> Startup mode
BO_NOK
4
46.1m
138m
231m
time in seconds
323m
415m
Figure 68. Brown−Out Chronograms (Valley Fill circuit is used)
www.onsemi.com
29
NCL30082
CS Pin Short Circuit Protection
Normally, if the CS pin or the sense resistor is shorted to
ground, the Driver will not be able to turn off, leading to
potential damage of the power supply. To avoid this, the
versions A, B, B1, B2, B3 and D feature a circuit to protect
the power supply against a short circuit of the CS pin. When
the MOSFET is on, if the CS voltage stays below VCS(low)
after the adaptive blanking timer has elapsed, the controller
shuts down and will attempt to restart on the next VCC
hiccup. In the NCL30082B1, this protection is disabled.
Adaptative
Blanking Time
V
VIN
Q_drv
CS
−
+
S
R
V
Q
Q
CS_short
CS(low)
UVLO
BO_NOK
Figure 69. CS Pin Short Circuit Protection Schematic
Fault Management
In this mode, the DRV pulses are stopped. The VCC
voltage decrease through the controller own consumption
OFF Mode
(I ).
CC1
The circuit turns off whenever a major condition prevents
it from operating:
For the output diode short circuit protection, the CS pin
short circuit protection, the output / aux. winding short
circuit protection and the OVP2, the controller waits 4
seconds (auto−recovery timer) and then initiates a startup
• Incorrect feeding of the circuit: “UVLO high”. The
UVLO signal becomes high when V drops below
CC
V
CC(off)
and remains high until V exceeds V
.
CC
CC(on)
sequence (V ≥ V
) before re−starting switching.
CC
CC(on)
• OTP
Latch Mode
• V OVP
CC
This mode is activated by the output diode short−circuit
protection (WOD_SCP), the OTP and the Aux−SCP in
version A only.
• OVP2 (additional OVP provided by SD pin)
• Output diode short circuit protection: “WOD_SCP
high”
In this mode, the DRV pulses are stopped and the
• Output / Auxiliary winding Short circuit protection:
“Aux_SCP high”
controller is latched. There are hiccups on V
The circuit un−latches when V < V
.
CC
.
CC(reset)
CC
• Die over temperature (TSD)
• Brown−Out: “BO_NOK” high
• Pin CS short circuited to GND: “CS_short high”
www.onsemi.com
30
NCL30082
Timer has
finished
counting
V
CC
> V
CC(on)
V
CC
< V
CC(off)
or
BO_NOK ↓
OVP2 or
_OVP
BO_NOK high
or OTP
or TSD
V
CC
Stop
4−s
Timer
or CS_Short
V
CC
Disch.
BO_NOK high
or OTP
or TSD
or CS_Short
OVP2
or WOD_SCP
or Aux_SCP
or V _OVP
CC
Run
V
CC
< V
CC(off)
With states: Reset
→
→
→
→
→
Controller is reset, I = I
CC CC(start)
Controller is ON, DRV is not switching, t
Normal switching
Stop
Run
has elapsed
OTP(start)
V
CC
Disch.
No switching, I = I
, waiting for V to decrease to V
CC1 CC CC(off)
CC
4−s Timer
the auto−recovery timer is counting, V is ramping up and down between V
and V
CC(on) CC(off)
CC
Note: For the NCL30082B1, the CS pin short circuit Protection is disabled
Figure 70. State Diagram for B, B1, B2, B3 and D Version Faults
www.onsemi.com
31
NCL30082
Reset
Timer has
finished
counting
V
CC
> V
CC(on)
V
CC
< V
CC(off)
or
BO_NOK ↓
V
CC
< V
CC(reset)
OVP2 or
_OVP
BO_NOK high
or TSD
or CS_Short
V
4−s
Timer
CC
Stop
V
CC
Disch.
OTP
OVP2 or
V
CC
_OVP
BO_NOK high
or TSD
or CS_Short
Latch
Run
V
CC
< V
CC(off)
OTP or
WOD_SCP or
Aux_SCP
With states: Reset
→
→
→
→
→
→
Controller is reset, I = I
CC CC(start)
Controller is ON, DRV is not switching, t
Normal switching
Stop
Run
has elapsed
OTP(start)
V
CC
Disch.
No switching, I = I
, waiting for V to decrease to V
CC1 CC CC(off)
CC
4−s Timer
Latch
the auto−recovery timer is counting, V is ramping up and down between V
and V
CC
CC(on) CC(off)
Controller is latched off, V is ramping up and down between V
and V
,
CC
CC(on)
CC(off)
only V
can release the latch.
CC(reset)
Figure 71. State Diagram for A Version Faults
www.onsemi.com
32
NCL30082
OPTIONS
Winding/
Output
Diode SCP
Over
Temperature
Protection
CS Pin
Short
Protection
ZCD
Blanking
Brown-Out
blanking
Thermal
Foldback
Controller
Output SCP
V
REF
NCL30082A
Latched
Latched
Latched
Yes
Yes
No
250 mV
250 mV
250 mV
250 mV
333 mV
250 mV
333 mV
500 mV
3 ms
50 ms
50 ms
50 ms
50 ms
50 ms
50 ms
50 ms
15 ms
Smooth output
current
decrease
NCL30082B
Auto-recovery Auto-recovery Auto-recovery
3 ms
Smooth output
current
decrease
NCL30082B1 Auto-recovery Auto-recovery Auto-recovery
NCL30082B2 Auto-recovery Auto-recovery Auto-recovery
NCL30082B3 Auto-recovery Auto-recovery Auto-recovery
NCL30082B4 Auto-recovery Auto-recovery Auto-recovery
NCL30082B5 Auto-recovery Auto-recovery Auto-recovery
3 ms
Smooth output
current
decrease
Yes
Yes
No
1.5 ms
1.5 ms
1.5 ms
1.5 ms
3 ms
Smooth output
current
decrease
Smooth output
current
decrease
Smooth output
current
decrease
No
Smooth output
current
decrease
NCL30082D
Auto-recovery Auto-recovery Auto-recovery
Yes
Steep output
current
decrease
ORDERING INFORMATION
Device
†
Package Marking
Package Type
Shipping
NCL30082ADMR2G
AAC
Micro8
(Pb−Free, Halide−Free)
4000 / Tape & Reel
4000 / Tape & Reel
4000 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
NCL30082BDMR2G
NCL30082B1DMR2G
NCL30082BDR2G
NCL30082B1DR2G
NCL30082B2DR2G
NCL30082B3DR2G
NCL30082B4DR2G
NCL30082B5DR2G
NCL30082DDR2G
AAD
Micro8
(Pb−Free, Halide−Free)
AAH
Micro8
(Pb−Free, Halide−Free)
L30082B
L30082B1
L30082B2
L30082B3
L30082B4
L30082B5
L30082D
SOIC−8
(Pb−Free)
SOIC−8
(Pb−Free)
SOIC−8
(Pb−Free)
SOIC−8
(Pb−Free)
SOIC−8
(Pb−Free)
SOIC−8
(Pb−Free)
SOIC−8
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
33
NCL30082
PACKAGE DIMENSIONS
Micro8t
CASE 846A−02
ISSUE J
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. 846A-01 OBSOLETE, NEW STANDARD 846A-02.
H
E
E
MILLIMETERS
INCHES
NOM
−−
0.003
0.013
0.007
0.118
DIM
A
A1
b
c
D
MIN
−−
NOM
−−
MAX
MIN
−−
MAX
0.043
0.006
0.016
0.009
0.122
0.122
PIN 1 ID
e
1.10
0.15
0.40
0.23
3.10
3.10
b 8 PL
0.05
0.25
0.13
2.90
2.90
0.08
0.002
0.010
0.005
0.114
0.114
0.33
M
S
S
0.08 (0.003)
T B
A
0.18
3.00
E
3.00
0.118
e
L
H
E
0.65 BSC
0.55
4.90
0.026 BSC
0.021
0.193
SEATING
PLANE
0.40
4.75
0.70
5.05
0.016
0.187
0.028
0.199
−T−
A
0.038 (0.0015)
L
A1
c
RECOMMENDED
SOLDERING FOOTPRINT*
8X
8X
0.48
0.80
5.25
0.65
PITCH
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
34
NCL30082
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−X−
A
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
MILLIMETERS
DIM MIN MAX
INCHES
G
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N X 45
_
SEATING
PLANE
1.27 BSC
0.050 BSC
−Z−
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
0.10 (0.004)
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
SOLDERING FOOTPRINT*
1.52
0.060
7.0
4.0
0.275
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
NCL30082/D
相关型号:
NCL30082BDMR2G
Dimmable Quasi-Resonant Primary Side Current-ModeController for LED Lighting with Thermal Fold-back
ONSEMI
©2020 ICPDF网 联系我们和版权申明