NCL30080ASNT1G [ONSEMI]
Quasi-Resonant Primary Side Current-Mode Controller for LED Lighting; 准谐振初级端电流模式控制器,用于LED照明型号: | NCL30080ASNT1G |
厂家: | ONSEMI |
描述: | Quasi-Resonant Primary Side Current-Mode Controller for LED Lighting |
文件: | 总26页 (文件大小:257K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NCL30080
Quasi-Resonant Primary
Side Current-Mode
Controller for LED Lighting
The NCL30080 is a PWM current mode controller targeting isolated
flyback and non−isolated constant current topologies. The controller
operates in a quasi−resonant mode to provide high efficiency. Thanks
to a novel control method, the device is able to precisely regulate a
constant LED current from the primary side. This removes the need
for secondary side feedback circuitry, biasing and an optocoupler.
The device is highly integrated with a minimum number of external
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TSOP−6
SN SUFFIX
CASE 318G
components. A wide V range simplifies the design process and
CC
allows a single design to support a wide LED forward voltage range. A
robust suite of safety protection is built in to simplify the design. This
device is specifically intended for very compact space efficient
designs
MARKING DIAGRAM
Features
AAxAYWG
• Quasi−resonant Peak Current−mode Control Operation
• Primary Side Sensing (no optocoupler needed)
G
1
• Wide V Range
CC
AAx = Specific Device Code
• Precise LED Constant Current Regulation 1% Typical
• Line Feed−forward for Enhanced Regulation Accuracy
• Low LED Current Ripple
• 250 mV 2% Guaranteed Voltage Reference for Current Regulation
• ~ 0.9 Power Factor with Valley Fill Input Stage
• Low LED Current Ripple
• Source 300 mA / Sink 500 mA Totem Pole Driver with 12 V Gate
Clamp
• Low Start−up Current (13 mA typ.)
x
= E or F
= Assembly Location
= Year
= Work Week
= Pb−Free Package
A
Y
W
G
(Note: Microdot may be in either location)
PIN CONNECTIONS
1
ZCD
GND
CS
VIN
• Small Space Saving Low Profile Package
• Wide Temperature Range of −40 to +125°C
• Pb−free, Halide−free MSL1 Product
VCC
DRV
(Top View)
• Robust Protection Features
♦ Over Voltage / LED Open Circuit Protection
♦ Secondary Diode Short Protection
♦ Output Short Circuit Protection
Typical Applications
• Integral LED Bulbs
♦ Shorted Current Sense Pin Fault Detection
♦ Latched and Auto−recoverable Versions
♦ Brown−out
• LED Power Driver Supplies
• LED Light Engines
♦ V Under Voltage Lockout
CC
♦ Thermal Shutdown
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 25 of this data sheet.
©
Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
April, 2013 − Rev. 0
NCL30080/D
NCL30080
.
.
Aux
.
1
2
3
6
5
4
Figure 1. Typical Application Schematic for NCL30080
Table 1. PIN FUNCTION DESCRIPTION
Pin No
Pin Name
ZCD
Function
Zero Crossing Detection
−
Pin Description
Connected to the auxiliary winding; this pin detects the core reset event.
The controller ground
1
2
3
4
GND
CS
Current sense
Driver output
This pin monitors the primary peak current
DRV
The current capability of the totem pole gate drive (+0.3/−0.5 A) makes it suit-
able to effectively drive a broad range of power MOSFETs.
5
6
VCC
VIN
Supplies the controller
This pin is connected to an external auxiliary voltage.
Input voltage sensing
This pin observes the HV rail and is used in valley selection. This pin also
monitors and protects for low mains conditions.
Brown−Out
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NCL30080
V
DD
V
REF
STOP
OFF
Aux_SCP
VCC
GND
ZCD
CS
Fault
Management
UVLO
Latch
VCC Management
CS_shorted
Internal
Thermal
Shutdown
VCC_max
VCC Over Voltage
Protection
Ipkmax
WOD_SCP
BO_NOK
Qdrv
V
VIN
V
CC
Clamp
Circuit
Zero Crossing Detection
Valley Selection
Aux. Winding
Short Circuit Protection
DRV
S
R
Qdrv
Aux_SCP
Q
V
VIN
V
VLY
Line
Feedforward
V
REF
STOP
Leading
Edge
Blanking
CS_reset
Ipkmax
Constant−Current
Control
V
VIN
STOP
VIN
Max. Peak
Current
Limit
Ipkmax
Brown−Out
BO_NOK
CS Short
Protection
CS_shorted
V
VIN
Winding and
Output diode
Short Circuit
Protection
WOD_SCP
Figure 2. Internal Circuit Architecture
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NCL30080
Table 2. MAXIMUM RATINGS TABLE
Symbol
Rating
Value
Unit
V
Maximum Power Supply voltage, VCC pin, continuous voltage
Maximum current for VCC pin
−0.3, +35
Internally limited
V
mA
CC(MAX)
I
CC(MAX)
V
Maximum driver pin voltage, DRV pin, continuous voltage
Maximum current for DRV pin
−0.3, V
(Note 1)
V
mA
DRV(MAX)
DRV
I
−500, +800
DRV(MAX)
V
Maximum voltage on low power pins (except pins DRV and VCC)
Current range for low power pins (except pins ZCD, DRV and VCC)
−0.3, +5.5
−2, +5
V
mA
MAX
I
MAX
V
Maximum voltage for ZCD pin
Maximum current for ZCD pin
−0.3, +10
−2, +5
V
mA
ZCD(MAX)
I
ZCD(MAX)
R
Thermal Resistance, Junction−to−Air
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
360
150
°C/W
°C
θ
J−A
T
J(MAX)
−40 to +125
−60 to +150
4
°C
°C
ESD Capability, HBM model (Note 2)
ESD Capability, MM model (Note 2)
kV
V
200
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. V
is the DRV clamp voltage V
when V is higher than V
. V
is V unless otherwise noted.
DRV
DRV(high)
CC
DRV(high) DRV CC
2. This device series contains ESD protection and exceeds the following tests: Human Body Model 4000 V per Mil−Std−883, Method 3015.
3. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78 except for VIN pin which passes 60 mA.
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NCL30080
Table 3. ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values T = 25°C, V = 12 V;
J
CC
For min/max values T = −40°C to +125°C, Max T = 150°C, V = 12 V)
J
J
CC
Description
Test Condition
Symbol
Min
Typ
Max
Unit
STARTUP AND SUPPLY CIRCUITS
Supply Voltage
V
Startup Threshold
Minimum Operating Voltage
V
V
V
increasing
decreasing
decreasing
V
V
16
8.2
8
18
8.8
–
20
9.4
–
CC
CC
CC
CC(on)
CC(off)
Hysteresis V
– V
V
CC(on)
CC(off)
CC(HYS)
CC(reset)
Internal logic reset
V
3.5
4.5
5.5
Over Voltage Protection
VCC OVP threshold
V
26
28
30
V
CC(OVP)
V
V
noise filter
t
–
–
5
20
–
–
ms
CC(off)
VCC(off)
noise filter−
t
I
CC(reset)
VCC(reset)
Startup current
I
–
–
13
46
30
60
mA
mA
CC(start)
Startup current in fault mode
CC(sFault)
Supply Current
mA
Device Disabled/Fault
Device Enabled/No output load on pin 4
V
F
> V
= 65 kHz
= 470 pF,
= 65 kHz
I
I
I
0.8
–
–
1.0
2.15
2.6
1.4
4.0
5.0
CC
CC(off)
CC1
CC2
CC3
sw
Device Switching (F = 65 kHz)
C
sw
DRV
F
sw
CURRENT SENSE
Maximum Internal current limit
V
0.95
250
1
1.05
350
V
ILIM
Leading Edge Blanking Duration for V
(T = −25°C to 125°C)
j
t
300
ns
ILIM
ILIM
LEB
Leading Edge Blanking Duration for V
(T = −40°C to 125°C)
j
t
240
300
350
ns
LEB
Input Bias Current
DRV high
I
–
–
0.02
50
1.5
120
–
–
150
1.65
–
mA
ns
V
bias
Propagation delay from current detection to gate off−state
t
ILIM
Threshold for immediate fault protection activation
V
1.35
–
CS(stop)
Leading Edge Blanking Duration for V
t
ns
ms
ms
CS(stop)
BCS
Blanking time for CS to GND short detection V
= 1 V
t
t
6
12
4
pinVIN
CS(blank1)
CS(blank2)
Blanking time for CS to GND short detection V
= 3.3 V
2
–
pinVIN
GATE DRIVE
Drive Resistance
DRV Sink
DRV Source
W
R
SNK
R
SRC
–
–
13
30
–
–
Drive current capability
DRV Sink (Note 4)
DRV Source (Note 4)
mA
I
–
–
500
300
–
–
SNK
SRC
I
Rise Time (10% to 90%)
Fall Time (90% to 10%)
DRV minimum high level
C
C
= 470 pF
t
–
–
8
40
30
–
–
–
–
ns
ns
V
DRV
r
= 470 pF
t
f
DRV
V
= V
+0.2 V
V
CC
CC(off)
DRV(low)
C
= 470 pF,
DRV
R
= 33 kW
DRV
DRV high clamp level
V
DRV
= 30 V
V
10
12
14
V
CC
DRV(high)
C
= 470 pF,
R
DRV
= 33 kW
4. Guaranteed by design
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NCL30080
Table 3. ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values T = 25°C, V = 12 V;
J
CC
For min/max values T = −40°C to +125°C, Max T = 150°C, V = 12 V)
J
J
CC
Description
Test Condition
Symbol
Min
Typ
Max
Unit
ZERO VOLTAGE DETECTION CIRCUIT
ZCD threshold voltage
V
increasing
decreasing
V
25
5
45
25
–
65
45
–
mV
mV
mV
V
ZCD
ZCD(THI)
ZCD(THD)
ZCD(HYS)
ZCD(short)
ZCD threshold voltage (Note 4)
ZCD hysteresis (Note 4)
V
ZCD
V
V
10
0.8
Threshold voltage for output short circuit or aux. winding
short circuit detection
V
1
1.2
Short circuit detection Timer
V
ZCD
< V
t
OVLD
70
3
90
4
110
5
ms
s
ZCD(short)
Auto−recovery timer duration
t
recovery
Input clamp voltage
High state
Low state
V
I
= 3.0 mA
= −2.0 mA
V
–
−0.9
9.5
−0.6
–
−0.3
pin1
CH
CL
I
V
pin1
Propagation Delay from valley detection to DRV high
Equivalent time constant for ZCD input (Note 4)
Blanking delay after on−time
V
ZCD
decreasing
t
–
–
–
20
3
150
–
ns
ns
ms
ms
DEM
t
PAR
t
2.25
5
3.75
8
BLANK
Timeout after last demag transition
t
6.5
TIMO
CONSTANT CURRENT CONTROL
Reference Voltage at T = 25°C
V
V
245
242.5
30
250
250
55
255
257.5
80
mV
mV
mV
j
REF
Reference Voltage T = −40°C to 125°C
j
REF
Current sense lower threshold for detection of the
leakage inductance reset time
V
CS(low)
LINE FEED−FORWARD
V
to I
conversion ratio
K
15
17
19
mA/V
mA
VIN
CS(offset)
LFF
Offset current maximum value
V
pinVIN
= 4.5 V
I
67.5
76.5
85.5
offset(MAX)
VALLEY SELECTION
Threshold for line range detection V increasing
V
increasing
decreasing
V
HL
2.28
2.18
15
2.4
2.3
25
2.52
2.42
35
V
V
in
VIN
st
nd
(1 to 2 valley transition for V
> 0.75 V)
REF
Threshold for line range detection V decreasing
V
VIN
V
LL
in
nd
st
(2 to 1 valley transition for V
> 0.75 V)
REF
Blanking time for line range detection
THERMAL SHUTDOWN
t
ms
HL(blank)
Thermal Shutdown (Note 4)
Device switching
around 65 kHz)
T
130
–
155
55
170
–
°C
°C
SHDN
(F
SW
Thermal Shutdown Hysteresis (Note 4)
BROWN−OUT
T
SHDN(HYS)
Brown−Out ON level (IC start pulsing)
Brown−Out OFF level (IC shuts down)
BO comparators delay
V
increasing
decreasing
V
V
0.90
0.85
–
1
0.9
30
50
–
1.10
0.95
–
V
V
SD
BO(on)
V
SD
BO(off)
t
ms
ms
nA
BO(delay)
BO(blank)
Brown−Out blanking time
t
35
65
Brown−Out pin bias current
4. Guaranteed by design
I
−250
250
BO(bias)
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NCL30080
TYPICAL CHARACTERISTICS
18.15
18.10
18.05
18.00
8.85
8.80
8.75
8.70
8.65
17.95
17.90
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 3. VCC(on) vs. Junction Temperature
Figure 4. VCC(off) vs. Junction Temperature
27.80
27.75
27.70
1.09
1.07
1.05
1.03
27.65
27.60
27.55
27.50
1.01
0.99
0.97
0.95
27.45
27.40
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 5. VCC(OVP) vs. Junction Temperature
Figure 6. ICC1 vs. Junction Temperature
2.20
2.15
2.70
2.65
2.60
2.55
2.50
2.45
2.10
2.05
2.00
2.40
2.35
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 7. ICC2 vs. Junction Temperature
Figure 8. ICC3 vs. Junction Temperature
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NCL30080
TYPICAL CHARACTERISTICS
54
52
50
19
17
15
13
48
46
44
42
11
9
40
38
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 9. ICC(start) vs. Junction Temperature
Figure 10. ICC(sFault) vs. Junction Temperature
1.51
1.50
1.49
1.48
1.002
1.000
0.998
0.996
0.994
1.47
1.46
0.992
0.990
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 11. VCS(stop) vs. Junction Temperature
Figure 12. VILIM vs. Junction Temperature
305
303
3.00
2.98
2.96
2.94
301
299
297
295
293
291
289
2.92
2.90
287
285
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 13. tLEB vs. Junction Temperature
Figure 14. tBLANK vs. Junction Temperature
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NCL30080
TYPICAL CHARACTERISTICS
6.80
6.70
6.60
6.50
6.40
254
253
252
251
250
249
248
6.30
6.20
247
246
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 15. tTIMO vs. Junction Temperature
Figure 16. VREF vs. Junction Temperature
55.8
55.6
55.4
55.2
17.65
17.60
17.55
17.50
55.0
54.8
54.6
17.45
17.40
54.4
54.2
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 17. VCS(low) vs. Junction Temperature
Figure 18. KLFF vs. Junction Temperature
2.42
2.41
2.40
2.39
2.38
2.30
2.29
2.28
2.27
2.26
2.37
2.36
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 19. VHL vs. Junction Temperature
Figure 20. VLL vs. Junction Temperature
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NCL30080
TYPICAL CHARACTERISTICS
25.5
25.0
24.5
24.0
1.000
0.995
0.990
0.985
0.980
0.975
23.5
23.0
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 21. tHL(BLANK) vs. Junction Temperature
Figure 22. VBO(on) vs. Junction Temperature
0.910
0.905
53.5
53.0
52.5
52.0
51.5
51.0
0.900
0.895
0.890
50.5
50.0
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 23. VBO(off) vs. Junction Temperature
Figure 24. tBO(BLANK) vs. Junction
Temperature
85.0
84.5
84.0
83.5
83.0
82.5
4.40
4.35
4.30
4.25
4.20
4.15
82.0
81.5
4.10
4.05
81.0
80.5
−40 −20
0
20
40
60
80
100 120
−40 −20
0
20
40
60
80
100 120
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 25. tOVLD vs. Junction Temperature
Figure 26. trecovery vs. Junction Temperature
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NCL30080
Application Information
The NCL30080 implements a current−mode architecture
• Brown−Out: the controller includes a brown−out
circuit with a validation timer which safely stops the
controller in the event that the input voltage is too low.
The device will automatically restart if the line recovers.
operating in quasi−resonant mode. Thanks to proprietary
circuitry, the controller is able to accurately regulate the
secondary side current of the flyback converter without
using any opto−coupler or measuring directly the secondary
side current.
• Cycle−by−cycle peak current limit: when the current
sense voltage exceeds the internal threshold V
, the
ILIM
• Quasi−Resonance Current−Mode Operation:
implementing quasi−resonance operation in peak
current−mode control, the NCL30080 optimizes the
efficiency by switching in the valley of the MOSFET
drain−source voltage. Thanks to a smart control
algorithm, the controller locks−out in a selected valley
and remains locked until the input voltage or the output
current set point significantly changes.
• Primary Side Constant Current Control: thanks to a
proprietary circuit, the controller is able to compensate
for the leakage inductance of the transformer and allow
accurate control of the secondary side current.
• Line Feed−forward: compensation for possible
variation of the output current caused by system slew
rate variation.
MOSFET is turned off for the rest of the switching cycle.
• Winding Short−Circuit Protection: an additional
comparator with a short LEB filter (t ) senses the CS
BCS
signal and stops the controller if V reaches 1.5 x
CS
V . For noise immunity reasons, this comparator is
ILIM
enabled only during the main LEB duration t
.
LEB
• Output Short−circuit protection: If a very low
voltage is applied on ZCD pin for 90 ms (nominal), the
controllers assume that the output or the ZCD pin is
shorted to ground and enters shutdown. The auto−
restart version (B suffix) waits 4 seconds, then the
controller restarts switching. In the latched version (A
suffix), the controller is latched as long as V stays
CC
above the V
threshold.
CC(reset)
• Open LED protection: if the voltage on the VCC pin
exceeds an internal limit, the controller shuts down and
waits 4 seconds before restarting switching.
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NCL30080
Constant Current Control
Figure 27 shows the basic circuit of a flyback converter.
Figure 28 portrays the primary and secondary current of a
flyback converter operating in discontinuous conduction
mode (DCM).
Transformer
V
bulk
L
leak
N
sp
R
clp
V
out
C
clp
L
p
Clamping
network
DRV
C
lump
R
sense
Figure 27. Basic Flyback Converter Schematic
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NCL30080
During the on−time of the MOSFET, the bulk voltage
is applied to the magnetizing and leakage inductors L
turned off, the drain voltage begins to oscillate because of
the resonating network formed by the inductors (L +L
V
bulk
)
leak
p
p
and L
and the current ramps up.
and the lump capacitor. This voltage is reflected on the
auxiliary winding wired in flyback mode. Thus, by
monitoring the auxiliary winding voltage, we can detect the
end of the conduction time of secondary diode. The constant
current control block picks up the leakage inductor current,
the end of conduction of the output rectifier and controls the
drain current to maintain the output current constant.
leak
When the MOSFET is turned−off, the inductor current
first charges C . The output diode is off until the voltage
lump
across L reverses and reaches:
p
ǒV
Ǔ
Nsp out ) Vf
(eq. 1)
The output diode current increase is limited by the leakage
inductor. As a result, the secondary peak current is reduced:
We have:
VREF
2NspRsense
IL,pk
(eq. 3)
Iout
+
I
D,pk t
(eq. 2)
Nsp
The output current value is set by choosing the sense
resistor:
The diode current reaches its peak when the leakage inductor
is reset. Thus, in order to accurately regulate the output
current, we need to take into account the leakage inductor
current. This is accomplished by sensing the clamping
network current. Practically, a node of the clamp capacitor
Vref
2NspIout
(eq. 4)
Rsense
+
From Equation 3, the first key point is that the output
current is independent of the inductor value. Moreover, the
leakage inductance does not influence the output current
value as the reset time is processed by the controller.
is connected to R
instead of the bulk voltage V
.
sense
bulk
Then, by monitoring the voltage on the CS pin, we have an
image of the primary current (red curve in Figure 28).
When the diode conducts, the secondary current decreases
linearly from I
to zero. When the diode current has
D,pk
I
L,pk
N
I
sp D,pk
I (t)
pri
I (t)
sec
time
t
1
t
2
t
on
t
demag
V (t)
aux
time
Figure 28. Flyback Currents and Auxiliary Winding Voltage in DCM
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13
NCL30080
Internal Soft−Start
At startup or after recovering from a fault, there is a small
internal soft−start of 40 ms.
In addition, during startup, as the output voltage is zero
volts, the demagnetization time is long and the constant
current control block will slowly increase the peak current
towards its nominal value as the output voltage grows.
Figure 29 shows a soft−start simulation example for a 9 W
LED driver illustrating a natural soft startup.
16.0
12.0
8.00
4.00
0
V
out
1
800m
600m
400m
200m
0
I
2
out
800m
600m
400m
200m
0
V
V
4
3
Control
CS
604u
1.47m
2.34m
3.21m
4.07m
time in seconds
Figure 29. Startup Simulation Showing the Natural Soft−start
Cycle−by−Cycle Current Limit
When the current sense voltage exceeds the internal
Winding and Output Diode Short−Circuit Protection
In parallel with the cycle−by−cycle sensing of the CS pin,
threshold V , the MOSFET is turned off for the rest of the
ILIM
another comparator with a reduced LEB (t ) and a higher
BCS
switching cycle (Figure 30).
threshold (1.5 V typical) is integrated to sense a winding
short−circuit and immediately stops the DRV pulses. The
controller goes into auto−recovery mode in version B.
In version A, the controller is latched. In latch mode, the
DRV pulses stop and VCC ramps up and down. The circuit
un−latches when VCC pin voltage drops below V
CC(reset)
threshold.
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14
NCL30080
S
aux
Q
DRV
latch
Vdd
Q
VCC
CS
R
Vcc
management
LEB1
+
PWMreset
Ipkmax
Rsense
−
Vcontrol
VCCstop
UVLO
+
grand
reset
8_HICC
OVP
−
V
ILIMIT
OVP
STOP
LEB2
+
WOD_SCP
latch
−
S
OFF
WOD_SCP
S
R
V
Q
Q
CS(stop)
Q
Q
R
8_HICC
grand
reset
from Fault Management Block
Figure 30. Winding Short Circuit Protection, Max. Peak Current Limit Circuits
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15
NCL30080
VCC Over Voltage Protection (Open LED Protection)
If no output load is connected to the LED string fails open
circuited, the controller must be able to safely limit the
output voltage excursion.
In the NCL30080, when the V voltage reaches the
CC
V
threshold, the controller stops the DRV pulses and
CC(OVP)
the 4−s timer starts counting. The IC re−start switching after
the 4−s timer has elapsed as long as V ≥ V
. This is
CC(on)
CC
illustrated in Figure 31.
40.0
V
CC(OVP)
30.0
20.0
10.0
0
V
1
CC
V
CC(on)
V
CC(off)
40.0
30.0
20.0
10.0
0
V
2
out
800m
600m
400m
200m
0
I
3
4
out
8.00
6.00
4.00
2.00
0
OVP
1.38
3.96
6.54
9.11
11.7
time in seconds
Figure 31. Open LED Protection Chronograms
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16
NCL30080
Valley Lockout
Quasi−square wave resonant systems have a wide
switching frequency excursion. The switching frequency
increases when the output load decreases or when the input
voltage increases. The switching frequency of such systems
must be limited.
The NCL30080 changes the valley as the input voltage
increases. This limits the switching frequency excursion.
Once a valley is selected, the controller stays locked in the
valley until the input voltage varies significantly. This
avoids valley jumping and the inherent noise caused by this
phenomenon.
The input voltage is sensed by the VIN pin. The internal
logic selects the operating valley according to VIN pin
voltage (line range detection in Figure 32). For a universal
mains design, the controller operates in the first valley at low
line and in the second valley at high line.
Vbulk
VIN
+
LLine
HLine
25−ms blanking time
−
2.4 V if LLine low
2.3 V if LLine high
Figure 32. Line Range Detection
Table 4. VALLEY SELECTION
VIN pin voltage for valley change
V
VIN
decreases
2.3 V
0
0
−LL−
−HL−
5 V
5 V
st
nd
Valley number
1
2
−LL−
2.4 V
−HL−
V
VIN
increases
VIN pin voltage for valley change
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17
NCL30080
Zero Crossing Detection Block
The ZCD pin detects when the drain-source voltage of the
power MOSFET reaches a valley.
the valleys. To avoid such a situation, the NCL30080
features a time-out circuit that generates pulses if the voltage
on ZCD pin stays below the V
(nominal).
threshold for 6.5 ms
ZCD(THD)
A valley is detected when the voltage on pin 1 crosses
below the V
internal threshold.
The time-out also acts as a substitute clock for the valley
detection and simulates a missing valley in case of very
damped free oscillations.
ZCD(THD)
At startup or in case of extremely damped free
oscillations, the ZCD comparator may not be able to detect
V
V
ZCD
3
4
ZCD(THD)
The 3rd valley
is validated
high
low
14
12
2nd, 3rd
The 3rd valley is not detected
by the ZCD comp
The 2nd valley is detected
By the ZCD comparator
high
ZCD comp
TimeOut
low
15
16
high
low
Time−out circuit adds a pulse to
account for the missing 3rd valley
high
low
Clk
17
Figure 33. Time−out Chronograms
Normally with this type of time−out function, in the event
the ZCD pin or the auxiliary winding is shorted, the
controller could continue switching leading to improper
regulation of the LED current. Moreover during an output
short circuit, the controller will strive to maintain constant
current operation.
To avoid these scenarios, a protection circuit consisting of
a comparator and secondary timer starts counting when the
ZCD voltage is below the V
threshold. If this timer
ZCD(short)
reaches 90 ms, the controller detects a fault and shutdown.
The auto−restart version (B suffix) waits 4 seconds, then the
controller restarts switching. In the latched version
(A suffix), the controller is latched as long as V stays
CC
above the V
threshold.
CC(reset)
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18
NCL30080
Line Feed−forward
Because of internal and external propagation delays, the
MOSFET is not turned−off immediately when the current
set−point is reached. As a result, the primary peak current is
slightly higher than expected resulting in a small output
current error which can be compensated for during
component selection.
Normally this error would increase if the input line
voltage increased because the slew rate through the primary
inductance would increase. To compensate for the peak
current increase brought by the variation, a positive voltage
proportional to the line voltage is added to the current sense
signal. The amount of offset voltage can be adjusted using
the R
resistor as shown in Figure 34.
LFF
V
CS(offset) + KLFFVpinVINRCS
(eq. 5)
The offset voltage is applied only during the MOSFET
on−time.
Bulk rail
V
I
DD
VIN
CS
R
CS
CS(offset)
R
sense
Q_drv
Figure 34. Line Feed−forward Schematic
Brown−out
condition overrides the hiccup on V (V does not wait
CC
CC
In order to protect the supply against a very low input
voltage, the NCL30080 features a brown−out circuit with a
fixed ON/OFF threshold. The controller is allowed to start
if a voltage higher than 1 V is applied to the VIN pin and
shuts−down if the VIN pin voltage decreases and stays
below 0.9 V for 50 ms nominal. Exiting a brown−out
to reach V
) and the IC immediately goes into startup
CC(off)
mode (I = I
). Note for most compact LED driver
CC(start)
CC
applications, if a true line dropout occurs, the energy in the
input bulk capacitor will be discharged and the LED load
will turn off before the 50 ms timer expires.
Vbulk
VIN
+
BO_NOK
50−ms blanking time
−
1 V if BONOK high
0.9 V if BONOK low
Figure 35. Brown−out Circuit
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19
NCL30080
160
120
80.0
40.0
0
V
Bulk
1
2
18.0
16.0
14.0
12.0
10.0
V
CC(on)
V
CC
V
CC(off)
1.10
900m
700m
500m
300m
V
V
BO(on)
BO(off)
V
pinVIN
3
8.00
6.00
4.00
2.00
0
50−ms Timer
BO_NOK low
=> Startup mode
BO_NOK
4
46.1m
138m
231m
time in seconds
323m
415m
Figure 36. Brown−Out Chronograms (Valley Fill circuit is used)
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20
NCL30080
CS Pin Short Circuit Protection
With a traditional controller, if the CS pin or the sense
resistor is shorted to ground, the driver will not be able to
turn off, leading to potential damage of the power supply. To
avoid this, the NCL30080 features a circuit to protect the
power supply against a short circuit of the CS pin. When the
MOSFET is on, if the CS voltage stays below V after
CS(low)
the adaptive blanking timer has elapsed, the controller shuts
down and will attempt to restart on the next V hiccup.
CC
Adaptative
Blanking Time
V
VIN
Q_drv
CS
−
+
S
R
V
Q
Q
CS_short
CS(low)
UVLO
BO_NOK
Figure 37. CS Pin Short Circuit Protection Schematic
Fault Management
In this mode, the DRV pulses are stopped. V voltage
CC
decrease through the controller own consumption (I ).
For the output diode short circuit protection, the output /
OFF Mode
CC1
The circuit turns off whenever a major condition prevents
it from operating:
aux. winding short circuit protection and the V OVP, the
CC
controller waits 4 seconds (auto−recovery timer) and then
• Incorrect feeding of the circuit: “UVLO high”. The
initiates a startup sequence (V
re−starting switching.
≥ V
) before
CC(on)
CC
UVLO signal becomes high when V drops below
CC
V
CC(off)
and remains high until V exceeds V
.
CC
CC(on)
Latch Mode
• V OVP
CC
This mode is activated by the output diode short−circuit
protection (WOD_SCP) and the Aux_SCP in version A
only.
• Output diode short circuit protection: “WOD_SCP
high”
• Output / Auxiliary winding Short circuit protection:
“Aux_SCP high”
• Die over temperature (TSD)
• Brown−Out: “BO_NOK” high
• Pin CS short circuited to GND: “CS_short high”
In this mode, the DRV pulses are stopped and the
controller is latched. There are hiccups on V
.
CC
The circuit un−latches when V < V
.
CC
CC(reset)
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21
NCL30080
Timer has
finished
counting
V
CC
> V
CC(on)
V
CC
< V
CC(off)
or
BO_NOK ↓
V _OVP
CC
BO_NOK high
or TSD
or CS_Short
Stop
4−s
Timer
V
CC
Disch.
BO_NOK high
or TSD
or CS_Short
WOD_SCP
or Aux_SCP
or V _OVP
CC
Run
V
CC
< V
CC(off)
With states: Reset
→
→
→
→
→
Controller is reset, I = I
CC CC(start)
Controller is ON, DRV is not switching
Normal switching
Stop
Run
V
CC
Disch.
No switching, I = I
, waiting for V to decrease to V
CC1 CC CC(off)
CC
4−s Timer
the auto−recovery timer is counting, V is ramping up and down between V
and V
CC(on) CC(off)
CC
Figure 38. State Diagram for B Version Faults
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22
NCL30080
Reset
Timer has
finished
counting
V
CC
> V
CC(on)
V
CC
< V
CC(off)
or
BO_NOK ↓
V
CC
< V
CC(reset)
BO_NOK high
or TSD
or CS_Short
4−s
Timer
V _OVP
CC
Stop
V
CC
Disch.
V _OVP
CC
BO_NOK high
or TSD
or CS_Short
Latch
Run
V
CC
< V
CC(off)
WOD_SCP or
Aux_SCP
With states: Reset
→
→
→
→
→
→
Controller is reset, I = I
CC CC(start)
Controller is ON, DRV is not switching
Normal switching
Stop
Run
V
CC
Disch.
No switching, I = I
, waiting for V to decrease to V
CC1 CC CC(off)
CC
4−s Timer
Latch
the auto−recovery timer is counting, V is ramping up and down between V
and V
CC
CC(on) CC(off)
Controller is latched off, V is ramping up and down between V
and V
,
CC
CC(on)
CC(off)
only V
can release the latch.
CC(reset)
Figure 39. State Diagram for A Version Faults
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23
NCL30080
PACKAGE DIMENSIONS
TSOP−6
CASE 318G−02
ISSUE V
NOTES:
D
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
H
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM
LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR
GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D
AND E1 ARE DETERMINED AT DATUM H.
6
1
5
2
4
L2
GAUGE
PLANE
E1
E
5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.
3
L
MILLIMETERS
SEATING
PLANE
M
C
NOTE 5
DIM
A
A1
b
c
D
E
E1
e
MIN
0.90
0.01
0.25
0.10
2.90
2.50
1.30
0.85
0.20
NOM
1.00
MAX
1.10
0.10
0.50
0.26
3.10
3.00
1.70
1.05
0.60
b
DETAIL Z
e
0.06
0.38
0.18
3.00
c
2.75
A
0.05
1.50
0.95
L
0.40
A1
L2
M
0.25 BSC
−
DETAIL Z
0°
10°
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.60
6X
0.95
3.20
0.95
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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24
NCL30080
OPTIONS
Controller
Output SCP
Winding/Output Diode SCP
Latched
NCL30080A
NCL30080B
Latched
Auto−recovery
Auto−recovery
ORDERING INFORMATION
Device
†
Package Marking
Package Type
Shipping
NCL30080ASNT1G
AAE
TSOP−6
3000 / Tape & Reel
3000 / Tape & Reel
(Pb−Free, Halide−Free)
NCL30080BSNT1G
AAF
TSOP−6
(Pb−Free, Halide−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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