MJ802G [ONSEMI]
High?Power NPN Silicon Transistor; 高？功率NPN硅晶体管
| 型号： | MJ802G |
| 厂家： | 
ONSEMI |
| 描述： | High?Power NPN Silicon Transistor |
| 文件： | 总4页 (文件大小：71K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MJ802
High−Power NPN Silicon
Transistor
This transistor is for use as an output device in complementary audio
amplifiers to 100−Watts music power per channel.
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Features
• High DC Current Gain − h = 25−100 @ I = 7.5 A
FE
C
30 AMPERE
POWER TRANSISTOR
NPN SILICON
• Excellent Safe Operating Area
• Complement to the PNP MJ4502
• Pb−Free Package is Available*
100 VOLTS − 200 WATTS
MAXIMUM RATINGS
Rating
Symbol
Value
100
100
90
Unit
Vdc
Vdc
Vdc
Vdc
Adc
Adc
Collector−Emitter Voltage
Collector−Base Voltage
Collector−Emitter Voltage
Emitter−Base Voltage
Collector Current
V
CER
V
CB
V
CEO
V
EB
4.0
I
C
30
Base Current
I
B
7.5
TO−204AA (TO−3)
CASE 1−07
Total Device Dissipation @ T = 25_C
P
200
1.14
W
W/_C
_C
C
D
STYLE 1
Derate above 25_C
Operating and Storage Junction
Temperature Range
T , T
J
−65 to +200
stg
MARKING DIAGRAM
THERMAL CHARACTERISTICS
Characteristics
Symbol
Max
Unit
Thermal Resistance, Junction−to−Case
q
0.875
_C/W
JC
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
MJ802G
AYYWW
MEX
MJ802 = Device Code
G
A
YY
WW
MEX
= Pb−Free Package
= Assembly Location
= Year
= Work Week
= Country of Origin
ORDERING INFORMATION
Device
MJ802
Package
Shipping
TO−204
100 Units / Tray
100 Units / Tray
MJ802G
TO−204
(Pb−Free)
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
February, 2006 − Rev. 10
MJ802/D
MJ802
ELECTRICAL CHARACTERISTICS (T = 25_C unless otherwise noted)
C
Characteristic
Symbol
Min
Max
Unit
OFF CHARACTERISTICS
Collector−Emitter Breakdown Voltage
BV
100
90
−
−
Vdc
CER
(I = 200 mAdc, R = 100 W)
C
BE
V
Vdc
Collector−Emitter Sustaining Voltage (Note 1) (I = 200 mAdc)
CEO(sus)
C
I
mAdc
Collector−Base Cutoff Current
(V = 100 Vdc, I = 0)
CBO
1.0
5.0
−
−
CB
E
(V = 100 Vdc, I = 0, T = 150_C)
CB
E
C
Emitter−Base Cutoff Current
I
−
1.0
mAdc
EBO
(V = 4.0 Vdc, I = 0)
BE
C
(1)
ON CHARACTERISTICS
DC Current Gain (Note 1)
(I = 7.5 Adc, V = 2.0 Vdc)
h
25
−
100
1.3
0.8
1.3
−
FE
C
CE
Base−Emitter “On” Voltage
(I = 7.5 Adc, V = 2.0 Vdc)
V
Vdc
Vdc
Vdc
BE(on)
CE(sat)
BE(sat)
C
CE
Collector−Emitter Saturation Voltage
(I = 7.5 Adc, I = 0.75 Adc)
V
V
−
C
B
Base−Emitter Saturation Voltage
(I = 7.5 Adc, I = 0.75 Adc)
−
C
B
DYNAMIC CHARACTERISTICS
Current Gain − Bandwidth Product
f
T
2.0
−
MHz
(I = 1.0 Adc, V = 10 Vdc, f = 1.0 MHz)
C
CE
1. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2.0%.
200
150
100
50
0
160
0
20
40
60
80 100 120 140
180 200
T , CASE TEMPERATURE (°C)
C
Figure 1. Power−Temperature Derating Curve
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2
MJ802
3.0
2.0
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
T = 175° C
J
T = 25°C
J
V
= 2.0 V
CE
25°C
1.0
0.7
0.5
− 55°C
V
@ I /I = 10
C B
BE(sat)
0.3
0.2
V
BE
@ V = 2.0 V
CE
DATA SHOWN IS OBTAINED FROM PULSE TESTS
AND ADJUSTED TO NULLIFY EFFECT OF I
.
CBO
V
@ I /I = 10
C B
CE(sat)
0.1
0.03 0.05 0.1 0.2 0.3 0.5 1.0 2.0 3.0 5.0
10
20 30
0.03 0.05 0.1 0.2 0.3 0.5
1.0 2.0 3.0 5.0
10
20 30
I , COLLECTOR CURRENT (AMP)
C
I , COLLECTOR CURRENT (AMP)
C
Figure 2. DC Current Gain
Figure 3. ‘‘On” Voltages
100
50
The Safe Operating Area Curves indicate I − V limits
C
CE
100 ms
below which the device will not enter secondary breakdown.
Collector load lines for specific circuits must fall within the
applicable Safe Area to avoid causing a catastrophic failure.
1.0 ms
20
10
dc
To insure operation below the maximum T , power
J
5.0
temperature derating must be observed for both steady state
and pulse power conditions.
5.0ꢁms
T = 200° C
J
2.0
1.0
0.5
SECONDARY BREAKDOWN LIMITED
BONDING WIRE LIMITED
THERMAL LIMITATIONS T = 25°C
PULSE DUTY CYCLE ≤ 10%
C
0.2
0.1
1.0
2.0 3.0
5.0
10
20 30
50
100
V
CE
, COLLECTOR−EMITTER VOLTAGE (VOLTS)
Figure 4. Active Region Safe Operating Area
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3
MJ802
PACKAGE DIMENSIONS
TO−204 (TO−3)
CASE 1−07
ISSUE Z
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
A
N
2. CONTROLLING DIMENSION: INCH.
3. ALL RULES AND NOTES ASSOCIATED WITH
REFERENCED TO−204AA OUTLINE SHALL APPLY.
C
SEATING
PLANE
−T−
E
INCHES
DIM MIN MAX
1.550 REF
MILLIMETERS
K
D 2 PL
MIN
MAX
A
B
C
D
E
G
H
K
L
39.37 REF
M
M
M
Y
0.13 (0.005)
T
Q
−−−
0.250
0.038
0.055
1.050
−−−
6.35
0.97
1.40
26.67
8.51
1.09
1.77
0.335
0.043
0.070
U
−Y−
L
V
H
0.430 BSC
0.215 BSC
0.440 0.480
0.665 BSC
10.92 BSC
5.46 BSC
11.18 12.19
16.89 BSC
2
1
B
G
N
Q
U
V
−−−
0.151
1.187 BSC
0.830
0.165
−−−
3.84
21.08
4.19
30.15 BSC
0.131
0.188
3.33
4.77
−Q−
0.13 (0.005)
M
M
Y
T
STYLE 1:
PIN 1. BASE
2. EMITTER
CASE: COLLECTOR
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
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MJ802/D
相关型号：
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Power Bipolar Transistor, 30A I(C), 90V V(BR)CEO, 1-Element, NPN, Silicon, TO-3, Metal, 2 Pin, TO-3, 2 PIN
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