MC74VHCT540AM [ONSEMI]
Octal Bus Buffer Inverting; 八路总线缓冲器反相
| 型号： | MC74VHCT540AM |
| 厂家： | 
ONSEMI |
| 描述： | Octal Bus Buffer Inverting |
| 文件： | 总8页 (文件大小：176K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMICONDUCTOR TECHNICAL DATA
The MC74VHCT540A is an advanced high speed CMOS inverting octal
bus buffer fabricated with silicon gate CMOS technology. It achieves high
speed operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.
The MC74VHCT540A features inputs and outputs on opposite sides of the
package and two AND–ed active–low output enables. When either OE1 or
OE2 are high, the terminal outputs are in the high impedance state.
The VHCT inputs are compatible with TTL levels. This device can be used
as a level converter for interfacing 3.3V to 5.0V, because it has full 5V CMOS
level output swings.
DW SUFFIX
20–LEAD SOIC WIDE PACKAGE
CASE 751D–05
The VHCT540A input and output (when disabled) structures provide
protection when voltages between 0V and 5.5V are applied, regardless of
the supply voltage. These input and output structures help prevent device
destruction caused by supply voltage – input/output voltage mismatch,
battery backup, hot insertion, etc.
DT SUFFIX
20–LEAD TSSOP PACKAGE
CASE 948E–02
The internal circuit is composed of three stages, including a buffer output
which provides high noise immunity and stable output. The inputs tolerate
voltages up to 7V, allowing the interface of 5V systems to 3V systems.
M SUFFIX
20–LEAD SOIC EIAJ PACKAGE
CASE 967–01
•
•
•
•
•
•
•
•
•
•
•
High Speed: t
= 3.7ns (Typ) at V
= 5V
PD
Low Power Dissipation: I
CC
= 4µA (Max) at T = 25°C
CC
A
ORDERING INFORMATION
TTL–Compatible Inputs: V = 0.8V; V = 2.0V
Power Down Protection Provided on Inputs
Balanced Propagation Delays
IL IH
MC74VHCTXXXADW SOIC WIDE
MC74VHCTXXXADT
MC74VHCTXXXAM
TSSOP
SOIC EIAJ
Designed for 2V to 5.5V Operating Range
Low Noise: V
= 1.2V (Max)
OLP
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
Chip Complexity: 124 FETs or 31 Equivalent Gates
PIN ASSIGNMENT
OE1
1
20
V
CC
A1
A2
A3
2
3
4
19
18
17
OE2
Y1
LOGIC DIAGRAM
Y2
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
A1
A2
A3
A4
A5
A6
A7
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
A4
A5
5
16
15
14
13
12
11
Y3
Y4
Y5
Y6
Y7
Y8
6
A6
7
A7
8
A8
9
DATA
INPUTS
INVERTING
OUTPUTS
GND
10
FUNCTION TABLE
Inputs
Output Y
OE1
OE2
A
L
L
H
X
L
L
X
H
L
H
X
X
H
L
Z
Z
A8
1
OE1
OUTPUT
ENABLES
19
OE2
4/99
REV 0
Motorola, Inc. 1999
MC74VHCT540A
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
V
DC Supply Voltage
DC Input Voltage
– 0.5 to + 7.0
– 0.5 to + 7.0
CC
V
V
in
V
DC Output Voltage
Input Diode Current
Output Diode Current
– 0.5 to V
CC
+ 0.5
V
out
I
IK
– 20
mA
mA
mA
mA
mW
cuit. For proper operation, V and
in
I
± 20
± 25
± 75
OK
V
should be constrained to the
out
range GND (V or V
)
V
.
I
DC Output Current, per Pin
DC Supply Current, V and GND Pins
in out
CC
out
CC
Unused inputs must always be
tied to an appropriate logic voltage
I
CC
level (e.g., either GND or V
).
P
D
Power Dissipation in Still Air,
SOIC Packages†
TSSOP Package†
500
450
CC
Unused outputs must be left open.
T
stg
Storage Temperature
– 65 to + 150
C
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied.
†Derating — SOIC Packages: – 7 mW/ C from 65 to 125 C
TSSOP Package: – 6.1 mW/ C from 65 to 125 C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
4.5
0
Max
5.5
5.5
5.5
Unit
V
V
CC
DC Supply Voltage
DC Input Voltage
DC Output Voltage
V
in
V
V
out
Outputs in 3–State
High or Low State
0
0
V
V
CC
T
Operating Temperature
Input Rise and Fall Time
– 40
0
+ 85
20
C
A
t , t
r f
V
CC
=5.0V ±0.5V
ns/V
DC ELECTRICAL CHARACTERISTICS
T
A
= 25°C
T
≤ 85°C
T ≤ 125°C
A
A
V
(V)
CC
Symbol
Parameter
Test Conditions
Unit
Min
Typ
Max
Min
Max
Min
Max
V
IH
Minimum High–Level Input
Voltage
3.0
4.5
5.5
1.2
2.0
2.0
1.2
2.0
2.0
1.2
2.0
2.0
V
V
Maximum Low–Level Input
Voltage
3.0
4.5
5.5
0.53
0.8
0.8
0.53
0.8
0.8
0.53
0.8
0.8
V
V
IL
V
OH
Minimum High–Level
Output Voltage
V
= V or V
IH
3.0
4.5
2.9
4.4
3.0
4.5
2.9
4.4
2.9
4.4
IN
IL
IL
I
= – 50µA
OH
V
IN
= V or V
IH
IL
V
= V or V
IH
= – 4mA
= – 8mA
IN
OH
OH
I
I
3.0
4.5
2.58
3.94
2.48
3.80
2.34
3.66
V
OL
Maximum Low–Level
Output Voltage
V
= V or V
IH
3.0
4.5
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
V
IN
IL
IL
I
= 50µA
OL
V
IN
= V or V
IH
IL
V
= V or V
IH
= 4mA
= 8mA
IN
OL
OL
I
I
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
I
Maximum Input Leakage
Current
V
= 5.5 V or GND
0 to 5.5
± 0.1
± 1.0
± 1.0
µA
µA
IN
in
I
Maximum Quiescent Supply
Current
V
in
= V
or GND
CC
5.5
2.0
20
40
CC
I
Quiescent Supply Current
Output Leakage Current
Input: V = 3.4V
IN
5.5
0.0
1.35
0.5
1.50
5.0
1.65
10
mA
CCT
I
V
OUT
= 5.5V
µA
OPD
MOTOROLA
2
MC74VHCT540A
AC ELECTRICAL CHARACTERISTICS (Input t = t = 3.0ns)
r
f
T
A
= – 40 to
85°C
T
A
= 25°C
T
A
≤ 125°C
Symbol
Parameter
Test Conditions
Unit
Min
Typ
Max
Min
Max
Min
Max
t
t
,
Maximum Propagation
Delay, A to Y
(Figures 1 and 3)
V
V
V
= 3.3 ± 0.3V
= 5.0 ± 0.5V
= 3.3 ± 0.3V
C
C
= 15pF
= 50pF
4.8
7.3
7.0
10.5
1.0
1.0
8.5
12.0
10.5
14.0
ns
PLH
CC
CC
CC
L
L
PHL
C
C
= 15pF
= 50pF
3.7
5.2
5.0
7.0
1.0
1.0
6.0
8.0
8.0
10.0
L
L
t
t
,
Output Enable TIme,
OEn to Y
(Figures 2 and 4)
C
C
= 15pF
= 50pF
6.8
9.3
10.5
14.0
1.0
1.0
12.5
16.0
15.0
19.0
ns
ns
PZL
L
L
R
= 1kΩ
PZH
L
V
R
= 5.0 ± 0.5V
= 1kΩ
C
C
= 15pF
= 50pF
4.7
6.2
7.2
9.2
1.0
1.0
8.5
10.5
10.5
13.0
CC
L
L
L
t
t
,
Output Disable Time,
OEn to Y
(Figures 2 and 4)
V
R
= 3.3 ± 0.3V
= 1kΩ
C
C
C
C
= 50pF
= 50pF
= 50pF
= 50pF
11.2
15.4
8.8
1.5
1.0
10
1.0
17.5
10.0
1.5
20.0
11.5
2.0
PLZ
CC
L
L
L
L
PHZ
L
V
R
= 5.0 ± 0.5V
= 1kΩ
6.0
1.0
CC
L
t
,
Output to Output Skew
V
= 3.3 ± 0.3V
ns
ns
pF
pF
OSLH
CC
t
(Note 1.)
OSHL
V
= 5.0 ± 0.5V
1.0
1.5
CC
(Note 1.)
C
Maximum Input
Capacitance
4
6
10
10
in
C
Maximum Three–State
Output Capacitance (Output
in High Impedance State)
out
Typical @ 25°C, V
= 5.0V
CC
C
Power Dissipation Capacitance (Note 2.)
pF
17
PD
1. Parameter guaranteed by design. t = |t – t
|, t
= |t
– t |.
PHLm PHLn
OSLH
PLHm PLHn OSHL
2. C
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
Averageoperatingcurrentcanbeobtainedbytheequation:I
=C
V
f
+I
/8(perbit).C isusedtodeterminetheno–load
PD
CC(OPR)
PD CC in CC
2
dynamic power consumption; P = C
V
f
+ I
in CC
V
.
D
PD
CC
CC
NOISE CHARACTERISTICS (Input t = t = 3.0ns, C = 50pF, V
= 5.0V)
r
f
L
CC
T
A
= 25°C
Symbol
Parameter
Unit
V
Typ
Max
V
OLP
Quiet Output Maximum Dynamic V
0.9
1.2
– 1.2
3.5
OL
V
OLV
Quiet Output Minimum Dynamic V
– 0.9
V
OL
V
IHD
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
V
V
ILD
1.5
V
3
MOTOROLA
MC74VHCT540A
SWITCHING WAVEFORMS
3.0V
GND
OE1 or OE2
3.0V
50%
1.5V
A
1.5V
1.5V
t
t
PZL PLZ
HIGH
IMPEDANCE
GND
t
t
PLH
PHL
1.5V
Y
V
V
+0.3V
–0.3V
V
OL
OH
t
t
PZH PHZ
Y
V
OH
OL
1.5V
Y
HIGH
IMPEDANCE
Figure 1.
Figure 2.
TEST CIRCUITS
TEST
TEST
POINT
POINT
CONNECT TO V
WHEN
CC
AND t
1k
Ω
OUTPUT
OUTPUT
TESTING t
.
PLZ
CONNECT TO GND WHEN
TESTING t AND t
PZL
DEVICE
UNDER
TEST
DEVICE
UNDER
TEST
.
PZH
PHZ
C *
C *
L
L
*Includes all probe and jig capacitance
*Includes all probe and jig capacitance
Figure 3.
Figure 4.
MOTOROLA
4
MC74VHCT540A
OUTLINE DIMENSIONS
DW SUFFIX
PLASTIC SOIC WIDE PACKAGE
CASE 751D–05
ISSUE F
D
A
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION SHALL
BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT
MAXIMUM MATERIAL CONDITION.
20
11
10
E
1
MILLIMETERS
DIM
A
A1
B
C
D
MIN
2.35
0.10
0.35
0.23
12.65
7.40
MAX
2.65
0.25
0.49
0.32
12.95
7.60
B
20X B
0.25
M
S
S
T
A
B
E
e
H
h
L
1.27 BSC
A
10.05
0.25
0.50
0
10.55
0.75
0.90
7
SEATING
PLANE
18X e
A1
C
T
5
MOTOROLA
MC74VHCT540A
OUTLINE DIMENSIONS
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948E–02
ISSUE A
20X K REF
0.10 (0.004)
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
M
S
S
T
U
V
S
Y14.5M, 1982.
0.15 (0.006)
T U
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
K
K1
20
11
2X L/2
J J1
B
L
–U–
PIN 1
IDENT
SECTION N–N
1
10
0.25 (0.010)
N
S
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE –W–.
0.15 (0.006)
T U
M
A
MILLIMETERS
INCHES
DIM
A
B
C
D
MIN
6.40
4.30
–––
0.05
0.50
MAX
6.60
4.50
1.20
0.15
0.75
MIN
MAX
0.260
0.177
0.047
0.006
0.030
–V–
0.252
0.169
–––
0.002
0.020
N
F
F
G
H
J
J1
K
K1
L
0.65 BSC
0.026 BSC
DETAIL E
0.27
0.09
0.09
0.19
0.19
0.37
0.20
0.16
0.30
0.25
0.011
0.004
0.004
0.007
0.007
0.015
0.008
0.006
0.012
0.010
–W–
C
6.40 BSC
0.252 BSC
G
D
M
0
8
0
8
H
DETAIL E
0.100 (0.004)
–T– SEATING
PLANE
MOTOROLA
6
MC74VHCT540A
OUTLINE DIMENSIONS
M SUFFIX
PLASTIC SOIC EIAJ PACKAGE
CASE 967–01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
L
E
20
11
Q
1
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
H
E
E
M
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
L
1
10
DETAIL P
Z
D
VIEW P
MILLIMETERS
INCHES
e
A
DIM
A
1
b
c
D
E
e
MIN
–––
MAX
2.05
0.20
0.50
0.27
12.80
5.45
MIN
MAX
0.081
0.008
0.020
0.011
0.504
0.215
c
–––
0.002
0.014
0.007
0.486
0.201
A
0.05
0.35
0.18
12.35
5.10
A
b
1
1.27 BSC
0.050 BSC
M
0.10 (0.004)
0.13 (0.005)
H
7.40
0.50
1.10
0
8.20
0.85
1.50
10
0.291
0.020
0.043
0
0.323
0.033
0.059
10
E
L
L
M
E
Q
Z
0.70
–––
0.90
0.81
0.028
–––
0.035
0.032
1
7
MOTOROLA
MC74VHCT540A
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,including“Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
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and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
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