MC74LCX541DTG [ONSEMI]
Low-Voltage CMOS Octal Buffer Flow Through Pinout;![MC74LCX541DTG](http://pdffile.icpdf.com/pdf2/p00339/img/icpdf/MC74LCX541DT_2084441_icpdf.jpg)
型号: | MC74LCX541DTG |
厂家: | ![]() |
描述: | Low-Voltage CMOS Octal Buffer Flow Through Pinout 驱动 光电二极管 逻辑集成电路 |
文件: | 总8页 (文件大小:118K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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MC74LCX541
Low-Voltage CMOS Octal
Buffer Flow Through Pinout
With 5 V−Tolerant Inputs and Outputs
(3−State, Non−Inverting)
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The MC74LCX541 is a high performance, non−inverting octal
buffer operating from a 2.3 to 3.6 V supply. This device is similar in
function to the MC74LCX244, while providing flow through
architecture. High impedance TTL compatible inputs significantly
reduce current loading to input drivers while TTL compatible outputs
SOIC−20 WB
DW SUFFIX
CASE 751D
TSSOP−20
DT SUFFIX
CASE 948E
offer improved switching noise performance. A V specification of
I
5.5 V allows MC74LCX541 inputs to be safely driven from 5 V
devices. The MC74LCX541 is suitable for memory address driving
and all TTL level bus oriented transceiver applications.
Current drive capability is 24 mA at the outputs. The Output Enable
(OE1. OE2) inputs, when HIGH, disables the output by placing them
in a HIGH Z condition.
MARKING DIAGRAMS
20
1
LCX541
AWLYYWWG
Features
• Designed for 2.3 to 3.6 V V Operation
CC
• 5 V Tolerant − Interface Capability With 5 V TTL Logic
• Supports Live Insertion and Withdrawal
SOIC−20 WB
• I
Specification Guarantees High Impedance When V = 0 V
CC
OFF
20
• LVTTL Compatible
LCX
541
• LVCMOS Compatible
• 24 mA Balanced Output Sink and Source Capability
ALYW G
G
• Near Zero Static Supply Current in All Three Logic States (10 mA)
Substantially Reduces System Power Requirements
• Latchup Performance Exceeds 500 mA
1
TSSOP−20
• ESD Performance:
A
L, WL
Y, YY
=
=
=
Assembly Location
Wafer Lot
Year
♦ Human Body Model > 2000 V
♦ Machine Model > 200 V
W, WW = Work Week
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
G or G
= Pb−Free Package
(Note: Microdot may be in either location)
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
ORDERING INFORMATION
See detailed ordering and shipping information in the package
Compliant
dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
August, 2014 − Rev. 9
MC74LCX541/D
MC74LCX541
1
OE1
OE2
19
V
OE2 O0
O1
17
O2
16
O3
15
O4
14
O5
13
O6
12
O7
11
CC
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
20
19
18
D0
O0
O1
O2
O3
O4
O5
O6
O7
D1
D2
D3
D4
D5
D6
D7
1
2
3
4
5
6
7
9
8
10
OE1 D0
D1
D2
D3
D4
D5
D6
D7 GND
Figure 1. Pinout: 20−Lead (Top View)
PIN NAMES
Pins
OEn
Dn
Function
Output Enable Inputs
Data Inputs
On
3−State Outputs
Figure 2. Logic Diagram
TRUTH TABLE
Inputs
Outputs
OE1
L
OE2
L
Dn
L
On
L
L
L
H
X
H
Z
X
H
H
X
X
Z
H = High Voltage Level; L = Low Voltage Level; Z = High Impedance State;
X = High or Low Voltage Level and Transitions are Acceptable, for I reasons,
CC
DO NOT FLOAT Inputs
MAXIMUM RATINGS
Symbol
Parameter
DC Supply Voltage
Value
Condition
Units
V
V
CC
−0.5 to +7.0
V
I
DC Input Voltage
−0.5 ≤ V ≤ +7.0
V
I
V
O
DC Output Voltage
−0.5 ≤ V ≤ +7.0
Output in 3−State
(Note 1)
V
O
−0.5 ≤ V ≤ V + 0.5
V
O
CC
I
DC Input Diode Current
DC Output Diode Current
−50
V < GND
mA
mA
mA
mA
mA
mA
°C
IK
I
I
−50
+50
50
V < GND
O
OK
V
O
> V
CC
I
DC Output Source/Sink Current
DC Supply Current Per Supply Pin
DC Ground Current Per Ground Pin
Storage Temperature Range
Moisture Sensitivity
O
I
100
100
CC
I
GND
T
−65 to +150
STG
MSL
Level 1
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Output in HIGH or LOW State. I absolute maximum rating must be observed.
O
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2
MC74LCX541
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Typ
Max
Units
V
CC
Supply Voltage
Operating
Data Retention Only
V
2.0
1.5
3.3
3.3
3.6
3.6
V
Input Voltage
0
5.5
V
V
I
V
O
Output Voltage
(HIGH or LOW State)
(3−State)
0
0
V
CC
5.5
−24
24
I
I
HIGH Level Output Current, V = 3.0 V − 3.6 V
mA
mA
mA
mA
°C
OH
CC
I
OL
LOW Level Output Current, V = 3.0 V − 3.6 V
CC
HIGH Level Output Current, V = 2.7 V − 3.0 V
−12
12
OH
CC
I
OL
LOW Level Output Current, V = 2.7 V − 3.0 V
CC
T
A
Operating Free−Air Temperature
−40
0
+85
10
Dt/DV
Input Transition Rise or Fall Rate, V from 0.8 V to 2.0 V, V = 3.0 V
ns/V
IN
CC
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
T
A
= −40°C to +85°C
Symbol
Characteristic
Condition
Min
2.0
Max
Units
V
IH
HIGH Level Input Voltage (Note 2)
LOW Level Input Voltage (Note 2)
HIGH Level Output Voltage
2.7 V ≤ V ≤ 3.6 V
V
V
V
CC
V
IL
2.7 V ≤ V ≤ 3.6 V
0.8
CC
V
OH
2.7 V ≤ V ≤ 3.6 V; I = −100 mA
V
− 0.2
CC
OH
CC
V
CC
V
CC
V
CC
= 2.7 V; I = −12 mA
2.2
OH
= 3.0 V; I = −18 mA
2.4
2.2
OH
= 3.0 V; I = −24 mA
OH
V
LOW Level Output Voltage
3−State Output Current
2.7 V ≤ V ≤ 3.6 V; I = 100 mA
0.2
0.4
0.4
0.55
5
V
OL
CC
OL
V
CC
V
CC
V
CC
= 2.7 V; I = 12 mA
OL
= 3.0 V; I = 16 mA
OL
= 3.0 V; I = 24 mA
OL
I
V
CC
= 3.6 V, V = V or V ,
mA
OZ
IN
IH
IL
V
OUT
= 0 to 5.5 V
I
Power Off Leakage Current
Input Leakage Current
V
= 0, V = 5.5 V or V = 5.5 V
OUT
10
5
mA
mA
mA
mA
OFF
CC
IN
I
IN
V
V
= 3.6 V, V = 5.5 V or GND
IN
CC
CC
I
Quiescent Supply Current
= 3.6 V, V = 5.5 V or GND
10
500
CC
IN
DI
Increase in I per Input
2.3 ≤ V ≤ 3.6 V; V = V − 0.6 V
CC IH CC
CC
CC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. These values of V are used to test DC electrical characteristics only.
I
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3
MC74LCX541
AC ELECTRICAL CHARACTERISTICS (t = t = 2.5 ns; C = 50 pF; R = 500 W)
R
F
L
L
Limits
T
A
= −40°C to +85°C
V
CC
= 3.0 V to 3.6 V
V
CC
= 2.7 V
Symbol
Parameter
Waveform
Min
Max
Max
Units
t
t
Propagation Delay
Input to Output
1
1.5
1.5
6.5
6.5
7.5
7.5
ns
PLH
PHL
t
t
Output Enable Time to
High and Low Level
2
2
1.5
1.5
8.5
8.5
9.5
9.5
ns
ns
ns
PZH
PZL
t
Output Disable Time From
High and Low Level
1.5
1.5
7.5
7.5
8.5
8.5
PHZ
t
PLZ
t
t
Output−to−Output Skew (Note 3)
1.0
1.0
OSHL
OSLH
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t
guaranteed by design.
) or LOW−to−HIGH (t
); parameter
OSHL
OSLH
DYNAMIC SWITCHING CHARACTERISTICS
T
A
= +25°C
Typ
Symbol
Characteristic
Condition
= 3.3 V, C = 50 pF, V = 3.3 V, V = 0 V
Min
Max
Units
V
OLP
V
OLV
Dynamic LOW Peak Voltage (Note 4)
Dynamic LOW Valley Voltage (Note 4)
V
V
0.8
V
V
CC
L
IH
IL
= 3.3 V, C = 50 pF, V = 3.3 V, V = 0 V
0.8
CC
L
IH
IL
4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Input Capacitance
Condition
= 3.3 V, V = 0 V or V
Typical
Units
pF
C
V
V
7
8
IN
CC
I
CC
CC
C
Output Capacitance
= 3.3 V, V = 0 V or V
pF
OUT
CC
I
C
Power Dissipation Capacitance
10 MHz, V = 3.3 V, V = 0 V or V
CC
25
pF
PD
CC
I
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4
MC74LCX541
2.7 V
0 V
1.5 V
1.5 V
Dn
t
t
PHL
PLH
V
OH
OL
1.5 V
1.5 V
On
V
WAVEFORM 1 - PROPAGATION DELAYS
t = t = 2.5 ns, 10% to 90%; f = 1 MHz; t = 500 ns
W
R
F
2.7 V
0 V
1.5 V
OEn
t
t
PHZ
PZH
V
V
CC
- 0.3 V
OH
1.5 V
On
≈ 0 V
t
t
PLZ
PZL
≈ 3.0 V
1.5 V
On
V + 0.3 V
OL
GND
WAVEFORM 2 - OUTPUT ENABLE AND DISABLE TIMES
t = t = 2.5 ns, 10% to 90%; f = 1 MHz; t = 500 ns
W
R
F
Figure 3. AC Waveforms
V
CC
6 V
OPEN
GND
R
1
PULSE
GENERATOR
DUT
R
T
C
R
L
L
Test
, t
Switch
Open
6 V
t
PLH PHL
t
, t
PZL PLZ
Open Collector/Drain t
and t
6 V
PLH
PZH PHZ
PHL
t
, t
GND
C = 50 pF or equivalent (Includes jig and probe capacitance)
L
R = R = 500 W or equivalent
L
1
R = Z
of pulse generator (typically 50 W)
T
OUT
Figure 4. Test Circuit
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5
MC74LCX541
ORDERING INFORMATION
Device
†
Package
Shipping
MC74LCX541DWR2G
SOIC−20
(Pb−Free)
1000 Tape & Reel
1000 Tape & Reel
38 Units / Rail
NLV74LCX541DWR2G* (In Development)
MC74LCX541DWG
SOIC−20
(Pb−Free)
SOIC−20
(Pb−Free)
NLV74LCX541DWG* (In Development)
MC74LCX541DTG
SOIC−20
(Pb−Free)
38 Units / Rail
TSSOP−20
(Pb−Free)
75 Units / Rail
NLV74LCX541DTG* (In Development)
MC74LCX541DTR2G
TSSOP−20
(Pb−Free)
75 Units / Rail
TSSOP−20
(Pb−Free)
2500 Tape & Reel
2500 Tape & Reel
NLV74LCX541DTR2G* (In Development)
TSSOP−20
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
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6
MC74LCX541
PACKAGE DIMENSIONS
TSSOP−20
CASE 948E−02
ISSUE C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION:
MILLIMETER.
20X K REF
K
M
S
S
V
0.10 (0.004)
T U
S
K1
0.15 (0.006) T U
3. DIMENSION A DOES NOT INCLUDE
MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH OR GATE BURRS
SHALL NOT EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
J J1
20
11
2X L/2
B
SECTION N−N
L
−U−
PIN 1
IDENT
0.25 (0.010)
N
1
10
M
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
0.15 (0.006) T U
A
−V−
N
MILLIMETERS
INCHES
MIN
DIM MIN
MAX
6.60
4.50
1.20
0.15
0.75
MAX
0.260
0.177
0.047
0.006
0.030
F
A
B
6.40
4.30
---
0.252
0.169
---
DETAIL E
C
D
0.05
0.50
0.002
0.020
F
G
H
0.65 BSC
0.026 BSC
−W−
C
0.27
0.09
0.09
0.19
0.19
0.37
0.20
0.16
0.30
0.25
0.011
0.004
0.004
0.007
0.007
0.015
0.008
0.006
0.012
0.010
J
J1
K
G
D
H
DETAIL E
K1
L
0.100 (0.004)
−T− SEATING
6.40 BSC
0.252 BSC
0
M
0
8
8
_
_
_
_
PLANE
SOLDERING FOOTPRINT*
7.06
1
0.65
PITCH
16X
0.36
16X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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7
MC74LCX541
PACKAGE DIMENSIONS
SOIC−20 WB
CASE 751D−05
ISSUE G
D
A
q
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
20
11
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
E
B
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF B
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
1
10
MILLIMETERS
20X B
DIM MIN
MAX
2.65
0.25
0.49
0.32
12.95
7.60
A
A1
B
C
D
E
2.35
0.10
0.35
0.23
12.65
7.40
M
S
S
B
T
0.25
A
A
e
1.27 BSC
H
h
10.05
0.25
0.50
0
10.55
0.75
0.90
7
SEATING
PLANE
L
18X e
A1
C
q
T
_
_
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
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PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
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Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
MC74LCX541/D
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