MC74LCX541DWG [ONSEMI]

Low-Voltage CMOS Octal Buffer Flow Through Pinout With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting); 低电压CMOS八路缓冲器流量通过引脚电压为5 V容限输入和输出(三态,非反相)
MC74LCX541DWG
型号: MC74LCX541DWG
厂家: ONSEMI    ONSEMI
描述:

Low-Voltage CMOS Octal Buffer Flow Through Pinout With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting)
低电压CMOS八路缓冲器流量通过引脚电压为5 V容限输入和输出(三态,非反相)

总线驱动器 总线收发器 逻辑集成电路 光电二极管
文件: 总8页 (文件大小:88K)
中文:  中文翻译
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MC74LCX541  
Low−Voltage CMOS Octal  
Buffer Flow Through Pinout  
With 5 V−Tolerant Inputs and Outputs  
(3−State, Non−Inverting)  
http://onsemi.com  
MARKING  
The MC74LCX541 is a high performance, non−inverting octal  
buffer operating from a 2.3 to 3.6 V supply. This device is similar in  
function to the MC74LCX244, while providing flow through  
architecture. High impedance TTL compatible inputs significantly  
reduce current loading to input drivers while TTL compatible outputs  
DIAGRAMS  
20  
SOIC−20  
DW SUFFIX  
CASE 751D  
offer improved switching noise performance. A V specification of  
I
5.5 V allows MC74LCX541 inputs to be safely driven from 5 V  
devices. The MC74LCX541 is suitable for memory address driving  
and all TTL level bus oriented transceiver applications.  
Current drive capability is 24 mA at the outputs. The Output Enable  
(OE1. OE2) inputs, when HIGH, disables the output by placing them  
in a HIGH Z condition.  
LCX541  
AWLYYWW  
20  
1
1
20  
Features  
LCX  
541  
ALYW  
TSSOP−20  
DT SUFFIX  
CASE 948E  
20  
Designed for 2.3 to 3.6 V V Operation  
5 V Tolerant − Interface Capability With 5 V TTL Logic  
Supports Live Insertion and Withdrawal  
CC  
1
1
I  
Specification Guarantees High Impedance When V = 0 V  
OFF  
CC  
LVTTL Compatible  
20  
LVCMOS Compatible  
24 mA Balanced Output Sink and Source Capability  
Near Zero Static Supply Current in All Three Logic States (10 mA)  
Substantially Reduces System Power Requirements  
Latchup Performance Exceeds 500 mA  
SOEIAJ−20  
M SUFFIX  
CASE 967  
1
74LCX541  
AWLYWW  
20  
1
ESD Performance:  
Human Body Model >2000 V  
Machine Model >200 V  
A
L, WL  
Y, YY  
= Assembly Location  
= Wafer Lot  
= Year  
Pb−Free Packages are Available*  
W, WW = Work Week  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 3 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
January, 2005 − Rev. 5  
MC74LCX541/D  
MC74LCX541  
1
OE1  
OE2  
19  
V
OE2 O0  
O1  
17  
O2  
16  
O3  
15  
O4  
14  
O5  
13  
O6  
12  
O7  
11  
2
3
4
5
6
7
8
9
18  
17  
16  
15  
14  
13  
12  
11  
CC  
D0  
O0  
O1  
O2  
O3  
O4  
O5  
O6  
O7  
20  
19  
18  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
1
2
3
4
5
6
7
9
8
10  
OE1 D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7 GND  
Figure 1. Pinout: 20−Lead (Top View)  
PIN NAMES  
Pins  
Function  
OEn  
Dn  
Output Enable Inputs  
Data Inputs  
On  
3−State Outputs  
Figure 2. LOGIC DIAGRAM  
TRUTH TABLE  
INPUTS  
OUTPUTS  
OE1  
L
OE2  
L
Dn  
L
On  
L
L
L
H
X
H
Z
X
H
H
X
X
Z
H = High Voltage Level; L = Low Voltage Level; Z = High Impedance  
State; X = High or Low Voltage Level and Transitions are Acceptable, for  
I
reasons, DO NOT FLOAT Inputs  
CC  
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2
MC74LCX541  
MAXIMUM RATINGS  
Symbol  
Parameter  
Value  
Condition  
Unit  
V
V
V
V
DC Supply Voltage  
−0.5 to +7.0  
CC  
I
DC Input Voltage  
−0.5 V +7.0  
V
I
DC Output Voltage  
−0.5 V +7.0  
Output in 3−State  
Note 1  
V
O
O
−0.5 V V + 0.5  
V
O
CC  
I
I
DC Input Diode Current  
DC Output Diode Current  
−50  
V < GND  
mA  
mA  
mA  
mA  
mA  
mA  
°C  
IK  
I
−50  
+50  
V < GND  
O
OK  
V
O
> V  
CC  
I
I
I
DC Output Source/Sink Current  
DC Supply Current Per Supply Pin  
DC Ground Current Per Ground Pin  
Storage Temperature Range  
±50  
O
±100  
±100  
CC  
GND  
T
−65 to +150  
STG  
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit  
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,  
damage may occur and reliability may be affected.  
1. Output in HIGH or LOW State. I absolute maximum rating must be observed.  
O
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
Typ  
Max  
Unit  
V
CC  
Supply Voltage  
Operating  
Data Retention Only  
2.0  
1.5  
3.3  
3.3  
3.6  
3.6  
V
V
V
Input Voltage  
0
5.5  
V
V
I
Output Voltage  
(HIGH or LOW State)  
(3−State)  
0
0
V
CC  
O
5.5  
−24  
24  
I
I
I
I
HIGH Level Output Current, V = 3.0 V − 3.6 V  
mA  
mA  
mA  
mA  
°C  
OH  
CC  
LOW Level Output Current, V = 3.0 V − 3.6 V  
OL  
OH  
OL  
CC  
HIGH Level Output Current, V = 2.7 V − 3.0 V  
−12  
12  
CC  
LOW Level Output Current, V = 2.7 V − 3.0 V  
CC  
T
A
Operating Free−Air Temperature  
−40  
0
+85  
10  
Dt/DV  
Input Transition Rise or Fall Rate, V from 0.8 V to 2.0 V, V = 3.0 V  
ns/V  
IN  
CC  
ORDERING INFORMATION  
Device  
Package  
Shipping  
MC74LCX541DW  
MC74LCX541DWG  
SOIC−20  
38 Units / Rail  
38 Units / Rail  
SOIC−20  
(Pb−Free)  
MC74LCX541DWR2  
MC74LCX541DR2G  
SOIC−20  
1000 Tape & Reel  
1000 Tape & Reel  
SOIC−20  
(Pb−Free)  
MC74LCX541DT  
MC74LCX541DTR2  
MC74LCX541MEL  
TSSOP−20*  
TSSOP−20*  
SOEIAJ−20  
75 Units / Rail  
2000 Tape & Reel  
2000 Tape & Reel  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
*This package is inherently Pb−Free.  
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3
 
MC74LCX541  
DC ELECTRICAL CHARACTERISTICS  
T
A
= −40°C to +85°C  
Symbol  
Characteristic  
Condition  
Min  
2.0  
Max  
Unit  
V
V
V
V
HIGH Level Input Voltage (Note 2)  
LOW Level Input Voltage (Note 2)  
HIGH Level Output Voltage  
2.7 V V 3.6 V  
CC  
IH  
2.7 V V 3.6 V  
0.8  
V
IL  
CC  
2.7 V V 3.6 V; I = −100 mA  
V − 0.2  
CC  
V
OH  
CC  
OH  
V
CC  
V
CC  
V
CC  
= 2.7 V; I = −12 mA  
2.2  
OH  
= 3.0 V; I = −18 mA  
2.4  
2.2  
OH  
= 3.0 V; I = −24 mA  
OH  
V
LOW Level Output Voltage  
2.7 V V 3.6 V; I = 100 mA  
0.2  
0.4  
V
OL  
CC  
OL  
V
= 2.7 V; I = 12 mA  
OL  
CC  
CC  
CC  
V
V
= 3.0 V; I = 16 mA  
0.4  
OL  
= 3.0 V; I = 24 mA  
0.55  
±5.0  
±5.0  
OL  
I
I
Input Leakage Current  
3−State Output Current  
2.7 V V 3.6 V; 0 V V 5.5 V  
mA  
mA  
I
CC  
I
2.7 V 3.6 V; 0 V V 5.5 V;  
OZ  
CC  
O
V = V or V  
IL  
I
IH  
I
I
Power−Off Leakage Current  
Quiescent Supply Current  
V
= 0 V; V or V = 5.5 V  
10  
10  
mA  
mA  
mA  
mA  
OFF  
CC  
I
O
2.7 V 3.6 V; V = GND or V  
CC  
CC  
CC  
I
2.7 V 3.6 V; 3.6 V or V 5.5 V  
±10  
500  
CC  
I
O
DI  
Increase in I per Input  
2.7 V 3.6 V; V = V − 0.6 V  
CC IH CC  
CC  
CC  
2. These values of V are used to test DC electrical characteristics only.  
I
AC ELECTRICAL CHARACTERISTICS (tR = tF = 2.5 ns; CL = 50 pF; RL = 500 W)  
Limits  
T
A
= −40°C to +85°C  
V
CC  
= 3.0 V to 3.6 V  
V
CC  
= 2.7 V  
Symbol  
Parameter  
Waveform  
Min  
Max  
Max  
Unit  
t
t
Propagation Delay  
Input to Output  
1
1.5  
1.5  
6.5  
6.5  
7.5  
7.5  
ns  
PLH  
PHL  
t
t
Output Enable Time to  
High and Low Level  
2
2
1.5  
1.5  
8.5  
8.5  
9.5  
9.5  
ns  
ns  
ns  
PZH  
PZL  
t
t
Output Disable Time From  
High and Low Level  
1.5  
1.5  
7.5  
7.5  
8.5  
8.5  
PHZ  
PLZ  
t
t
Output−to−Output Skew (Note 3)  
1.0  
1.0  
OSHL  
OSLH  
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.  
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t  
guaranteed by design.  
) or LOW−to−HIGH (t  
); parameter  
OSHL  
OSLH  
DYNAMIC SWITCHING CHARACTERISTICS  
T
A
= +25°C  
Typ  
Symbol  
Characteristic  
Condition  
= 3.3 V, C = 50 pF, V = 3.3 V, V = 0 V  
Min  
Max  
Unit  
V
V
V
Dynamic LOW Peak Voltage (Note 4)  
Dynamic LOW Valley Voltage (Note 4)  
V
V
0.8  
OLP  
CC  
L
IH  
IL  
= 3.3 V, C = 50 pF, V = 3.3 V, V = 0 V  
0.8  
V
OLV  
CC  
L
IH  
IL  
4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is  
measured in the LOW state.  
CAPACITIVE CHARACTERISTICS  
Symbol  
Parameter  
Input Capacitance  
Condition  
= 3.3 V, V = 0 V or V  
Typical  
Unit  
pF  
C
C
C
V
V
7
8
IN  
CC  
I
CC  
CC  
Output Capacitance  
= 3.3 V, V = 0 V or V  
pF  
OUT  
PD  
CC  
I
Power Dissipation Capacitance  
10 MHz, V = 3.3 V, V = 0 V or V  
CC  
25  
pF  
CC  
I
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4
 
MC74LCX541  
2.7 V  
0 V  
1.5 V  
1.5 V  
Dn  
t
t
PHL  
PLH  
V
OH  
OL  
1.5 V  
1.5 V  
On  
V
WAVEFORM 1 − PROPAGATION DELAYS  
= t = 2.5 ns, 10% to 90%; f = 1 MHz; t = 500 ns  
t
R
F
W
2.7 V  
0 V  
1.5 V  
OEn  
t
t
PHZ  
PZH  
V
V
CC  
− 0.3 V  
OH  
1.5 V  
On  
0 V  
t
t
PLZ  
PZL  
3.0 V  
1.5 V  
On  
V + 0.3 V  
OL  
GND  
WAVEFORM 2 − OUTPUT ENABLE AND DISABLE TIMES  
t
R
= t = 2.5 ns, 10% to 90%; f = 1 MHz; t = 500 ns  
F W  
Figure 3. AC Waveforms  
V
CC  
6 V  
OPEN  
GND  
R
1
PULSE  
GENERATOR  
DUT  
R
T
C
L
R
L
TEST  
SWITCH  
Open  
6 V  
t
, t  
PLH PHL  
t
, t  
PZL PLZ  
Open Collector/Drain t  
and t  
6 V  
PLH  
PHL  
t
, t  
GND  
PZH PHZ  
C = 50 pF or equivalent (Includes jig and probe capacitance)  
L
R = R = 500 W or equivalent  
L
1
R = Z  
of pulse generator (typically 50 W)  
T
OUT  
Figure 4. Test Circuit  
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5
MC74LCX541  
PACKAGE DIMENSIONS  
SOIC−20  
DW SUFFIX  
CASE 751D−05  
ISSUE G  
NOTES:  
D
1. DIMENSIONS ARE IN MILLIMETERS.  
2. INTERPRET DIMENSIONS AND TOLERANCES  
PER ASME Y14.5M, 1994.  
A
q
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD  
PROTRUSION.  
20  
11  
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.  
5. DIMENSION B DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE PROTRUSION  
SHALL BE 0.13 TOTAL IN EXCESS OF B  
DIMENSION AT MAXIMUM MATERIAL  
CONDITION.  
E
B
1
10  
MILLIMETERS  
DIM MIN  
MAX  
2.65  
0.25  
0.49  
0.32  
12.95  
7.60  
A
A1  
B
C
D
E
2.35  
0.10  
0.35  
0.23  
12.65  
7.40  
20X B  
M
S
S
B
T
0.25  
A
e
1.27 BSC  
H
h
10.05  
0.25  
0.50  
0
10.55  
0.75  
0.90  
7
A
L
q
_
_
SEATING  
PLANE  
18X e  
A1  
C
T
TSSOP−20  
DT SUFFIX  
CASE 948E−02  
ISSUE B  
NOTES:  
20X K REF  
1. DIMENSIONING AND TOLERANCING  
PER ANSI Y14.5M, 1982.  
2. CONTROLLING DIMENSION:  
MILLIMETER.  
M
S
S
V
0.10 (0.004)  
T U  
S
0.15 (0.006) T U  
K
3. DIMENSION A DOES NOT INCLUDE  
MOLD FLASH, PROTRUSIONS OR GATE  
BURRS. MOLD FLASH OR GATE BURRS  
SHALL NOT EXCEED 0.15 (0.006) PER  
SIDE.  
4. DIMENSION B DOES NOT INCLUDE  
INTERLEAD FLASH OR PROTRUSION.  
INTERLEAD FLASH OR PROTRUSION  
SHALL NOT EXCEED 0.25 (0.010) PER  
SIDE.  
K1  
20  
11  
2X L/2  
J J1  
B
L
−U−  
PIN 1  
IDENT  
SECTION N−N  
5. DIMENSION K DOES NOT INCLUDE  
DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.08  
(0.003) TOTAL IN EXCESS OF THE K  
DIMENSION AT MAXIMUM MATERIAL  
CONDITION.  
1
10  
0.25 (0.010)  
N
S
0.15 (0.006) T U  
6. TERMINAL NUMBERS ARE SHOWN  
FOR REFERENCE ONLY.  
7. DIMENSION A AND B ARE TO BE  
DETERMINED AT DATUM PLANE −W−.  
M
A
−V−  
N
MILLIMETERS  
DIM MIN MAX  
INCHES  
MIN  
MAX  
0.260  
0.177  
0.047  
0.006  
0.030  
F
A
B
6.40  
4.30  
−−−  
6.60 0.252  
4.50 0.169  
DETAIL E  
C
1.20  
−−−  
D
0.05  
0.50  
0.15 0.002  
0.75 0.020  
−W−  
F
C
G
H
0.65 BSC  
0.026 BSC  
0.27  
0.09  
0.09  
0.19  
0.19  
0.37  
0.011  
0.015  
0.008  
0.006  
0.012  
0.010  
J
0.20 0.004  
0.16 0.004  
0.30 0.007  
0.25 0.007  
G
D
J1  
K
H
DETAIL E  
0.100 (0.004)  
−T− SEATING  
K1  
L
6.40 BSC  
0 8 0 8  
0.252 BSC  
M
_
_
_
_
PLANE  
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6
MC74LCX541  
PACKAGE DIMENSIONS  
SOEIAJ−20  
M SUFFIX  
CASE 967−01  
ISSUE O  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
L
E
20  
11  
Q
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD  
FLASH OR PROTRUSIONS AND ARE MEASURED  
AT THE PARTING LINE. MOLD FLASH OR  
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)  
PER SIDE.  
1
H
E
_
E
M
4. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
L
1
10  
5. THE LEAD WIDTH DIMENSION (b) DOES NOT  
INCLUDE DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)  
TOTAL IN EXCESS OF THE LEAD WIDTH  
DIMENSION AT MAXIMUM MATERIAL CONDITION.  
DAMBAR CANNOT BE LOCATED ON THE LOWER  
RADIUS OR THE FOOT. MINIMUM SPACE  
BETWEEN PROTRUSIONS AND ADJACENT LEAD  
TO BE 0.46 ( 0.018).  
DETAIL P  
Z
D
VIEW P  
e
A
c
MILLIMETERS  
INCHES  
MIN  
DIM MIN  
MAX  
2.05  
0.20  
0.50  
0.27  
12.80  
5.45  
MAX  
0.081  
0.008  
0.020  
0.011  
0.504  
0.215  
A
A
1
−−−  
0.05  
0.35  
0.18  
12.35  
5.10  
−−−  
0.002  
0.014  
0.007  
0.486  
0.201  
A
b
1
b
c
M
0.10 (0.004)  
0.13 (0.005)  
D
E
e
1.27 BSC  
0.050 BSC  
H
7.40  
0.50  
1.10  
8.20  
0.85  
1.50  
0.291  
0.020  
0.043  
0.323  
0.033  
0.059  
E
L
L
E
M
Q
0
10  
0
10  
_
0.035  
0.032  
_
_
_
0.70  
−−−  
0.90  
0.81  
0.028  
−−−  
1
Z
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7
MC74LCX541  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
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MC74LCX541/D  

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MC74LCX541DWR2

Low-Voltage CMOS Octal Buffer Flow Through Pinout With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting)
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暂无描述
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