FSA2866UMX [ONSEMI]

交点模拟开关;
FSA2866UMX
型号: FSA2866UMX
厂家: ONSEMI    ONSEMI
描述:

交点模拟开关

开关
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May 2011  
FSA2866  
Dual-Host / Dual-SIM Card Crosspoint Analog Switch  
Description  
Features  
The FSA2866 is a dual-host, dual-SIM card analog switch  
designed specifically for cell phones that support two specific  
carrier services (for example, CDMA and GSM/3G).  
Switch Type  
Input Type  
Input Signal Range  
VCC  
2x2 Crosspoint Switch  
Data  
0 to VCC  
1.65V to 4.30V  
Related Resources  
Data 2(Typical)  
VSIM 2(Typical)  
RON  
. For samples and questions, please contact:  
Analog.Switch@fairchildsemi.com.  
RFLAT  
ESD  
0.6(Typical)  
. FSA2866 Evaluation Board  
IEC 61000-4-2 System  
Air 15kV, Contact 8kV  
CON  
28pF (Typical)  
12pF (Typical)  
COFF  
20-Lead UMLP, 3 x 3 x  
0.55mm, 0.40mm Pitch  
with Exposed DAP  
Package  
Ordering Information  
FSA2866UMX  
Applications  
. MP3 Portable Media Players  
. Cellular Phones, Smart Phones  
FSA2866  
Processor  
#1  
SIM  
Dual host /  
dual SIM card  
switch  
Processor  
#2  
SIM  
Figure 1. Typical Mobile Phone Application  
© 2010 Fairchild Semiconductor Corporation  
FSA2866 • Rev. 1.0.0  
www.fairchildsemi.com  
Pin Descriptions  
Pin # Name  
Type Description  
0
Active  
Output  
Enable  
1
/OE  
Input  
1
Switch Disabled  
2
3
VSIMH1  
RSTH1  
CLKH1  
DATAH1  
VSIMH2  
RSTH2  
CLKH2  
DATAH2  
VCC  
I / O  
I / O  
Common Ports for Host #1  
4
I / O  
I / O  
I / O  
I / O  
I / O  
I / O  
5
6
7
Common Ports for Host #2  
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
Supply Power  
Ground Ground  
I / O  
GND  
DATA2  
CLK2  
I / O  
SIM Card Ports for Card #2  
RST2  
I / O  
I / O  
I / O  
I / O  
I / O  
I / O  
VSIM2  
DATA1  
CLK1  
SIM Card Ports for Card #1  
RST1  
VSIM1  
Host #1 connected to  
Card #1  
[VSIMH1=VSIM1;  
DATAH1=DATA1;  
CLKH1=CLK1;  
RSTH1=RST1]  
SEL=0  
Host #2 connected to  
Card #2  
Figure 2. Functional Diagram  
[VSIMH2=VSIM2;  
DATAH2=DATA2;  
CLKH2=CLK2;  
SEL  
20  
VSIM1  
19  
RST1  
18  
CLK1  
17  
DATA1  
16  
RSTH2=RST2]  
Control  
Pin  
20  
SEL  
Input  
/OE  
VSIM2  
1
2
3
4
5
15  
14  
13  
12  
11  
Host #1 connected to  
Card #2  
[VSIMH1=VSIM2;  
DATAH1=DATA2;  
CLKH1=CLK1;  
VSIMH1  
RST2  
CLK2  
RSTH1=RST1]  
Exposed DAP  
RSTH1  
CLKH1  
SEL=1  
Host #2 connected to  
Card #1  
DATA2  
GND  
[VSIMH2=VSIM1;  
DATAH2=DATA1;  
CLKH2=CLK1;  
DATAH1  
RSTH2=RST1]  
6
7
8
9
10  
Exposed die attach paddle (DAP) not  
electrically connected to any pin.  
DAP  
DAP  
N/C  
VSIMH2 RSTH2 CLKH2 DATAH2  
VCC  
Figure 3. Pin Assignments (Top Through View)  
© 2010 Fairchild Semiconductor Corporation  
FSA2866 • Rev. 1.0.0  
www.fairchildsemi.com  
2
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable  
above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition,  
extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute  
maximum ratings are stress ratings only.  
Symbol Parameter  
Min.  
-0.50  
-0.5  
-0.5  
-50  
Max.  
+5.5  
Unit  
V
VCC  
VCNTRL  
VSW  
IIK  
Supply Voltage  
DC Input Voltage (SEL,/OE)  
VCC  
V
DC Switch I/O Voltage - DATAHn, CLKHn, CLKn, RSTHn, RSTn  
DC Input Diode Current  
VCC + 0.3  
V
mA  
mA  
mA  
°C  
ISIM  
DC Output Current – VSIMHn, VSIMn  
DC Output Current – DATAHn, CLKHn, CLKn, RSTHn, RSTn  
Storage Temperature  
100  
35  
IOUT  
TSTG  
-65  
8
+150  
All Pins  
Human Body Model, JEDEC: JESD22-A114  
I/O to GND, Card Side Pins  
16  
9
Power to GND  
ESD  
kV  
Charged Device Model, JEDEC: JESD22-C101  
IEC 61000-4-2 System-Level  
2
Contact  
Air Gap  
8
15  
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating  
conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend  
exceeding these ratings or designing to Absolute Maximum Ratings.  
Symbol Parameter  
Min.  
1.65  
0
Typ.  
Max.  
4.3  
Unit  
V
VCC  
VCNTRL  
VSW  
ISIM  
Supply Voltage  
Control Input Voltage (SEL, /OE)  
VCC  
VCC  
30  
V
Switch I/O Voltage - DATAHn, CLKHn, CLKn, RSTHn, RSTn  
DC Output Current – VSIMHn, VSIMn  
0
V
mA  
mA  
°C  
IOUT  
TA  
DC Output Current – DATAHn, CLKHn, CLKn, RSTHn, RSTn  
Operating Temperature  
10  
-40  
+85  
© 2010 Fairchild Semiconductor Corporation  
FSA2866 • Rev. 1.0.0  
www.fairchildsemi.com  
3
DC Electrical Characteristics  
TA=25°C and VCC=3.0V unless otherwise noted.  
TA=- 40ºC to  
+85ºC  
Symbol Parameter  
Conditions  
VCC (V)  
Unit  
V
Min. Ty p. Max.  
VIK  
VIH  
Clamp Diode Voltage  
Input Voltage High  
IIN=-18mA  
2.7  
-1.2  
1.65 to 2.30 1.1  
2.7 to 3.6  
4.3  
1.3  
1.7  
V
1.65 to 2.30  
2.7 to 3.6  
4.3  
0.4  
0.5  
0.7  
VIL  
Input Voltage Low  
V
Control Input Leakage  
(SEL,/OE)  
IIN  
VSW=0 to VCC  
4.3  
-1  
1
µA  
nA  
VSIMHn=DATAHn=CLKHn=RSTHn=0.3  
V, VCC-0.3V; RSTn, CLKn, DATAn, or  
VSIMn=VCC-0.3V, 0.3V, or Floating  
INO(OFF) Off Leakage Current of Ports  
INC(OFF) RSTn, DATAn, CLKn, VSIMn  
4.3  
-100  
100  
On Leakage Current of  
Common=0.3V, VCC-0.3V;  
IA(ON)  
Common Ports – RSTHn,  
DATAHn, CLKHn, VSIMHn  
VSIMHn=DATAHn=CLKHn=RSTHn=  
VCC-0.3V, 0.3V, or Floating  
4.3  
-100  
100  
nA  
VSIMHn or DATAHn or CLKHn or  
RSTHn VIN=0V to 4.3V, VCC=0V  
IOFF  
IOZ  
Power-Off Leakage Current  
Off-State Leakage  
0
-2  
-5  
2
5
µA  
µA  
VSIMHn or DATAHn or CLKHn or  
RSTHn VIN=0.3V to 4.3V, /OE=VCC  
4.3  
I
ON=-20mA; /OE=0V; SEL=VCC or 0V;  
Switch On Resistance for  
Data Paths  
RON_DATA  
RSTn, CLKn, DATAn, or VSIMn=0  
or 2.7V  
2.7  
2.7  
2.0  
2.0  
3.5  
3.5  
  
  
ION=- 50mA; /OE=0V; SEL=VCC or 0V;  
RSTn, CLKn, DATAn, or VSIMn=0  
or 2.7V  
Switch On Resistance for  
VSIM Paths  
RON_VSIM  
On Resistance Matching  
Between Data Channels  
ION=-20mA; /OE=0V; SEL=VCC or 0V;  
RSTn, CLKn, or DATAn=0V  
RON_DATA  
2.7  
2.7  
0.10 0.25  
  
  
On Resistance Flatness Data ION=-20mA, /OE=0V,SEL=VCC or 0V,  
Path Signals  
RON_FLAT  
0.6  
7
0.8  
RSTn, CLKn or DATAn=0 to VCC  
ICC  
Quiescent Supply Current  
VIN=0 or VCC, IOUT=0  
VIN=1.65V, VCC=4.3V  
4.3  
4.3  
1
µA  
µA  
Increase in ICC Current Per  
Control Voltage and VCC  
ICCT  
9.5  
Notes:  
1. Guaranteed by characterization; not production tested.  
2. On resistance is determined by the voltage drop between the D+/D- and D+/R, D-/L pins at the indicated current through  
the switch.  
3. RON=RON_max – RON_min measured at identical VCC, temperature, and voltage.  
© 2010 Fairchild Semiconductor Corporation  
FSA2866 • Rev. 1.0.0  
www.fairchildsemi.com  
4
AC Electrical Characteristics  
TA=25°C and VCC=3.0V unless otherwise noted.  
TA=- 40ºC to +85ºC  
Min. Ty p. Max.  
Symbol Parameter  
Conditions  
VCC (V)  
Unit  
2.8 to 4.3  
1.8  
55  
75  
110  
75  
RL=50, CL=30pF, VSW=0.8V  
Figure 4  
tON  
Turn-On Time, /OE to Output  
ns  
2.8 to 4.3  
1.8  
24  
RL=50, CL=30pF, VSW=0.8V  
Figure 4  
tOFF  
tBBM  
Turn-Off Time, /OE to Output  
Break-Before-Make Time  
ns  
ns  
110  
RL=50, CL=30pF, VSW=0.8V  
Figure 5  
2
35  
90  
RL=50, f=100KHz, /OE=VCC  
,
OIRR  
Off Isolation  
Crosstalk  
V
SW=13dBm (3Vpp)  
1.8 to 4.3  
1.8 to 4.3  
dB  
dB  
Figure 6  
RL=50, f=100KHz,  
XTALK  
VSW=13dBm (3Vpp)  
85  
Figure 6  
RL=50, CL=0pF, Figure 8  
RL=50, CL=5pF, Figure 8  
RL=50, CL=30pF, Figure 8  
RL=50, CL=50pF, Figure 8  
210  
198  
120  
78  
BW  
-3db Bandwidth  
3.0  
MHz  
Note:  
4. Guaranteed by characterization; not production tested.  
Capacitance  
TA=25°C unless otherwise noted.  
TA=- 40ºC to +85ºC  
Min. Ty p. Max.  
Symbol Parameter  
Conditions  
Unit  
CIN  
CON  
COFF  
Control Pin Input Capacitance  
On Capacitance  
VCC=0V, f=1MHz  
2
pF  
pF  
pF  
VCC=3.3V, /OE=0V, f=1MHz, Figure 7  
VCC and /OE=3.3V, f=1MHz, Figure 7  
28  
12  
Off Capacitance  
© 2010 Fairchild Semiconductor Corporation  
FSA2866 • Rev. 1.0.0  
www.fairchildsemi.com  
5
AC Loadings and Waveforms  
Figure 4. Turn-On / Turn-Off Timing  
Figure 5. Break-Before-Make Timing  
Figure 6. Off Isolation and Crosstalk  
© 2010 Fairchild Semiconductor Corporation  
FSA2866 • Rev. 1.0.0  
www.fairchildsemi.com  
6
AC Loadings and Waveforms (Continued)  
Figure 7.  
On / Off Capacitance Measurement Setup  
Figure 8.  
Bandwidth  
© 2010 Fairchild Semiconductor Corporation  
FSA2866 • Rev. 1.0.0  
www.fairchildsemi.com  
7
Physical Dimensions  
0.10  
C
3.00  
A
2X  
3.00  
1.80  
B
PIN1  
IDENT  
3.00  
3.00  
1.80  
0.10  
C
2X  
0.80 20X  
TOP VIEW  
0.40  
0.20 20X  
0.08  
C
0.55 MAX  
0.10  
C
RECOMMENDED LAND PATTERN  
(0.15)  
0.05  
0.00  
C
SEATING  
PLANE  
SIDE VIEW  
NOTES:  
1.75  
1.65  
A. PACKAGE CONFORMS TO JEDEC MO-248  
VARIATION UEEE.  
6
10  
B. DIMENSIONS ARE IN MILLIMETERS.  
C. DIMENSIONS AND TOLERANCES PER  
ASME Y14.5M, 1994.  
5
1
0.25  
20X  
11  
15  
0.15  
D. LAND PATTERN RECOMMENDATION IS  
FROM PCB MATRIX CALCULATOR V2009.  
1.75  
1.65  
E. DRAWING FILENAME: MKT-UMLP20Brev1.  
PIN 1  
IDENT  
20  
0.40  
16  
0.45  
0.35  
20X  
0.10  
0.05  
C
C
A B  
BOTTOM VIEW  
Figure 9. 20-Pin Ultrathin Molded Leadless Package (UMLP)  
Operating  
Temperature Range  
Packing  
Method  
Order Number  
Package Description  
FSA2866UMX  
-40 to 85°C  
20-Lead Ultrathin Molded Leadless Package (UMLP)  
Tape & Reel  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without  
notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most  
recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty  
therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.  
© 2010 Fairchild Semiconductor Corporation  
FSA2866 • Rev. 1.0.0  
www.fairchildsemi.com  
8
© 2010 Fairchild Semiconductor Corporation  
FSA2866 • Rev. 1.0.0  
www.fairchildsemi.com  
9
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent  
coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.  
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized  
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and  
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such  
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This  
literature is subject to all applicable copyright laws and is not for resale in any manner.  
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