FSA3031UMX [ONSEMI]

带 Mobile High-Definition Link (MHL™) 的双高速 USB2.0;
FSA3031UMX
型号: FSA3031UMX
厂家: ONSEMI    ONSEMI
描述:

带 Mobile High-Definition Link (MHL™) 的双高速 USB2.0

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November 2012  
FSA3031 — Dual High-Speed USB2.0 with Mobile  
High-Definition Link (MHL™)  
Description  
Features  
The FSA3031 is a bi-directional, low-power, high-speed,  
3:1, dual USB2.0 and MHL switch. Configured as a  
double-pole, triple-throw (DP3T) switch; it is optimized  
for switching between dual high- or full-speed USB and  
Mobile High-Definition Link sources (MHL™ Rev. 2.0  
specification).  
.
Low On Capacitance: 4.6 pF/6.75 pF MHL/USB  
(Typical)  
.
.
.
Low Power Consumption: 30 μA Maximum  
Supports MHL Rev. 2.0  
Passes 1080 p/60 fps (3 Gbps) MHL Data Eye  
Diagram Mask Compliance  
The FSA3031 contains special circuitry on the switch  
I/O pins, for applications where the VCC supply is  
powered off (VCC=0), that allows the device to withstand  
an over-voltage condition. This switch is designed to  
minimize current consumption even when the control  
voltage applied to the control pins is lower than the  
supply voltage (VCC). This feature is especially valuable  
to mobile applications, such as cell phones; allowing  
direct interface with the general-purpose I/Os of the  
baseband processor. Other applications include  
switching and connector sharing in portable cell phones,  
digital cameras, and notebook computers.  
.
.
.
MHL Data Rate: 4.7Gbps with Ideal Input Source  
Packaged in 12-Lead UMLP (1.8 x 1.8 mm)  
Over-Voltage Tolerance (OVT) on all USB Ports  
Up to 5.25 V without External Components  
Applications  
.
Cell Phones and Digital Cameras  
IMPORTANT NOTE:  
For additional performance information, please contact  
interface@fairchildsemi.com.  
Ordering Information  
Part Number Top Mark Operating Temperature Range  
Package  
12-Lead, Ultrathin Molded Leadless Package  
(UMLP), 1.8 mm x 1.8 mm  
FSA3031UMX  
LX  
-40 to +85°C  
Figure 1. Typical Application  
All trademarks are the property of their respective owners.  
© 2011 Fairchild Semiconductor Corporation  
FSA3031 • Rev. 1.0.4  
www.fairchildsemi.com  
Analog Symbol  
Figure 2. Analog Symbol  
Table 1. Data Switch Select Truth Table  
SEL1(1)  
SEL0(1)  
Function  
0
0
1
1
0
1
0
1
D+/D- connected to USB1+/USB1-  
D+/D- connected to USB2+/USB2-  
D+/D- connected to MHL+/MHL  
D+/D- high impedance  
Note:  
1. Control inputs should never be left floating or unconnected. To guarantee default switch closure to the USB  
position, the SEL[0:1] pins should be tied to GND with a weak pull-down resistor (3 M) to minimize static  
current draw.  
© 2011 Fairchild Semiconductor Corporation  
FSA3031 • Rev. 1.0.4  
www.fairchildsemi.com  
2
Pin Configuration  
1
2
VCC  
12  
11  
10  
3
4
USB1+  
USB1-  
USB2+  
USB2-  
D+  
D-  
Bottom View  
5
6
9
GND  
8
7
Figure 3. Pin Asignments  
Figure 4. Top Through View  
Pin Definitions  
Pin#  
1
Name  
SEL0  
SEL1  
USB1+  
USB1-  
USB2+  
USB2-  
MHL+  
MHL-  
GND  
D-  
Description  
Data Switch Select  
Data Switch Select  
2
3
USB Differential Data (Positive) – Source 1  
USB Differential Data (Negative) – Source 1  
USB Differential Data (Positive) – Source 2  
USB Differential Data (Negative) – Source 2  
MHL Differential Data (Positive)  
MHL Differential Data (Negative)  
Ground  
4
5
6
7
8
9
10  
11  
12  
Data Switch Output (Positive)  
D+  
Data Switch Output (Negative)  
Device Power from System  
VCC  
© 2011 Fairchild Semiconductor Corporation  
FSA3031 • Rev. 1.0.4  
www.fairchildsemi.com  
3
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.  
The absolute maximum ratings are stress ratings only.  
Symbol  
VCC  
Parameter  
Min.  
-0.5  
Max.  
6.0  
Unit  
V
Supply Voltage  
VCNTRL  
DC Input Voltage (SEL[1:0])(2)  
-0.5  
VCC  
VCC  
VCC  
V
USB  
MHL  
-0.50  
-0.50  
-50  
(3)  
VSW  
DC Switch I/O Voltage(2)  
DC Input Diode Current  
V
IIK  
mA  
mA  
mA  
mA  
mA  
°C  
USB  
MHL  
USB  
MHL  
60  
60  
150  
150  
+150  
1
IOUT  
Switch DC Output Current (Continuous)  
Switch DC Output Peak Current  
(Pulsed at 1m Duration, <10% Duty Cycle)  
IOUTPEAK  
TSTG  
MSL  
Storage Temperature  
-65  
Moisture Sensitivity Level (JEDEC J-STD-020A)  
Human Body Model, JEDEC: JESD22-A114  
IEC 61000-4-2, Level 4, for D+/D- and VCC Pins(4)  
IEC 61000-4-2, Level 4, for D+/D- and VCC Pins(4)  
Charged Device Model, JESD22-C101  
All Pins  
Contact  
Air  
4
8
ESD  
kV  
15  
2
Notes:  
2. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed.  
3. VSW refers to analog data switch paths (USB1, MHL, and USB2).  
4. Testing performed in a system environment using TVS diodes.  
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended  
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not  
recommend exceeding them or designing to Absolute Maximum Ratings.  
Symbol  
Parameter  
Min.  
2.5  
Max.  
4.5  
Unit  
V
VCC  
tRAMP(VCC)  
ΘJA  
Supply Voltage  
Power Supply Slew Rate  
Thermal Resistance  
100  
1000  
230  
4.5  
µs/V  
C°/W  
V
VCNTRL  
VSW(USB)  
VSW(MHL)  
TA  
Control Input Voltage (SEL[1:0])(5)  
Switch I/O Voltage (USB1/USB2 Switch Paths)  
Switch I/O Voltage (MHL Switch Path)  
Operating Temperature  
0
-0.5  
1.65  
-40  
3.6  
V
3.45  
+85  
V
°C  
Note:  
5. The control inputs must be held HIGH or LOW; they must not float.  
© 2011 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA3031 • Rev. 1.0.4  
4
DC Electrical Characteristics  
All typical values are at TA=25°C unless otherwise specified.  
TA=- 40°C to +85°C  
Symbol  
Parameter  
Condition  
VCC (V)  
Unit  
Min. Typ. Max.  
VIK  
VIH  
Clamp Diode Voltage  
IIN=-18 mA  
2.5  
-1.2  
V
V
Control Input Voltage,  
High SEL[1:0]  
2.5 to 4.5  
1.0  
Control Input Voltage,  
Low SEL[1:0]  
VIL  
IIN  
2.5 to 4.5  
4.5  
0.5  
V
Control Input Leakage,  
SEL[1:0]  
VSW=0 to 3.6 V,  
VCNTRL=0 to VCC  
-0.5  
-0.5  
-0.5  
0.5  
0.5  
0.5  
µA  
µA  
µA  
Off-State Leakage for Open  
MHL Data Paths  
VSW=1.65MHL  
IOZ(MHL)  
IOZ(USB)  
4.5  
3.45 V,SEL[1:0]=VCC  
Off-State Leakage for Open  
USB Data Paths  
V
SW=0 USB3.6 V,  
4.5  
SEL[1:0]=VCC  
V
SW=1.65MHL 3.45 V,  
On-State Leakage for  
ICL(MHL)  
4.5  
4.5  
-0.5  
0.5  
0.5  
µA  
µA  
SEL0=GND, SEL1=VCC, Other  
Side of Switch Float  
Closed MHL Data Paths(6)  
VSW=0 USB 3.6 V  
SEL[1:0]=GND or SEL1=GND,  
SEL0=VCC, Other Side of  
Switch Float  
On-State Leakage for  
ICL(USB)  
-0.5  
-0.5  
Closed USB Data Paths(6)  
Power-Off Leakage Current  
(All I/O Ports)  
IOFF  
VSW=0 V or 3.6 V, Figure 5  
0
0.5  
6.5  
µA  
VSW=0.4 V, ION=-8 mA  
SEL[1:0]=GND or SEL1=GND,  
SEL0=VCC, Figure 6  
HS Switch On Resistance  
(USB to D Path)  
RON(USB)  
2.5  
3.9  
5
Ω
VSW=VCC-1050 mV,  
HS Switch On Resistance  
(MHL to D Path)  
RON(MHL)  
RON(MHL)  
RON(USB)  
SEL0=GND, SEL1=VCC  
,
2.5  
2.5  
2.5  
2.5  
Ω
Ω
Ω
Ω
ION=-8 mA, Figure 6  
VSW=VCC-1050 mV,  
Difference in RON Between  
MHL Positive-Negative  
SEL0=GND, SEL1=VCC  
,
0.03  
0.22  
1
I
ON=-8 mA, Figure 6,  
VSW=0.4 V, ION=-8 mA,  
Difference in RON Between  
USB Positive-Negative  
SEL[1:0]=GND or SEL1=GND,  
SEL0=VCC Figure 6  
VSW=1.65 to 3.45 V,  
RONF(MHL) Flatness for RON MHL Path  
SEL0=GND, SEL1=VCC  
,
ION=-8 mA, Figure 6  
ICC  
Quiescent Current  
VCNTRL=0 or 4.5 V, IOUT=0  
VCNTRL= 1.65 V, IOUT=0  
VCNTRL= 2.5 V, IOUT=0  
4.5  
4.5  
4.5  
30  
18  
10  
µA  
µA  
Delta Increase in Quiescent  
Current per Control Pin  
ICCT  
Note:  
6. For this test, the data switch is closed with the respective switch pin floating.  
© 2011 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA3031 • Rev. 1.0.4  
5
AC Electrical Characteristics  
All typical values are for VCC=3.3 V and TA=25°C unless otherwise specified.  
TA=- 40°C to +85°C  
Min. Typ. Max.  
Symbol  
Parameter  
Condition  
VCC (V)  
Unit  
USB Turn-On Time,  
SEL[1:0] to Output  
RL=50 , CL=5 pF, VSW(USB)=0.8 V,  
tONUSB  
tOFFUSB  
tONMHL  
2.5 to 3.6  
2.5 to 3.6  
2.5 to 3.6  
445  
445  
445  
600  
600  
600  
600  
ns  
ns  
ns  
V
SW(MHL)=3.3 V, Figure 7, Figure 8  
RL=50 , CL=5 pF, VSW(USB)=0.8 V,  
SW(MHL)=3.3 V, Figure 7, Figure 8  
RL=50 , CL=5 pF, VSW(USB)=0.8 V,  
SW(MHL)=3.3 V, Figure 7, Figure 8  
RL=50 , CL=5 pF, VSW(USB)=0.8 V,  
SW(MHL)=3.3 V, Figure 7, Figure 8  
USB Turn-Off Time,  
SEL[1:0] to Output  
V
MHL Turn-On Time,  
SEL[1:0] to Output  
V
MHL Turn-Off Time,  
SEL[1:0] to Output  
Propagation Delay(7)  
tOFFMHL  
tPD  
2.5 to 3.6  
2.5 to 3.6  
2.5 to 3.6  
445  
0.25  
85  
ns  
ns  
ns  
V
CL=5 pF, RL=50 , Figure 7, Figure 9  
Break-Before-Make  
Time(7)  
RL=50 , CL=5 pF, VID=VMHL=3.3 V,  
VUSB=0.8 V, Figure 11  
tBBM  
VS=1 Vpk-pk, RL=50 , f=240 MHz,  
Figure 12  
OIRR(MHL)  
OIRR(USB)  
XtalkMHL  
XtalkUSB  
2.5 to 3.6  
2.5 to 3.6  
2.5 to 3.6  
2.5 to 3.6  
-41  
-36  
-41  
-37  
dB  
dB  
dB  
dB  
Off Isolation(7)  
VS=400 mVpk-pk, RL=50 ,  
f=240 MHz, Figure 12  
VS=1 Vpk-pk, RL=50 , f=240 MHz,  
Figure 13  
Non-Adjacent  
Channel(7) Crosstalk  
VS=400 mVpk-pk, RL=50 ,  
f=240 MHz, Figure 13  
VIN=1 Vpk-pk, MHL Path, Common  
Mode Voltage = VCC – 1.1 V,  
RL=50 , CL=0 pF, Figure 14  
1.87  
1.47  
Differential -3db  
Bandwidth(7)  
BW  
2.5 to 3.6  
GHz  
VIN=400 mVpk-pk, USB Path, Common  
Mode Voltage = 0.2 V, RL=50 ,  
CL=0 pF, Figure 14  
Note:  
7. Guaranteed by characterization.  
© 2011 Fairchild Semiconductor Corporation  
FSA3031 • Rev. 1.0.4  
www.fairchildsemi.com  
6
USB High-Speed AC Electrical Characteristics  
Typical values are at TA= -40ºC to +85ºC.  
Symbol  
Parameter  
Condition  
VCC(V)  
Typ. Unit  
Skew of Opposite Transitions of the  
Same Output(8)  
tSK(P)  
CL=5 pF, RL=50 , Figure 9  
3.0 to 3.6  
3.0 to 3.6  
7
ps  
ps  
RL=50 , CL=5 pF, tR=tF=500 ps  
(10-90%) at 480 Mbps, PN7  
tJ  
Total Jitter(8)  
18  
Note:  
8. Guaranteed by characterization.  
MHL AC Electrical Characteristics  
Typical values are at TA= -40ºC to +85ºC.  
Symbol  
Parameter  
Condition  
VCC(V)  
Typ. Unit  
Skew of Opposite Transitions of the  
Same Output(9)  
tSK(P)  
3.0 to 3.6  
3
ps  
ps  
RPU=50 Ω to VCC, CL=0 pF  
f=2.25 Gbps, PN7, RPU=50 Ω to  
VCC, CL=0 pF  
tJ  
Total Jitter(9)  
3.0 to 3.6  
23  
Note:  
9. Guaranteed by characterization.  
Capacitance  
Typical values are at TA= -40ºC to +85ºC.  
Symbol  
Parameter  
Control Pin Input Capacitance(10)  
Condition  
Typ.  
2.5  
Max.  
Unit  
pF  
CIN  
VCC=0 V, f=1 MHz  
CON(USB) USB Path On Capacitance(10)  
COFF(USB) USB Path Off Capacitance(10)  
CON(MHL) MHL Path On Capacitance(10)  
COFF(MHL) MHL Path Off Capacitance(10)  
VCC=3.3 V, f=240 MHz, Figure 15  
VCC=3.3 V, f=240 MHz, Figure 13  
VCC=3.3 V, f=240 MHz, Figure 15  
VCC=3.3 V, f=240 MHz, Figure 13  
6.75  
2.5  
pF  
pF  
4.6  
pF  
2.5  
pF  
Note:  
10. Guaranteed by characterization.  
© 2011 Fairchild Semiconductor Corporation  
FSA3031 • Rev. 1.0.4  
www.fairchildsemi.com  
7
Test Diagrams  
IDn(OFF)  
NC  
A
V
SW  
Select  
GND  
V
Sel= 0 orVcc  
**Each switch port is tested separately  
Figure 5. Off Leakage  
iguOResistance  
tRISE= 2.5ns  
tFALL = 2.5ns  
V
CC  
90%  
90%  
V
GND  
Input– V , V  
SEL1  
SEL  
V
CNTRL-HI  
CNTRL-HI  
10%  
10%  
90%  
GND  
V
OH  
90%  
Output- V  
OUT  
VOL  
tON  
tOFF  
Figure 7. AC Test Circuit Load  
Figure 8. Turn-On / Turn-Off Waveforms  
tRISE  
tFALL  
= 500ps  
= 500ps  
+400mV  
-400mV  
400mV  
90%  
0V  
90%  
50%  
50%  
Input  
0V  
10%  
10%  
tPLH  
tPHL  
VOH  
Output  
50%  
50%  
Output  
VOL  
tPHL  
tPLH  
Figure 9. Propagation Delay (tRtF – 500ps)  
Figure 10. Intra-Pair Skew Test tSK(P)  
© 2011 Fairchild Semiconductor Corporation  
FSA3031 • Rev. 1.0.4  
www.fairchildsemi.com  
8
Test Diagrams  
tRISE = 2.5ns  
Vcc  
HSD  
V
90%  
Vcc/2  
n
Dn  
C
Input -  
V
V
Sel  
SW1  
10%  
0V  
VOUT  
GND  
L
R
L
SW2  
VOUT  
GND  
0.9*Vout  
GND  
0.9*Vout  
R
S
tBBM  
V
Sel  
RL , R and CL are function of application  
GND  
S
environment (see AC Tables for specific values)  
CL includes test fixture and stray capacitance  
Figure 11. Break-Before-Make Interval Timing  
Figure 12. Channel Off Isolation (SDD21)  
Figure 13. Non-Adjacent Channel-to-Channel Crosstalk (SDD21)  
© 2011 Fairchild Semiconductor Corporation  
FSA3031 • Rev. 1.0.4  
www.fairchildsemi.com  
9
Test Diagrams  
RS  
VIN  
D+  
VS  
RT  
VOUT  
Control  
VNA  
VNA  
Source  
Return  
RS  
VIN  
D-  
VS  
RT  
VOUT  
VS, RS and RT are functions of the application environment (see AC/DC Tables for values).  
Figure 14. Insertion Loss (SDD21)  
HSD  
HSD  
n
Capacitance  
Meter  
n
S
V
S
V
Capacitance  
Meter  
= 0 or V  
cc  
Sel  
= 0 or V  
cc  
Sel  
HSD  
HSD  
n
n
Figure 15. Channel Off Capacitance  
Figure 16. Channel On Capacitance  
Note:  
11. HSDn refers to the high-speed data USB or MHL paths.  
© 2011 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA3031 • Rev. 1.0.4  
10  
Functional Description  
Insertion Loss  
One of the key advantages of using the FSA3031 in  
mobile digital video applications is the small amount of  
insertion loss experienced by the received signal as it  
passes through the switch.  
Typical Application  
Figure 19 shows utilizing the VBAT connection from the  
micro-USB connector. The 3M resistors are used to  
ensure, for manufacturing test via the micro-USB  
connector, that the FSA3031 configures for connectivity  
to the baseband or application processor.  
This results in minimal degradation of the received eye.  
One of the ways to measure the quality of the high data  
rate channels is using balanced ports and four-port  
differential S-parameter analysis, particularly SDD21.  
Bandwidth is measured using the S-parameter SDD21  
methodology. Figure 17 exhibits the 1.87 GHz (-3 db)  
BW of the MHL path, while Figure 18 exhibits the  
1.47 GHz (-3 db) BW of the USB paths.  
Figure 19. Typical Application  
Figure 17. MHL Path SDD21 Insertion Loss Curve  
Figure 18. USB Path SDD21 Insertion Loss Curve  
© 2011 Fairchild Semiconductor Corporation  
FSA3031 • Rev. 1.0.4  
www.fairchildsemi.com  
11  
Physical Dimensions  
(11X)  
0.563  
2.10  
1.80  
A
B
0.10 C  
0.588  
0.40  
2X  
1
1.80  
2.10  
PIN#1 IDENT  
0.10 C  
(12X)  
0.20  
TOP VIEW  
2X  
RECOMMENDED  
LAND PATTERN  
0.55 MAX.  
0.152  
0.10 C  
0.08 C  
0.45  
0.35  
0.10  
0.05  
0.00  
SEATING  
PLANE  
C
0.10  
0.10  
SIDE VIEW  
DETAIL A  
SCALE : 2X  
0.35  
(11X)  
NOTES:  
0.45  
3
6
A. PACKAGE DOES NOT FULLY CONFORM TO  
JEDEC STANDARD.  
0.40  
B. DIMENSIONS ARE IN MILLIMETERS.  
DETAIL A  
C. DIMENSIONS AND TOLERANCES PER  
ASME Y14.5M, 1994.  
1
PIN#1 IDENT  
D. LAND PATTERN RECOMMENDATION IS  
BASED ON FSC DESIGN ONLY.  
12  
9
0.25  
0.15  
(12X)  
BOTTOM VIEW  
0.10 C A B  
E. DRAWING FILENAME: MKT-UMLP12Arev4.  
0.05 C  
PACKAGE  
EDGE  
LEAD  
LEAD  
OPTION 2  
SCALE : 2X  
OPTION 1  
SCALE : 2X  
Figure 20. 12-Lead, Ultrathin Molded Leadless Package (UMLP)  
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FSA3031 • Rev. 1.0.4  
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12  
© 2011 Fairchild Semiconductor Corporation  
FSA3031 • Rev. 1.0.4  
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