FGH50N6S2D [ONSEMI]
600V，SMPS II IGBT;
| 型号： | FGH50N6S2D |
| 厂家： | 
ONSEMI |
| 描述： | 600V，SMPS II IGBT 局域网 栅 双极性晶体管 功率控制 |
| 文件： | 总11页 (文件大小：396K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IGBT - SMPS II Series
N-Channel with
Anti-Parallel Stealth Diode
600 V
FGH50N6S2D
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Description
The FGH50N6S2D is a Low Gate Charge, Low Plateau Voltage
SMPS II IGBT combining the fast switching speed of the SMPS
IGBTs along with lower gate charge, plateau voltage and avalanche
capability (UIS). These LGC devices shorten delay times, and reduce
the power requirement of the gate drive. These devices are ideally
suited for high voltage switched mode power supply applications
where low conduction loss, fast switching times and UIS capability are
essential. SMPS II LGC devices have been specially designed for:
C
G
E
E
• Power Factor Correction (PFC) Circuits
• Full Bridge Topologies
• Half Bridge Topologies
• Push−Pull Circuits
• Uninterruptible Power Supplies
• Zero Voltage and Zero Current Switching Circuits
C
G
Features
TO−247−3LD
CASE 340CK
• 100 kHz Operation at 390 V, 40 A
• 200 kHz Operation at 390 V, 25 A
• 600 V Switching SOA Capability
• Typical Fall Time
• Low Gate Charge
• Low Plateau Voltage
• UIS Rated
90 ns at T = 125°C
J
MARKING DIAGRAM
70 nC at V = 15 V
6.5 V Typical
480 mJ
GE
$Y&Z&3&K
50N6S2D
• Low Conduction Loss
• This is a Pb−Free Device
$Y
= ON Semiconductor Logo
&Z
&3
&K
= Assembly Plant Code
= Numeric Date Code
= Lot Code
50N6S2D
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2002
1
Publication Order Number:
November, 2020 − Rev. 1
FGH50N6S2D/D
FGH50N6S2D
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
C
Parameter
Symbol
Ratings
Unit
V
Collector to Emitter Breakdown Voltage
Collector Current Continuous
BV
I
600
CES
C
TC = 25°C
TC = 110°C
75
A
60
A
Collector Current Pulsed (Note 1)
Gate to Emitter Voltage Continuous
Gate to Emitter Voltage Pulsed
I
240
A
CM
V
GES
GEM
20
30
V
V
V
Switching Safe Operating Area at T = 150°C, Figure 2
SSOA
150 A at 600 V
480
J
Pulsed Avalanche Energy, I = 30 A, L = 1 mH, V = 50 V
E
AS
mJ
W
CE
DD
Power Dissipation Total
TC = 25°C
TC > 25°C
P
463
D
Power Dissipation Derating
3.7
W/°C
°C
Operating Junction Temperature Range
Storage Junction Temperature Range
T
−55 to +150
−55 to +150
J
T
STG
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Pulse width limited by maximum junction temperature.
PACKAGE MARKING AND ORDERING INFORMATION
Device Marking
Device
Package
Tape Width
Quantity
50N6S2D
FGH50N6S2D
TO−247
N/A
30
THERMAL CHARACTERISTICS
Characteristic
Symbol
Value
Unit
Thermal Resistance Junction−Case, IGBT
Thermal Resistance Junction−Case, Diode
R
R
0.27
1.1
°C/W
ꢀ
ꢀ
JC
JC
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
OFF STATE CHARACTERISTICS
Collector to Emitter Breakdown Voltage
BV
I
I
= 250 ꢁ A, V = 0 V,
600
−
−
−
−
−
−
V
CES
C
GE
Collector to Emitter Leakage Current
V
= 600 V
T = 25°C
250
2.8
250
ꢁ A
mA
nA
CES
CE
J
T = 125°C
J
−
Gate to Emitter Leakage Current
I
V
=
20 V
−
GES
GE
ON STATE CHARACTERISTICs
Collector to Emitter Saturation Voltage
V
I
= 30 A, V = 15 V
T = 25°C
−
−
−
1.9
1.7
2.2
2.7
2.2
2.6
V
V
V
CE(SAT)
C
GE
J
T = 125°C
J
Diode Forward Voltage
V
EC
I = 30 A
EC
DYNAMIC CHARACTERISTICS
Gate Charge
Q
I
= 30 A, V = 300 V
V
V
= 15 V
= 20 V
−
−
70
90
85
110
5.0
8.0
nC
nC
V
G(ON)
C
CE
GE
GE
Gate to Emitter Threshold Voltage
Gate to Emitter Plateau Voltage
V
I
I
= 250 ꢁ A, V = V
GE
3.5
−
4.3
6.5
GE(TH)
C
CE
V
= 30 A, V = 300 V
V
GEP
C
CE
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2
FGH50N6S2D
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
C
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS
Switching SOA
SSOA
T = 150°C, R = 3
ꢂ
ꢃ
V
=
1
5
V
,
150
−
−
A
J
G
GE
L = 100 ꢁ H, V = 600 V
CE
Current Turn−On Delay Time
Current Rise Time
t
IGBT and Diode at T = 25°C,
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
13
15
−
−
ns
ns
ns
ns
ꢁ J
ꢁ J
ꢁ J
ns
ns
ns
ns
ꢁ J
ꢁ J
ꢁ J
ns
ns
d(ON)I
J
I
= 30 A,
CE
t
rI
d(OFF)I
V
V
= 390 V,
= 15 V,
CE
GE
G
Current Turn−Off Delay Time
Current Fall Time
t
55
−
R
= 3 ꢂ ꢃ ,
L = 200 ꢁ H,
t
fI
50
−
Test Circuit − Figure 26
Turn−On Energy (Note 2)
Turn−On Energy (Note 2)
Turn−Off Energy Loss (Note 3)
Current Turn−On Delay Time
Current Rise Time
E
E
E
260
330
250
13
−
ON1
ON2
OFF
−
350
−
t
IGBT and Diode at T = 125°C,
J
d(ON)I
I
= 30 A,
CE
t
15
−
rI
d(OFF)I
V
V
= 390 V,
= 15 V,
CE
GE
Current Turn−Off Delay Time
Current Fall Time
t
92
150
100
−
R
= 3 ꢂ ꢃ ,
G
L = 200 ꢁ H,
t
fI
88
Test Circuit − Figure 26
Turn−On Energy (Note 2)
Turn−On Energy (Note 2)
Turn−Off Energy (Note 3)
Diode Reverse Recovery Time
E
E
E
260
490
575
50
ON1
ON2
OFF
600
850
55
42
t
rr
I
I
= 30 A, dI /dt = 200 A/ꢁ s
EC
EC
= 1 A, dI /dt = 200 A/ꢁ s
30
EC
EC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Values for two Turn−On loss conditions are shown for the convenience of the circuit designer. E
is the turn−on loss
ON1
of the IGBT only. E
is the turn−on loss when a typical diode is used in the test circuit and the diode is at the same TJ as the IGBT. The
ON2
diode type is specified in Figure 26.
3. Turn−Off Energy Loss (E
) is defined as the integral of the instantaneous power loss starting at the trailing edge of
OFF
the input pulse and ending at the point where the collector current equals zero (I = 0A). All devices were tested per
CE
JEDEC Standard No. 24−1 Method for Measurement of Power Device Turn−Off Switching Loss. This test method produces
the true total Turn−Off Energy Loss.
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3
FGH50N6S2D
TYPICAL PERFORMANCE CURVES (T = 25°C unless otherwise noted)
J
140
120
200
T = 150°C, R = 3 ꢂ, V = 15 V, L = 100 ꢁ H
J
G
GE
150
100
80
100
50
Package Limited
60
40
20
0
0
125
150
600 700
, Collector to Emitter Voltage (V)
50
75
100
25
200
300 400 500
0
100
V
T , Case Temperature (°C)
C
CE
Figure 2. Minimum Switching Safe Operating
Area
Figure 1. DC Collector Current vs. Case
Temperature
14
12
900
800
700
600
700
V
= 390 V, R = 3 ꢂ, T = 125°C
T
V
= 75°C
CE
G
J
C
= 15 V
GE
300
10
I
sc
8
6
100
f
f
= 0.05 / (t
+ t
ON2
)
MAX1
MAX2
C
d(OFF)I
C
d(ON)I
= (P − P ) / (E
+ E
)
D
OFF
500
400
300
200
P
= Conduction Dissipation
(Duty Factor = 50%)
4
2
R
= 0.27°C/W, See Notes
V
GE
= 10 V
ꢀ
JC
t
sc
T = 125°C, R = 3 ꢂ, L = 200 ꢁ H, V = 390 V
J
G
CE
10
0
9
10
V
11
12
13
14
15
16
10
30
60
1
, Gate to Emitter Voltage (V)
I
, Collector to Emitter Current (A)
GE
CE
Figure 4. Short Circuit Withstand Time
Figure 3. Operating Frequency vs. Collector
to Emitter Current
60
60
Duty Cycle < 0.5%, V = 10 V
Duty Cycle < 0.5%, V = 15 V
GE
GE
Pulse Duration = 250 ꢁ s
Pulse Duration = 250 ꢁ s
50
50
40
30
20
40
30
20
T = 25°C
J
T = 25°C
J
T = 150°C
J
T = 150°C
J
10
0
10
T = 125°C
J
T = 125°C
J
0
1.50 1.75 2.00 2.25
0.50 0.75 1.00 1.25
1.50 1.75 2.00 2.25
0.50 0.75 1.00 1.25
V
CE
, Collector to Emitter Voltage (V)
V
CE
, Collector to Emitter Voltage (V)
Figure 6. Collector to Emitter On−State
Figure 5. Collector to Emitter On−State
Voltage
Voltage
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4
FGH50N6S2D
TYPICAL PERFORMANCE CURVES (T = 25°C unless otherwise noted) (continued)
J
1400
2500
2250
R
= 3 ꢂ, L = 200 ꢁ H, V = 390 V
CE
G
R = 3 ꢂ, L = 200 ꢁ H, V = 390 V
G CE
1200
1000
T = 125°C, V = 10 V, V = 15 V
J
GE
GE
2000
1750
1500
1250
1000
750
T = 25°C, T = 125°C, V = 10 V
J
J
GE
800
600
400
200
0
500
T = 125°C,
GE
T = 25°C, V = 10 V,
J
J
GE
GE
250
0
T = 25°C
J
V
= 15 V
V
= 15 V
40
60
0
10
I
20
30
50
10
I
0
20
30
40
50
60
, Collector to Emitter Current (A)
, Collector to Emitter Current (A)
CE
CE
Figure 8. Turn−Off Energy Loss vs. Collector
Figure 7. Turn−On Energy Loss vs. Collector
to Emitter Current
to Emitter Current
25
70
60
50
R
= 3 ꢂ, L = 200 ꢁ H, V = 390 V
CE
R
= 3 ꢂ, L = 200 ꢁ H, V = 390 V
CE
G
G
20
15
10
5
T = 25°C, T = 125°C, V = 10 V
J
J
GE
T = 25°C, T = 125°C,
J
GE
J
V
= 10 V
40
30
20
T = 25°C, T = 125°C,
J
GE
J
V
= 15 V
10
0
T = 25°C, T = 125°C, V = 15 V
J
J
GE
0
60
0
10
I
20
30
40
50
60
0
10
I
20
30
40
50
, Collector to Emitter Current (A)
, Collector to Emitter Current (A)
CE
CE
Figure 10. Turn−On Rise Time vs. Collector
Figure 9. Turn−On Delay Time vs. Collector
to Emitter Current
to Emitter Current
100
90
125
100
75
R
= 3 ꢂ, L = 200 ꢁ H, V = 390 V
R
= 3 ꢂ, L = 200 ꢁ H, V = 390 V
CE
G
CE
G
80
V
GE
= 10 V, V = 15 V, T = 125°C
GE J
70
T = 125°C, V = 10 V, V = 15 V
J
GE
GE
60
50
40
50
25
T = 25°C, V = 10 V, V = 15 V
J
GE
GE
V
= 10 V, V = 15 V, T = 25°C
GE J
GE
40
50
60
0
10
I
20
30
60
10
20
30
40
50
0
, Collector to Emitter Current (A)
I
, Collector to Emitter Current (A)
CE
CE
Figure 12. Fall Time vs. Collector to Emitter
Current
Figure 11. Turn−Off Delay Time vs. Collector
to Emitter Current
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5
FGH50N6S2D
TYPICAL PERFORMANCE CURVES (T = 25°C unless otherwise noted) (continued)
J
250
225
16
Duty Cycle < 0.5%, V = 10 V
I
= 1 mA, R = 10
ꢂ
CE
G(REF)
L
Pulse Duration = 250 ꢁ s
14
12
10
8
200
175
150
V
CE
= 600 V
V
= 400 V
= 200 V
CE
125
100
75
T = 125°C
J
6
T = 25°C
J
T = −55°C
J
4
50
25
0
V
CE
2
0
5
6
10
7
8
9
4
10 20
30 40
50 60
70 80
0
V
GE
, Gate to Emitter Voltage (V)
Q , Gate Charge (nC)
G
Figure 14. Gate Charge
Figure 13. Transfer Characteristics
3.0
2.5
2.0
1.5
1.0
0.5
0
100
10
R
V
TOTAL
= 3 ꢂ, L = 200 ꢁ H, V = 390 V
T = 125°C, L = 200 ꢁ H, V = 390 V,
G
CE
J
V
CE
= 15 V
= 15 V
GE
GE
TOTAL
E
= E + E
ON2 OFF
E
= E + E
ON2 OFF
I
= 60 A
CE
I
= 60 A
CE
I
= 30 A
= 15 A
CE
I
= 30 A
= 15 A
CE
CE
1
I
I
CE
0.1
100
50
75
125
150
25
1
10
R , Gate Resistance (ꢂ)
1000
100
T , Case Temperature (°C)
C
G
Figure 16. Total Switching Loss vs. Gate
Resistance
Figure 15. Total Switching Loss vs. Case
Temperature
4.0
3.5
3.0
2.5
2.5
2.4
2.3
2.2
Frequency = 1 MHz
Duty Cycle < 0.5%
Pulse Duration = 250 ꢁ s
I
= 45 A
C
CE
IES
2.0
1.5
2.1
I
= 30 A
CE
2.0
1.9
1.8
1.7
1.0
0.5
0.0
C
OES
I
= 15 A
CE
C
RES
0
10 20 30 40 50 60 70 80 90 100
, Collector to Emitter Voltage (V)
6
7
8
V
9
10 11 12 13 14 15 16
V
CE
, Gate to Emitter Voltage (V)
GE
Figure 18. Collector to Emitter On−State
Figure 17. Capacitance vs. Collector to Emitter
Voltage
Voltage vs. Gate to Emitter Voltage
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FGH50N6S2D
TYPICAL PERFORMANCE CURVES (T = 25°C unless otherwise noted) (continued)
J
200
75
60
45
dI /dt = 200 A/ꢁ s, V = 390 V
Duty Cycle < 0.5%
EC
CE
175
150
Pulse Duration = 250 ꢁ s
°
125°C t
rr
°
125 C
125
100
°
125°C t
b
30
15
0
75
50
25
0
°
25°C t
rr
25°C t , t
a
b
°
25 C
125°C t
a
2
6
10
14
18
22
26
30
0
0.5
1.0
1.5
2.0
2.5
3.0 3.5
V
EC
, Forward Voltage (V)
I
, Forward Current (A)
EC
Figure 20. Recovery Times vs. Forward Current
Figure 19. Diode Forward Current vs. Forward
Voltage Drop
1200
150
°
V
CE
= 390 V
125 C, I = 30 A
I
= 30 A, V = 390 V
EC
EC
CE
1000
800
125
100
°
125 C, I = 30 A
EC
°
125 C t
b
600
400
200
75
50
25
0
°
°
125 C t
a
25 C, I = 30 A
EC
°
25 C t
a
°
25 C, I = 15 A
EC
°
25 C t
b
0
200
400
600
800
1000
1200
200
400
600
800
1000
1200
dI /dt, Rate of Changes of Current (A/ꢁ s)
EC
dI /dt, Rate of Changes of Current (A/ꢁ s)
EC
Figure 21. Recovery Times vs. Rate
of Change of Current
Figure 22. Stored Charge vs. Rate
of Change of Current
30
25
20
15
3.0
°
V
CE
= 390 V, T = 125 C
°
J
V
CE
= 390 V, T = 125 C
J
I
= 30 A
EC
2.5
2.0
I
= 30 A
EC
I
= 15 A
EC
I
= 15 A
EC
1.5
1.0
0.5
10
5
0
1200
200
400
600
800
1000
1200
200
400
600
800
1000
dI /dt, Current Rate of Change (A/ꢁ s)
EC
dI /dt, Current Rate of Change (A/ꢁ s)
EC
Figure 24. Maximum Reverse Recovery Current
vs. Rate of Change of Current
Figure 23. Reverse Recovery Softness Factor
vs. Rate of Change of Current
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FGH50N6S2D
TYPICAL PERFORMANCE CURVES (T = 25°C unless otherwise noted) (continued)
J
0
10
0.50
0.20
t
1
0.10
0.05
P
D
−1
10
10
t
2
0.02
0.01
Duty Factor, D = t /t
1
ꢀ
2
JC
Peak T = (P x Z
x R ) + T
ꢀ
J
D
JC
C
Single Pulse
−2
−4
−5
−3
−2
−1
0
1
10
10
10
10
10
10
10
t , Rectangular Pulse Duration (s)
1
Figure 25. IGBT Normalized Transient Thermal Impedance, Junction to Case
TEST CIRCUIT AND WAVEFORMS
FGH50N6S2D
Diode TA49392
90%
10%
V
GE
E
ON2
E
OFF
L = 200 ꢁ H
V
CE
90%
10%
R
= 3
ꢂ
G
I
+
CE
t
rI
t
d(OFF)I
V
DD
= 390 V
t
fI
FGH50N6S2D
−
t
d(ON)I
Figure 27. Switching Test Waveforms
Figure 26. Inductive Switching Test Circuit
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FGH50N6S2D
Handling Precautions for IGBTs
Operating Frequency Information
Insulated Gate Bipolar Transistors are susceptible to
gate−insulation damage by the electrostatic discharge of
energy through the devices. When handling these devices,
care should be exercised to assure that the static charge built
in the handler’s body capacitance is not discharged through
the device. With proper handling and application
procedures, however, IGBTs are currently being extensively
used in production by numerous equipment manufacturers
in military, industrial and consumer applications, with
virtually no damage problems due to electrostatic discharge.
IGBTs can be handled safely if the following basic
precautions are taken:
Operating frequency information for a typical device
(Figure 3) is presented as a guide for estimating device
performance for a specific application. Other typical
frequency vs collector current (I ) plots are possible using
CE
the information shown for a typical unit in Figures 5, 6, 7, 8,
9 and 11. The operating frequency plot (Figure 3) of a typical
device shows f
or f
; whichever is smaller at each
MAX1
MAX2
point. The information is based on measurements of a
typical device and is bounded by the maximum rated
junction temperature.
f
is defined by f
= 0.05/
I+ td
.
MAX1
MAX1
(td(OFF)
(ON)I)
Deadtime (the denominator) has been arbitrarily held to
1. Prior to assembly into a circuit, all leads should be
kept shorted together either by the use of metal
shorting springs or by the insertion into conductive
material such as “ECCOSORBDt LD26” or
equivalent.
10% of the on−state time for a 50% duty factor. Other
definitions are possible. t
and t
are defined in
d(OFF)I
d(ON)I
Figure 27. Device turn−off delay can establish an additional
frequency limiting condition for an application other than
T
. t
is important when controlling output ripple
JM d(OFF)I
2. When devices are removed by hand from their
carriers, the hand being used should be grounded
by any suitable means − for example, with a
metallic wristband.
under a lightly loaded condition.
is defined by f = (P − P )/(E
f
+ E
ON2
).
−
MAX2
MAX2
D
C
OFF
The allowable dissipation (P ) is defined by P = (T
D
D
JM
T )/R . The sum of device switching and conduction
C
ꢀ
J
C
3. Tips of soldering irons should be grounded.
4. Devices should never be inserted into or removed
from circuits with power on.
losses must not exceed P . A 50% duty factor was used
D
(Figure 3) and the conduction losses (P ) are approximated
C
by P = (V x I )/2.
C
CE
CE
5. Gate Voltage Rating − Never exceed the
E
and E
are defined in the switching waveforms
ON2
OFF
gate−voltage rating of V . Exceeding the rated
GEM
shown in Figure 27. E
is the integral of the instantaneous
ON2
V
GE
can result in permanent damage to the oxide
power loss (I x V ) during turn−on and E
is the
CE
CE
OFF
layer in the gate region.
integral of the instantaneous power loss (I x V ) during
CE CE
6. Gate Termination − The gates of these devices
are essentially capacitors. Circuits that leave the
gate open−circuited or floating should be avoided.
These conditions can result in turn−on of the
device due to voltage buildup on the input
capacitor due to leakage currents or pickup.
7. Gate Protection − These devices do not have an
internal monolithic Zener diode from gate to
emitter. If gate protection is required an external
Zener is recommended.
turn−off. All tail losses are included in the calculation for
; i.e., the collector current equals zero (I = 0)
E
OFF
CE
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9
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−247−3LD SHORT LEAD
CASE 340CK
ISSUE A
DATE 31 JAN 2019
P1
D2
A
E
P
A
A2
Q
E2
S
D1
D
E1
B
2
2
1
3
L1
A1
b4
L
c
(3X) b
(2X) b2
M
M
B A
0.25
MILLIMETERS
MIN NOM MAX
4.58 4.70 4.82
2.20 2.40 2.60
1.40 1.50 1.60
1.17 1.26 1.35
1.53 1.65 1.77
2.42 2.54 2.66
0.51 0.61 0.71
20.32 20.57 20.82
(2X) e
DIM
A
A1
A2
b
b2
b4
c
GENERIC
D
MARKING DIAGRAM*
D1 13.08
~
~
D2
E
0.51 0.93 1.35
15.37 15.62 15.87
AYWWZZ
XXXXXXX
XXXXXXX
E1 12.81
~
~
E2
e
L
4.96 5.08 5.20
5.56
15.75 16.00 16.25
3.69 3.81 3.93
3.51 3.58 3.65
XXXX = Specific Device Code
~
~
A
Y
= Assembly Location
= Year
WW = Work Week
ZZ = Assembly Lot Code
L1
P
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
P1 6.60 6.80 7.00
Q
S
5.34 5.46 5.58
5.34 5.46 5.58
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Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13851G
TO−247−3LD SHORT LEAD
PAGE 1 OF 1
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