FDPC3D5N025X9D [ONSEMI]
25V 对称双 N 沟道 PowerTrench® Power Clip MOSFET;
| 型号： | FDPC3D5N025X9D |
| 厂家： | 
ONSEMI |
| 描述： | 25V 对称双 N 沟道 PowerTrench® Power Clip MOSFET |
| 文件： | 总12页 (文件大小：603K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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October 2016
FDPC3D5N025X9D
PowerTrench® Power Clip
25V Symmetric Dual N-Channel MOSFET
Features
General Description
Q1: N-Channel
This device includes two specialized N-Channel MOSFETs in a
dual package. The switch node has been internally connected to
enable easy placement and routing of synchronous buck
converters. The control MOSFET (Q2) and synchronous
(Q1) have been designed to provide optimal power efficiency.
Max rDS(on) = 3.01 mΩ at VGS = 10 V, ID = 18 A
Max rDS(on) = 3.67 mΩ at VGS = 4.5 V, ID = 16 A
Q2: N-Channel
Max rDS(on) = 3.01 mΩ at VGS = 10 V, ID = 18 A
Applications
Max rDS(on) = 3.67 mΩ at VGS = 4.5 V, ID = 16 A
Computing
Low Inductance Packaging Shortens Rise/Fall Times, Result-
Communications
ing in Lower Switching Losses
General Purpose Point of Load
MOSFET Integration Enables Optimum Layout for Lower Cir-
cuit Inductance and Reduced Switch Node Ringing
RoHS Compliant
PIN1
GND
SW
SW
GND
SW
SW
GND
V+
LSG
V+
LSG
V+
SW
SW
PIN1
V+
HSG
V+
HSG
Bottom
Pin
Top
Power Clip 33 Symmetric
Description
Pin
Name
Name
Description
Pin
Name
Description
Switching Node,
Low Side Drain
1,11,12 GND(LSS) Low Side Source 3,4,5,6 V+(HSD) High Side Drain
LSG Low Side Gate HSG High Side Gate
8,9,10 SW
2
7
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted.
Symbol
VDS
VGS
Parameter
Q1
25
Q2
25
Units
Drain to Source Voltage
Gate to Source Voltage
V
V
±12
74
±12
Drain Current
-Continuous
TC = 25 °C
TC = 100 °C
TA = 25 °C
TA = 25 °C
(Note5)
(Note5)
74
-Continuous
-Continuous
-Pulsed
47
18Note1a
47
18Note1b
ID
A
(Note 4)
(Note 3)
349
349
EAS
Single Pulse Avalanche Energy
96
96
mJ
W
Power Dissipation for Single Operation
Power Dissipation for Single Operation
TC = 25 °C
TA = 25 °C
26
1.8Note1a
26
1.8Note1b
PD
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RθJC
RθJA
RθJA
Thermal Resistance, Junction to Case
4.8
4.8
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
70Note1a
135Note1c
70Note1b
135Note1d
°C/W
©2016 Fairchild Semiconductor Corporation
FDPC3D5N025X9D Rev.1.0
1
www.fairchildsemi.com
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
Tape Width
Quantity
FDPCN025X9D
FDPC3D5N025X9D
Power Clip 33 Symm
13 ”
12 mm
3000 units
Electrical Characteristics TJ = 25 °C unless otherwise noted.
Symbol
Parameter
Test Conditions
Type Min.
Typ.
Max.
Units
Off Characteristics
I
I
D = 250 μA, VGS = 0 V
D = 250 μA, VGS = 0 V
Q1
Q2
25
25
BVDSS
Drain to Source Breakdown Voltage
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
D = 250 μA, referenced to 25 °C
Q1
Q2
23
23
mV/°C
I
V
V
DS = 20 V, VGS = 0 V
DS = 20 V, VGS = 0 V
Q1
Q2
1
1
μA
μA
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current,
Forward
VGS = 12 V/-8 V, VDS= 0 V
V
Q1
Q2
±100
±100
nA
nA
GS = 12 V/-8 V, VDS= 0 V
On Characteristics
V
V
GS = VDS, ID = 250 μA
GS = VDS, ID = 250 μA
Q1
Q2
1.0
1.0
1.5
1.5
3.0
3.0
VGS(th)
Gate to Source Threshold Voltage
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
D = 250 μA, referenced to 25 °C
Q1
Q2
-4
-4
mV/°C
I
V
V
V
GS = 10V, ID = 18 A
GS = 4.5 V, ID = 16 A
GS = 10 V, ID = 18 A,TJ =125 °C
2.0
2.4
2.87
3.01
3.67
4.32
Q1
Q2
rDS(on)
Drain to Source On Resistance
mΩ
V
V
V
GS = 10V, ID = 18 A
GS = 4.5 V, ID = 16 A
GS = 10 V, ID = 18 A ,TJ =125 °C
2.5
2.9
3.6
3.01
3.67
4.33
V
V
DS = 5 V, ID = 18 A
DS = 5 V, ID = 18 A
Q1
Q2
133
124
gFS
Forward Transconductance
S
Dynamic Characteristics
Q1
Q2
2385
2385
3340
3340
Ciss
Coss
Crss
Rg
Input Capacitance
pF
pF
pF
Ω
Q1:
V
DS = 13 V, VGS = 0 V, f = 1 MHZ
Q1
Q2
612
612
860
860
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Q2:
Q1
Q2
78
78
130
130
VDS = 13 V, VGS = 0 V, f = 1 MHZ
Q1
Q2
0.1
0.1
0.6
0.6
1.8
1.8
Switching Characteristics
Q1
Q2
10
10
20
20
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
ns
ns
Q1:
Q1
Q2
3
3
10
10
V
DD = 13V, ID = 18 A, RGEN = 6 Ω
Q1
Q2
29
29
46
46
Q2:
Turn-Off Delay Time
Fall Time
ns
VDD = 13 V, ID = 18 A, RGEN = 6 Ω
Q1
Q2
3
3
10
10
ns
Q1
Q2
36
36
51
51
Qg
Total Gate Charge
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
VGS = 0 V to 10 V
Q1
nC
nC
nC
nC
Q1
Q2
17
17
24
24
V
DD = 13 V, ID
Qg
VGS = 0 V to 4.5 V
= 18 A
Q2
Q1
Q2
5.3
5.3
Qgs
Qgd
VDD = 13 V, ID
= 18 A
Q1
Q2
3.9
3.9
©2016 Fairchild Semiconductor Corporation
FDPC3D5N025X9D Rev.1.0
2
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted.
Symbol
Parameter
Test Conditions
Type Min.
Typ.
Max. Units
Drain-Source Diode Characteristics
V
V
GS = 0 V, IS = 18 A
GS = 0 V, IS = 18 A
(Note 2) Q1
(Note 2) Q2
0.8
0.8
1.2
V
VSD
IS
IS,Pulse
trr
Source to Drain Diode Forward Voltage
Diode continuous forward current
Diode pulse current
1.2
Q1
Q2
74
74
A
A
TC = 25 °C
Q1
Q2
349
349
Q1
Q2
35
35
56
ns
56
Q1
Reverse Recovery Time
IF = 18 A, di/dt = 100 A/μs
Q2
IF = 18 A, di/dt = 100 A/μs
Q1
Q2
19
19
35
nC
35
Qrr
Reverse Recovery Charge
Notes:
2
1.R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is determined by the user's board design.
θJA
θCA
b. 70 °C/W when mounted on
a 1 in pad of 2 oz copper
a. 70 °C/W when mounted on
a 1 in pad of 2 oz copper
2
2
d. 135 °C/W when mounted on
minimum pad of 2 oz copper
a
c. 135 °C/W when mounted on a
minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
o
3. Q1 :E of 96 mJ is based on starting T = 25 C; N-ch: L = 3 mH, I = 8 A, V = 25 V, V = 10 V. 100% test at L= 0.1 mH, I = 26 A.
AS
J
AS
DD
GS
AS
o
Q2: E of 96 mJ is based on starting T = 25 C; N-ch: L = 3 mH, I = 8 A, V = 25 V, V = 10 V. 100% test at L= 0.1 mH, I = 26 A.
AS
J
AS
DD
GS
AS
4. Pulse Id refers to Figure.11 & Figure. 26 Forward Bias Safe Operation Area.
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design.
©2016 Fairchild Semiconductor Corporation
FDPC3D5N025X9D Rev.1.0
3
www.fairchildsemi.com
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted.
100
75
50
25
0
4
3
2
1
0
VGS = 10 V
VGS = 4.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 4 V
VGS = 3.5 V
VGS = 3 V
VGS = 3 V
VGS = 3.5 V
VGS = 10 V
VGS = 4 V
VGS = 4.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0.00
0.25
0.50
0.75
0
25
50
75
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
Figure2. N o r m a l i z e d O n - R e s i s t a n c e
vs. Drain Current and Gate Voltage
1.6
15
10
5
ID = 18 A
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
VGS = 10 V
ID = 18 A
TJ = 125 o
C
TJ = 25 o
C
0
-75 -50 -25
0
25 50 75 100 125 150
2
3
4
5
6
7
8
9
10
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs. Junction Temperature
Figure4. On-Resistance vs. Gate to
Source Voltage
100
100
VGS = 0 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
10
1
75
50
25
0
VDS = 5 V
TJ = 150 o
C
TJ = 150 o
C
TJ = 25 o
C
0.1
TJ = 25 o
C
TJ = -55 o
C
0.01
TJ = -55 o
C
0.001
1
2
3
4
5
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode
Forward Voltage vs. Source Current
©2016 Fairchild Semiconductor Corporation
FDPC3D5N025X9D Rev.1.0
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www.fairchildsemi.com
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted.
10
8
10000
1000
100
ID = 18 A
Ciss
VDD = 10 V
VDD = 13 V
Coss
6
VDD = 15 V
4
Crss
2
f = 1 MHz
GS = 0 V
V
0
10
0
8
16
24
32
40
0.1
1
10
25
150
1
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s . D r a i n
to Source Voltage
80
60
40
20
0
50
TJ = 25 o
C
VGS = 10 V
10
TJ = 100 o
C
TJ = 125 o
C
VGS = 4.5 V
RθJC = 4.8 oC/W
1
0.001
0.01
0.1
1
10
100
25
50
75
100
125
TC, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure9. U n c l a m p e d I n d u c t i v e
Switching Capability
Figure10. Maximum Continuous Drain
Current vs. Case Temperature
500
10000
SINGLE PULSE
RθJC = 4.8 oC/W
C = 25 oC
100
10
10 μs
T
1000
100
10
100 μs
1 ms
THIS AREA IS
LIMITED BY rDS(on)
1
10 ms
100 ms
SINGLE PULSE
TJ = MAX RATED
RθJC = 4.8 oC/W
C = 25 oC
0.1
0.01
CURVE BENT TO
MEASURED DATA
T
10-5
10-4
10-3
t, PULSE WIDTH (sec)
10-2
10-1
0.01
0.1
1
10
100
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure11. Forward Bias Safe
Operating Area
Figure12. Single Pulse Maximum Power
Dissipation
©2016 Fairchild Semiconductor Corporation
FDPC3D5N025X9D Rev.1.0
5
www.fairchildsemi.com
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted.
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
P
0.05
0.02
0.01
DM
t
1
t
2
NOTES:
(t) = r(t) x R
0.01
0.001
Z
θJC
θJC
SINGLE PULSE
o
R
= 4.8 C/W
θJC
Peak T = P
x Z (t) + T
J
DM
θJC C
Duty Cycle, D = t / t
1
2
10-5
10-4
10-3
10-2
10-1
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Case Transient Thermal Response Curve
100000
10000
1000
100
SINGLE PULSE
RθJA = 135 oC/W
T
A = 25 o
C
10
1
0.1
10-6
10-5
10-4
10-3
10-2
10-1
1
10
100
1000
t, PULSE WIDTH (sec)
Figure 14. Single Pulse Maximum Power Dissipation
2
1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
10-1
10-2
10-3
10-4
10-5
P
DM
0.1
0.05
0.02
0.01
t
1
t
2
NOTES:
Z
(t) = r(t) x R
θJA
θJA
o
R
= 135 C/W
θJA
Peak T = P
Duty Cycle, D = t / t
x Z (t) + T
J
DM
θJA A
SINGLE PULSE
1
2
10-6
10-5
10-4
10-3
10-2
10-1
1
100
10
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 15. Junction-to-Ambient Transient Thermal Response Curve
©2016 Fairchild Semiconductor Corporation
FDPC3D5N025X9D Rev.1.0
6
www.fairchildsemi.com
Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted.
100
75
50
25
0
4
3
2
1
0
VGS = 10 V
VGS = 4.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 4 V
VGS = 3.5 V
VGS = 3 V
VGS = 3 V
VGS = 3.5 V
VGS = 10 V
VGS = 4 V
VGS = 4.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0.00
0.25
0.50
0.75
0
25
50
75
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 16. On- Region Characteristics
Figure 17. Normalized on-Resistance vs. Drain
Current and Gate Voltage
15
1.6
ID = 18 A
GS = 10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
V
ID = 18 A
10
5
TJ = 125 o
C
TJ = 25 o
C
0
2
3
4
5
6
7
8
9
10
-75 -50 -25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 19. On-Resistance vs. Gate to
Source Voltage
Figure 18. Normalized On-Resistance
vs. Junction Temperature
100
100
VGS = 0 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
10
1
75
50
25
0
VDS = 5 V
TJ = 150 o
C
TJ = 150 o
C
TJ = 25 o
C
0.1
TJ = 25 o
C
TJ = -55 o
C
0.01
TJ = -55 o
C
0.001
1
2
3
4
5
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 20. Transfer Characteristics
Figure 21. Source to Drain Diode
Forward Voltage vs. Source Current
©2016 Fairchild Semiconductor Corporation
FDPC3D5N025X9D Rev.1.0
7
www.fairchildsemi.com
Typical Characteristics (Q2 N-Channel) TJ = 25°C unless otherwise noted.
10000
1000
100
10
8
ID = 18 A
Ciss
VDD = 10 V
VDD = 13 V
Coss
6
VDD = 15 V
4
Crss
2
f = 1 MHz
VGS = 0 V
10
0
0.1
1
10
25
150
1
0
8
16
24
32
40
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 23. Capacitance vs. Drain
to Source Voltage
Figure 22. Gate Charge Characteristics
80
60
40
20
0
50
10
TJ = 25 o
C
VGS = 10 V
TJ = 100 o
C
TJ = 125 o
C
VGS = 4.5 V
R
θJC = 4.8 oC/W
1
0.001
0.01
0.1
1
10
100
25
50
75
100
125
TC, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure 24. Unclamped Inductive
Switching Capability
F ig ure 25 . Ma ximum C on tin uo us D rain
Current vs. Case Temperature
500
100
10000
1000
100
SINGLE PULSE
RθJC = 4.8 oC/W
C = 25 oC
10 μs
T
10
1
100 μs
1 ms
THIS AREA IS
LIMITED BY rDS(on)
10 ms
100 ms
SINGLE PULSE
TJ = MAX RATED
RθJC = 4.8 oC/W
TC = 25 oC
0.1
CURVE BENT TO
MEASURED DATA
0.01
10
10-5
10-4
10-3
t, PULSE WIDTH (sec)
10-2
10-1
0.01
0.1
1
10
100
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 26. Forward Bias Safe
Operating Area
Figure 27. Single Pulse Maximum Power
Dissipation
©2016 Fairchild Semiconductor Corporation
FDPC3D5N025X9D Rev.1.0
8
www.fairchildsemi.com
Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted.
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
P
DM
0.05
0.02
0.01
t
1
t
2
NOTES:
(t) = r(t) x R
0.01
0.001
Z
θJC
θJC
o
R
= 4.8 C/W
SINGLE PULSE
θJC
Peak T = P
x Z (t) + T
θJC C
J
DM
Duty Cycle, D = t / t
1
2
10-5
10-4
10-3
10-2
10-1
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 28. Junction-to-Case Transient Thermal Response Curve
100000
10000
1000
100
SINGLE PULSE
θJA = 135 oC/W
TA = 25 o
R
C
10
1
0.1
10-6
10-5
10-4
10-3
10-2
10-1
1
10
100
1000
t, PULSE WIDTH (sec)
Figure 29. Single Pulse Maximum Power Dissipation
2
1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
10-1
10-2
10-3
10-4
10-5
0.1
P
DM
0.05
0.02
0.01
t
1
t
2
NOTES:
Z
R
(t) = r(t) x R
θJA
θJA
o
= 135 C/W
θJA
Peak T = P
x Z (t) + T
J
DM
θJA A
Duty Cycle, D = t / t
SINGLE PULSE
1
2
10-6
10-5
10-4
10-3
10-2
t, RECTANGULAR PULSE DURATION (sec)
10-1
1
10
100
1000
Figure 30. Junction-to-Ambient Transient Thermal Response Curve
©2016 Fairchild Semiconductor Corporation
FDPC3D5N025X9D Rev.1.0
9
www.fairchildsemi.com
3.30
B
0.10 B
2X
A
3
4
2
1
C.L.
10
7
1.800
0.300
11
C.L.
12
6
5
1.060
0.725
5
6
12
11
3.30
0.000
0.810
KEEP OUT AREA
1.060
1.414
1.800
1
4
0.10
A
7
8
9
10
2X
PIN#1
0.650
INDICATOR
0.420
SCALE: 1:1
SCALE 1:1
C.L.
0.650
SEE DETAIL "A"
0.10 C
0.05
0.00
0.80
0.70
0.05 C
C
0.25
0.15
SCALE: 1:1
SEATING
PLANE
SCALE: 2:1
NOTES: UNLESS OTHERWISE SPECIFIED
A) DRAWING DOES NOT FULLY CONFORM TO
JEDEC REGISTRATION MO-220, VARIATION
WEEC-1
1
2
3
4
0.200±0.05
0.540±0.05
(5X)
5
12
0.675±0.05
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS
OR MOLD FLASH. MOLD FLASH OR
BURRS DOES NOT EXCEED 0.10MM.
D) DRAWING FILE NAME: MKT-PQFN12A_REV1
3.300±0.05 0.000
11
0.760±0.05
6
1.364±0.05
0.540±0.05
10
9
8
7
0.320±0.05
1.620
3.300±0.05
SCALE: 1:1
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