FDMS007N08LC [ONSEMI]
功率 MOSFET 80V，单 N 沟道，84A，6.7mΩ，采用 Power 56 封装。;
| 型号： | FDMS007N08LC |
| 厂家： | 
ONSEMI |
| 描述： | 功率 MOSFET 80V，单 N 沟道，84A，6.7mΩ，采用 Power 56 封装。 |
| 文件： | 总8页 (文件大小：526K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FDMS007N08LC
N-Channel Shielded Gate
POWERTRENCH) MOSFET
80 V, 84 A, 6.7 mW
Description
www.onsemi.com
This N−Channel MV MOSFET is produced using
ON Semiconductor’s advanced POWERTRENCH process that
incorporates Shielded Gate technology. This process has been
optimized to minimize on−state resistance and yet maintain superior
switching performance with best in class soft body diode.
V
r
MAX
I
D MAX
DS
DS(on)
80 V
84 A
6.7 mW @ 10 V
Features
N−Channel
• Shielded Gate MOSFET Technology
• Max r
• Max r
= 6.7 mW at V = 10 V, I = 21 A
GS D
DS(on)
D
D
D
D
5
6
7
8
4
3
2
1
G
S
S
S
= 9.9 mW at V = 4.5 V, I = 17 A
DS(on)
GS
D
• 50% Lower Q than Other MOSFET Suppliers
rr
• Lowers Switching Noise/EMI
• MSL1 Robust Package Design
• 100% UIL Tested
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
D
D
D
D
Typical Applications
• Primary DC−DC MOSFET
• Synchronous Rectifier in DC−DC and AC−DC
• Motor Drive
G
S
S
S
Pin 1
Bottom
Top
• Solar
PQFN8 5y6, 1.27P
(Power 56)
CASE 483AE
MARKING DIAGRAM
$Y&Z&3&K
FDMS
007N08LC
$Y
&Z
&3
&K
= ON Semiconductor Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
FDMS007N08LC
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
April, 2018 − Rev. 1
FDMS007N08LC/D
FDMS007N08LC
MOSFET MAXIMUM RATINGS (T = 25°C, Unless otherwise specified)
A
Symbol
Parameter
Ratings
Unit
V
V
80
20
Drain to Source Voltage
Gate to Source Voltage
DS
V
A
V
GS
I
84
Drain Current
− Continuous
T
T
= 25°C (Note 5)
= 100°C (Note 5)
D
C
53
− Continuous
− Continuous
C
14
T = 25°C (Note 1a)
A
345
− Pulsed (Note 4)
mJ
W
E
181.5
92.6
2.5
Single Pulse Avalanche Energy (Note 3)
Power Dissipation
AS
P
T
= 25°C
D
C
Power Dissipation
T = 25°C (Note 1a)
A
°C
T , T
−55 to +150
Operating and Storage Junction Temperature Range
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Symbol
Parameter
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient (Note 1a)
Ratings
1.35
Unit
°C/W
R
q
JC
R
50
q
JA
PACKAGE MARKING AND ORDERING INFORMATION
†
Device Marking
Device
Package
Reel Size
Tape Width
Shipping (Qty / Packing)
FDMS007N08LC
FDMS007N08LC
PQFN8 5×6
(Power 56)
(Pb−Free/Halogen Free)
13″
12 mm
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= 250 mA, V = 0 V
80
−
−
−
V
DSS
D
GS
Breakdown Voltage
Temperature Coefficient
= 250 mA, referenced to 25°C
−
32
mV/°C
DBVDSS
DTJ
D
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
V
= 64 V, V = 0 V
−
−
−
−
1
mA
mA
DSS
GSS
DS
GS
I
=
20 V, V = 0 V
100
GS
DS
ON CHARACTERISTICS
V
Gate to Source Threshold Voltage
V
I
= V , I = 120 mA
1.0
1.4
2.5
V
GS(th)
GS
DS
D
Gate to Source Threshold Voltage
Temperature Coefficient
= 120 mA, referenced to 25°C
−
−5.6
−
mV/°C
DVGS(th)
DTJ
D
r
Static Drain to Source On Resistance
Forward Transconductance
V
GS
V
GS
V
GS
V
DD
= 10 V, I = 21 A
−
−
−
−
4.9
6.7
8.5
84
6.7
9.9
11.6
−
mW
DS(on)
D
= 4.5 V, I = 17 A
D
= 10 V, I = 21 A, T = 125°C
D
J
g
FS
= 5 V, I = 21 A
S
D
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2
FDMS007N08LC
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
DS
= 40 V, V = 0 V, f = 1 MHz
−
−
2227
520
27
3100
760
40
pF
pF
pF
W
iss
GS
C
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
oss
C
−
rss
R
0.1
0.4
0.8
G
SWITCHING CHARACTERISTICS
t
Turn−on Delay Time
Rise Time
V
= 40 V, I = 21 A, VGS = 10 V,
GEN
−
−
−
−
−
−
−
−
−
−
10
3
21
10
61
16
46
22
−
ns
d(on)
DD
D
R
= 6 W
t
r
t
Turn−off Delay Time
Fall Time
38
8
d(off)
t
f
Q
Q
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain ”Miller” Charge
Output Charge
V
GS
V
GS
V
DD
V
DD
V
DD
V
DS
= 0V to 10 V, V = 40 V, I = 21 A
33
16
5
nC
nC
nC
nC
nC
nC
g
g
DD
D
= 0V to 4.5 V, V = 40 V, I = 21 A
DD
D
Q
= 40 V, I = 21 A
D
gs
gd
Q
= 40 V, I = 21 A
4
−
D
Q
= 40 V, V = 0 V
30
35
−
oss
GS
Q
Total Gate Charge Sync
= 0 V, I = 21 A
−
sync
D
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source to Drain Diode Forward Voltage
V
V
= 0 V, I = 2.1 A (Note 2)
−
−
−
−
−
−
0.7
0.8
18
24
13
58
1.2
1.3
32
28
23
92
V
V
SD
GS
S
= 0 V, I = 21 A (Note 2)
GS
S
t
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Time
Reverse Recovery Charge
I = 10 A, di/dt = 300 A/ms
F
ns
nC
ns
nC
rr
Q
rr
t
I = 10 A, di/dt = 1000 A/ms
F
rr
Q
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
NOTES:
2
1. R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 × 1.5 in. board of FR−4 material. R
is determined
CA
q
q
JA
by the user’s board design.
a) 50°C/W when mounted on
b) 125°C/W when mounted on
a minimum pad of 2 oz copper.
2
a 1 in pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. E of 181 mJ is based on starting T = 25_C; L = 3 mH, I = 11 A, V = 80 V, V = 10 V. 100% tested at L = 0.1 mH, I = 35 A.
AS
J
AS
DD
GS
AS
4. Pulsed I please refer to Fig. 11 SOA graph for more details.
D
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by
thermal & electro−mechanical application board design.
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3
FDMS007N08LC
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
200
150
100
50
5
VGS = 10 V
V
GS = 8 V
GS = 6 V
VGS = 4.5 V
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
VGS = 3 V
4
3
2
1
0
VGS = 3.5 V
VGS = 3.5 V
VGS = 4.5 V
VGS = 3 V
VGS = 10 V
VGS = 8 V
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
VGS = 6 V
0
0
50
100
150
200
0
1
2
3
4
5
ID, DRAIN CURRENT (A)
V
DS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On Region Characteristics
Figure 2. Normalized On−Resistance
vs. Drain Current and Gate Voltage
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
50
40
PULSE DURATION = 80ms
DUTY CYCLE = 0.5% MAX
ID = 21 A
VGS= 10 V
ID = 20 A
30
20
10
0
TJ = 125 o
C
TJ = 25 o
C
−75 −50 −25
0
25 50 75 100 125 150
1
2
3
4
5
6
7
8
9
10
TJ, JUNCTION TEMPERATURE (oC)
V
GS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs. Junction Temperature
Figure 4. On-Resistance
vs. Gate to Source Voltage
200
150
100
50
200
100
PULSE DURATION = 80ms
DUTY CYCLE = 0.5% MAX
VDS = 5 V
VGS = 0 V
10
1
TJ = 150 o
C
TJ = 25 o
C
0.1
TJ = 150 o
C
TJ = −55oC
T
J = 25 o
J = −55oC
C
0.01
T
0
0.001
0.0
0.2
0.4
0.6
0.8
1.0
1.2
0
1
2
3
4
5
6
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode
Forward Voltage vs. Source Current
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4
FDMS007N08LC
TYPICAL CHARACTERISTICS (continued)
10
8
10000
1000
ID = 21 A
Ciss
VDD = 30 V
Coss
6
VDD = 40 V
100
10
1
Crss
4
VDD = 50 V
2
f = 1 MHz
GS = 0 V
V
0
0
10
20
30
40
0.1
1
10
80
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance
vs. Drain to Source Voltage
100
10
1
90
72
54
36
18
0
R
qJC = 1.35 oC/W
V
GS = 10 V
TJ = 25 o
C
TJ = 100 o
C
VGS = 4.5 V
TJ = 125 o
C
0.001
0.01
0.1
1
10
100
25
50
75
100
125
150
TC, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure 10. Maximum Continuous Drain
Current vs. Case Temperature
Figure 9. Unclamped Inductive
Switching Capability
500
100
100000
10000
1000
100
SINGLE PULSE
qJC = 1.35oC/W
R
10 ms
T
C = 25 oC
10
1
THIS AREA IS
LIMITED BY rDS(on)
100 ms
SINGLE PULSE
TJ = MAX RATED
1 ms
R
qJC = 1.35oC/W
C = 25 oC
10 ms
100 ms/DC
CURVE BENT TO
MEASURED DATA
T
0.1
10
10−5
10−4
10−3
t, PULSE WIDTH (sec)
10−2
10−1
1
0.1
1
10
100 500
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe Operating Area
Figure 12. Single Pulse Maximum
Power Dissipation
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5
FDMS007N08LC
TYPICAL CHARACTERISTICS (continued)
2
1
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
0.1
P
DM
0.1
0.01
0.05
0.02
0.01
t
1
t
2
NOTES:
SINGLE PULSE
Z
R
(t) = r(t) x R
o
qJC
qJC
= 1.35 C/W
qJC
Peak T = P
x Z (t) + T
J
DM
qJC C
Duty Cycle, D = t / t
1
2
0.001
10−5
10−4
10−3
10−2
10−1
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction−to−Case Transient Thermal Response Curve
POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United
States and/or other countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PQFN8 5X6, 1.27P
CASE 483AE
ISSUE C
DATE 21 JAN 2022
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13655G
PQFN8 5X6, 1.27P
PAGE 1 OF 1
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