FDFMA3N109 [ONSEMI]

30V Integrated N-Channel PowerTrench®MOSFET and Schottky Diode;
FDFMA3N109
型号: FDFMA3N109
厂家: ONSEMI    ONSEMI
描述:

30V Integrated N-Channel PowerTrench®MOSFET and Schottky Diode

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July 2014  
FDFMA3N109  
Integrated N-Channel PowerTrench® MOSFET and Schottky Diode  
General Description  
Features  
MOSFET:  
This device is designed specifically as a single package  
solution for a boost topology in cellular handset and  
other ultra-portable applications. It features a MOSFET  
with low input capacitance, total gate charge and on-  
state resistance, and an independently connected  
schottky diode with low forward voltage and reverse  
leakage current to maximize boost efficiency.  
2.9 A, 30 V RDS(ON) = 123 m@ VGS = 4.5 V  
RDS(ON) = 140 m@ VGS = 3.0 V  
= 163 m@ VGS = 2.5 V  
RDS(ON)  
Schottky:  
VF < 0.46 V @ 500mA  
Low profile – 0.8 mm maximum – in the new package  
MicroFET 2x2 mm  
The MicroFET 2x2 package offers exceptional thermal  
performance for its physical size and is well suited to  
switching and linear mode applications.  
)
HBM ESD protection level = 1.8kV typical (Note 3  
RoHS Compliant  
PIN 1  
A
NC  
D
1
2
3
6
5
4
A
K
K
D
NC  
D
G
S
K
G
S
MicroFET 2x2  
Absolute Maximum Ratings TA=25oC unless otherwise noted  
Symbol  
Parameter  
Ratings  
Units  
VDS  
VGS  
ID  
Drain-Source Voltage  
Gate-Source Voltage  
30  
V
V
±12  
2.9  
Drain Current – Continuous (TC = 25°C, VGS = 4.5V)  
– Continuous (TC = 25°C, VGS = 2.5V)  
– Pulsed  
2.7  
A
10  
PD  
Power Dissipation for Single Operation  
Power Dissipation for Single Operation  
Operating and Storage Temperature  
Schottky Repetitive Peak Reverse Voltage  
Schottky Average Forward Current  
(Note 1a)  
(Note 1b)  
1.5  
W
0.65  
TJ, TSTG  
VRRM  
IO  
–55 to +150  
°C  
V
28  
1
A
Thermal Characteristics  
Thermal Resistance, Junction-to-Ambient  
(Note 1a)  
(Note 1b)  
(Note 1c)  
(Note 1d)  
83  
RθJA  
RθJA  
RθJA  
RθJA  
Thermal Resistance, Junction-to-Ambient  
Thermal Resistance, Junction-to-Ambient  
Thermal Resistance, Junction-to-Ambient  
193  
101  
228  
°C/W  
Package Marking and Ordering Information  
Device Marking  
Device  
Reel Size  
Tape width  
8mm  
Quantity  
109  
FDFMA3N109  
7’’  
3000 units  
FDFMA3N109 Rev B3  
©2008 Fairchild Semiconductor Corporation  
Electrical Characteristics  
TA = 25°C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min Typ Max Units  
Off Characteristics  
BVDSS  
Drain–Source Breakdown Voltage  
30  
V
VGS = 0 V,  
ID = 250 µA  
BVDSS  
TJ  
Breakdown Voltage Temperature  
Coefficient  
ID = 250 µA, Referenced to 25°C  
25  
mV/°C  
IDSS  
Zero Gate Voltage Drain Current  
Gate–Body Leakage Current  
VDS = 24 V,  
VGS = 0 V  
1
µA  
µA  
IGSS  
VGS = ± 12 V, VDS = 0 V  
±10  
On Characteristics  
VGS(th)  
Gate Threshold Voltage  
0.4  
1.0  
–3  
1.5  
V
VDS = VGS  
,
ID = 250 µA  
VGS(th)  
TJ  
Gate Threshold Voltage  
Temperature Coefficient  
ID = 250 µA, Referenced to 25°C  
mV/°C  
VGS = 4.5V, ID = 2.9A  
75  
84  
123  
140  
163  
166  
203  
268  
VGS = 3.0V, ID = 2.7A  
VGS = 2.5V, ID = 2.5A  
92  
Static Drain–Source  
On–Resistance  
RDS(on)  
mΩ  
VGS = 4.5V, ID = 2.9A, TC = 85°C  
VGS = 3.0V, ID = 2.7A, TC = 150°C  
VGS = 2.5V, ID = 2.5A, TC = 150°C  
95  
138  
150  
Dynamic Characteristics  
Ciss  
Input Capacitance  
190  
30  
220  
40  
pF  
pF  
pF  
V
DS = 15 V,  
V GS = 0 V,  
Coss  
Output Capacitance  
f = 1.0 MHz  
Crss  
RG  
Reverse Transfer Capacitance  
Gate Resistance  
20  
30  
V GS = 0 V,  
f = 1.0 MHz  
4.6  
Switching Characteristics (Note 2)  
V
DD = 15 V,  
ID = 1 A,  
RGEN = 6 Ω  
td(on)  
tr  
td(off)  
tf  
Turn–On Delay Time  
Turn–On Rise Time  
Turn–Off Delay Time  
Turn–Off Fall Time  
Total Gate Charge  
Gate–Source Charge  
Gate–Drain Charge  
6
8
12  
16  
21  
4
ns  
ns  
VGS = 4.5 V,  
12  
ns  
2
ns  
VDS = 15 V,  
V
ID = 2.9 A,  
Qg  
Qgs  
Qgd  
2.4  
0.35  
0.75  
3.0  
nC  
nC  
nC  
GS = 4.5 V  
Drain–Source Diode Characteristics and Maximum Ratings  
IS  
Maximum Continuous Drain–Source Diode Forward Current  
2.9  
A
V
VSD  
Drain–Source Diode Forward  
Voltage  
IS = 2.0 A  
0.9  
0.8  
10  
1.2  
1.2  
IS = 1.1 A  
trr  
Diode Reverse Recovery Time  
Diode Reverse Recovery Charge  
IF = 2.9 A,  
dIF/dt = 100 A/µs  
ns  
Qrr  
2
nC  
Schottky Diode Characteristics  
100  
4.7  
10  
µA  
TJ = 25°C  
TJ = 85°C  
IR  
Reverse Leakage  
Forward Voltage  
Forward Voltage  
VR = 28 V  
IF = 1 A  
0.07  
mA  
0.50 0.57  
0.49 0.60  
0.40 0.46  
0.36 0.43  
TJ = 25°C  
TJ = 85°C  
VF  
VF  
V
V
TJ = 25°C  
TJ = 85°C  
IF = 500 mA  
FDFMA3N109 Rev B3  
Electrical Characteristics  
TA = 25°C unless otherwise noted  
Notes:  
1. RθJA is determined with the device mounted on a 1 in2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is  
determined by the user's board design.  
(a) MOSFET RθJA = 83°C/W when mounted on a 1in2 pad of 2 oz copper, 1.5” x 1.5” x 0.062” thick PCB  
(b) MOSFET RθJA = 193°C/W when mounted on a minimum pad of 2 oz copper  
(c) Schottky RθJA = 101°C/W when mounted on a 1in2 pad of 2 oz copper, 1.5” x 1.5” x 0.062” thick PCB  
(d) Schottky RθJA = 228°C/W when mounted on a minimum pad of 2 oz copper  
a) 83oC/W  
when  
b) 193oC/W  
when  
c)101 oC/W  
when  
b) 228oC/W  
when  
mounted on  
a 1in2 pad  
of 2 oz  
mounted on  
a minimum  
pad of  
mounted on  
a 1in2 pad  
of 2 oz  
mounted on  
a minimum  
pad of  
copper  
2 oz copper  
copper  
2 oz copper  
Scale 1 : 1 on letter size paper  
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%  
3: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.  
FDFMA3N109 Rev B3  
Typical Characteristics  
1.8  
1.6  
1.4  
1.2  
1
10  
2.5V  
VGS = 4.5V  
VGS = 2.0V  
8
6
4
2
0
2.7V  
2.9V  
3.5V  
2.0V  
2.5V  
2.7V  
2.9V  
3.5V  
4.0V  
4.5V  
1.5V  
0.8  
0
0.5  
1
1.5  
2
2.5  
3
0
2
4
6
8
10  
V
DS, DRAIN-SOURCE VOLTAGE (V)  
ID, DRAIN CURRENT (A)  
Figure 1. On-Region Characteristics.  
Figure 2. On-Resistance Variation with  
Drain Current and Gate Voltage.  
0.24  
0.2  
1.8  
1.6  
1.4  
1.2  
1
ID = 2.9A  
ID = 1.45A  
VGS = 4.5V  
0.16  
0.12  
0.08  
0.04  
TA = 125oC  
TA = 25oC  
0.8  
0.6  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
0
2
4
6
8
10  
TJ, JUNCTION TEMPERATURE (oC)  
VGS, GATE TO SOURCE VOLTAGE (V)  
Figure 3. On-Resistance Variation with  
Temperature.  
Figure 4. On-Resistance Variation with  
Gate-to-Source Voltage.  
10  
8
100  
VGS = 0V  
TA = -55oC  
VDS = 5V  
125oC  
10  
25oC  
1
0.1  
6
4
TA = 125oC  
0.01  
25oC  
2
-55oC  
0.001  
0.0001  
0
0.5  
1
1.5  
2
2.5  
3
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
1.4  
1.6  
V
GS, GATE TO SOURCE VOLTAGE (V)  
-VSD, BODY DIODE FORWARD VOLTAGE (V)  
Figure 5. Transfer Characteristics.  
Figure 6. Body Diode Forward Voltage Variation  
with Source Current and Temperature.  
FDFMA3N109 Rev B3  
Typical Characteristics  
300  
250  
200  
150  
100  
50  
10  
f = 1MHz  
VGS = 0 V  
ID = 2.9A  
8
VDS = 10V  
20V  
Ciss  
6
15V  
4
2
0
Coss  
Crss  
0
0
5
10  
15  
20  
25  
30  
0
1
2
3
4
5
6
Qg, GATE CHARGE (nC)  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
Figure 7. Gate Charge Characteristics.  
Figure 8. Capacitance Characteristics.  
0.1  
10  
TJ = 125oC  
0.01  
1
TJ = 125oC  
0.001  
TJ = 100oC  
TJ = 25oC  
0.1  
0.0001  
0.00001  
0.01  
TJ = 25oC  
0.001  
0.000001  
0
0.1  
0.2  
0.3  
0.4  
0.5  
0.6  
0.7  
0.8  
0
5
10  
15  
20  
25  
30  
VF, FORWARD VOLTAGE (V)  
VR, REVERSE VOLTAGE (V)  
Figure 9. Schottky Diode Forward Voltage.  
Figure 10. Schottky Diode Reverse Current.  
1
D = 0.5  
Rθ (t) = r(t) * Rθ  
JA  
JA  
RθJA =193°C/W  
0.2  
P(pk)  
0.1  
0.1  
0.05  
t1  
0.02  
0.01  
t2  
T
J - TA = P * RθJA(t)  
Duty Cycle, D = t1 / t2  
SINGLE PULSE  
0.01  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
t1, TIME (sec)  
Figure 11. Transient Thermal Response Curve.  
Thermal characterization performed using the conditions described in Note 1b.  
Transient thermal response will change depending on the circuit board design.  
FDFMA3N109 Rev B3  
Dimensional Outline and Pad Layout  
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without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-  
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Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_MLDEB-X06  
FDFMA3N109 Rev B3  
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FDFMA3N109 Rev B3  
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ROCHESTER

FDFMJ2P023Z

Small Signal Field-Effect Transistor, 0.0029A I(D), 20V, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, ROHS COMPLIANT, SC-75, MICROFET-6
FAIRCHILD

FDFMM-TTL-100F

Analog Miscellaneous
ETC

FDFMM-TTL-100G

Analog Miscellaneous
ETC

FDFMM-TTL-100J

Analog Miscellaneous
ETC