FCH125N60E [ONSEMI]
功率 MOSFET,N 沟道,SUPERFET® II,Easy Drive,600 V,29 A,125 mΩ,TO-247;型号: | FCH125N60E |
厂家: | ONSEMI |
描述: | 功率 MOSFET,N 沟道,SUPERFET® II,Easy Drive,600 V,29 A,125 mΩ,TO-247 |
文件: | 总10页 (文件大小:442K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MOSFET – N-Channel,
SUPERFET) II, Easy-Drive
600 V, 29 A, 125 mW
FCH125N60E
Description
SUPERFET II MOSFET is ON Semiconductor’s brand−new high
voltage super−junction (SJ) MOSFET family that is utilizing charge
balance technology for outstanding low on−resistance and lower gate
charge performance. This technology is tailored to minimize
conduction loss, provide superior switching performance, dv/dt rate
and higher avalanche energy. Consequently, SUPERFET II MOSFET
easy−drive series offers slightly slower rise and fall times compared to
the SUPERFET II MOSFET series. Noted by the “E” part number
suffix, this family helps manage EMI issues and allows for easier
design implementation. For faster switching in applications where
switching losses must be at an absolute minimum, please consider the
SUPERFET II MOSFET series.
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V
R
MAX
I MAX
D
DS
DS(ON)
600 V
125 mW @ 10 V
29 A
D
G
Features
• Typ. R
= 102 mW
• 650 V @ T = 150°C
DS(on)
J
S
• Ultra Low Gate Charge (Typ. Q = 75 nC)
g
N-CHANNEL MOSFET
• Low Effective Output Capacitance (Typ. C
• 100% Avalanche Tested
= 258 pF)
oss(eff.)
S
D
G
• These Devices are Pb−Free and are RoHS Compliant
Applications
• Telecom / Sever Power Supplies
• Industrial Power Supplies
TO−247−3LD
CASE 340CK
MARKING DIAGRAM
$Y&Z&3&K
FCH
125N60E
$Y
&Z
&3
&K
= ON Semiconductor Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
FCH125N60E = Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
December, 2019 − Rev. 2
FCH125N60E/D
FCH125N60E
ABSOLUTE MAXIMUM RATINGS (T = 25°C unless otherwise noted)
C
Symbol
Parameter
FCH125N60E
Unit
V
V
DSS
V
GSS
Drain to Source Voltage
Gate to Source Voltage
600
− DC
20
V
− AC (f > 1 Hz)
30
I
D
Drain Current:
− Continuous (T = 25°C)
29
A
C
− Continuous (T = 100°C)
18
C
I
I
Drain Current:
− Pulsed (Note 1)
87
A
mJ
A
DM
E
AS
AR
Single Pulsed Avalanche Energy (Note 2)
Avalanche Current (Note 1)
Repetitive Avalanche Energy (Note 1)
MOSFET dv/dt
720
6
2.78
E
mJ
V/ns
AR
dv/dt
100
Peak Diode Recovery dv/dt (Note 3)
Power Dissipation
20
P
(T = 25°C)
278
W
W/°C
°C
D
C
− Derate Above 25°C
2.2
T , T
Operating and Storage Temperature Range
−55 to + 150
300
J
STG
T
Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 Seconds
°C
L
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Repetitive rating: pulse−width limited by maximum junction temperature.
2. I = 6.0 A, R = 25 W, Starting T = 25 °C.
AS
G
J
3. I ≤ 14.5 A, di/dt ≤ 200 A/ms, V ≤ 380 V, Starting T = 25 °C.
SD
DD
J
PACKAGE MARKING AND ORDERING INFORMATION
Part Number
Top Marking
Package
Packing Method
Reel Size
Tape Width
Quantity
FCH125N60E
FCH125N60E
TO−247
Tube
N/A
N/A
30 Units
THERMAL CHARACTERISTICS
Symbol
Parameter
FCH125N60E
Unit
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
0.45
40
°C/W
R
q
JC
JA
R
q
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2
FCH125N60E
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
= 10 mA, V = 0 V, T = 25°C
600
650
−
−
−
−
−
−
V
DSS
D
GS
J
I
D
= 10 mA, V = 0 V, T = 150°C
GS J
DBV
/DT
Breakdown Voltage Temperature
Coefficient
I
D
= 10 mA, Referenced to 25°C
0.7
V/°C
mA
DSS
J
I
Zero Gate Voltage Drain Current
V
V
V
= 600 V, V = 0 V
−
−
−
−
2
−
1
DSS
DS
DS
GS
GS
= 480 V, V = 0 V, T = 125 °C
−
GS
C
I
Gate to Body Leakage Current
=
20 V, V = 0 V
100
nA
GSS
DS
ON CHARACTERISTICS
V
Gate Threshold Voltage
V
GS
V
GS
V
DS
= V , I = 250 mA
2.5
−
−
3.5
125
−
V
mW
S
GS(th)
DS(on)
DS
D
R
Static Drain to Source On Resistance
Forward Transconductance
= 10 V, I = 14.5 A
102
25
D
g
FS
= 20 V, I = 14.5 A
−
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 380 V, V = 0 V, f = 1 MHz
−
−
−
−
−
−
−
−
2250
60
2990
80
−
pF
pF
pF
pF
nC
nC
nC
W
iss
oss
rss
DS
GS
C
C
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance
Total Gate Charge at 10 V
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
Equivalent Series Resistance
17
C
V
V
= 0 V to 480 V, V = 0 V
258
75
−
oss(eff.)
DS
GS
Q
= 380 V, I = 14.5 A V = 10 V
95
−
g(tot)
DS
D
,
GS
(Note 4)
Q
10
gs
Q
33
−
gd
ESR
f = 1 MHz
3.5
−
SWITCHING CHARACTERISTICS
t
Turn-On Delay Time
Turn−On Rise Time
Turn-Off Delay Time
Turn−Off Fall Time
V
V
= 380 V, I = 14.5 A,
−
−
−
−
23
20
56
50
ns
ns
ns
ns
d(on)
DD
GS
D
= 10 V, R = 4.7 W
g
t
r
(Note 4)
t
106
23
222
56
d(off)
t
f
DRAIN-SOURCE DIODE CHARACTERISTICS
I
Maximum Continuous Source to Drain Diode Forward Current
Maximum Pulsed Drain to Source Diode Forward Current
−
−
−
−
−
−
−
29
87
1.2
−
A
A
S
I
SM
V
SD
Drain to Source Diode Forward Voltage
Reverse Recovery Time
V
V
= 0 V, I = 14.5 A
−
V
GS
SD
t
rr
= 0 V, I = 14.5 A,
376
6.5
ns
mC
GS
SD
dI /dt = 100 A/ms
F
Q
Reverse Recovery Charge
−
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially independent of operating temperature.
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3
FCH125N60E
TYPICAL CHARACTERISTICS
100
10
1
100
*Notes:
1. V = 20 V
DS
2. 250 ms Pulse Test
10
V
GS
150oC
10.0 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
4.5 V
25oC
o
*Notes:
1. 250 ms Pulse Test
2. T = 25°C
−55 C
C
1
0.3
1
10
2
3
4
5
6
7
VDS, Drain−Source Voltage[V]
VGS, Gate−Source Voltage[V]
Figure 2. Transfer Characteristics
Figure 1. On−Region Characteristics
100
0.3
0.2
0.1
0.0
*Note: T C = 25oC
*Notes:
1. V = 0 V
GS
2. 250 ms Pulse Test
10
150oC
1
25oC
o
VGS = 10V
VGS = 20V
0.1
−55 C
0.01
0.001
0.0
0.3
0.6
0.9
1.2
1.5
0
20
40
60
80
100
VSD, Body Diode Forward Voltage [V]
ID, Drain Current [A]
Figure 4. Body Diode Forward Voltage Variation
vs. Source Current and Temperature
Figure 3. On−Resistance Variation vs. Drain
Current and Gate Voltage
100000
10
*Note: ID = 14.5A
V
DS = 120V
10000
1000
100
10
8
6
4
Ciss
V
DS = 300V
Coss
VDS = 480V
*Notes:
1. V = 0 V
GS
2. f = 1 MHz
C
C
C
= C + C (C = shorted)
gs gd ds
iss
oss
rss
2
0
Crss
1
= C + C
ds
gd
gd
= C
0.1
10−1
1
10
103
2
10
0
16
32
48
64
80
Qg, Total Gate Charge [nC]
VDS, Drain−Source Voltage [V]
Figure 6. Gate Charge Characteristics
Figure 5. Capacitance Characteristics
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4
FCH125N60E
TYPICAL CHARACTERISTICS
2.5
1.2
1.1
1.0
0.9
0.8
*Notes:
1. V = 10 V
*Notes:
1. V = 0 V
GS
GS
2. I = 14.5 A
D
2. I = 10 mA
D
2.0
1.5
1.0
0.5
−100
−50
0
50
100
150
200
−100
−50
0
50
100
150
200
TJ, Junction Temperature [ oC]
TJ, Junction Temperature [ oC]
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On−Resistance Variation
vs. Temperature
30
24
18
12
6
100
10
1
10ms
100ms
1ms
Operation in This Area
DC
is Limited by R
DS(on)
*Notes:
1. T = 25°C
C
2. T = 150°C
J
q
3. R
= 0.45°C
JC
0
0.1
25
50
75
100
125
150
1
10
100
1000
TC, Case Temperature [ oC]
VDS, Drain−Source Voltage [V]
Figure 10. Maximum Drain Current
vs. Case Temperature
Figure 9. Maximum Safe Operating Area
15
12
9
6
3
0
0
120
240
360
480
600
VDS, Drain to Source Voltage [V]
Figure 11. Eoss vs. Drain to Source Voltage
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5
FCH125N60E
TYPICAL CHARACTERISTICS
1
0.5
0.1 0.2
0.1
PDM
t1
0.05
t2
0.02
0.01
Single pulse
*Notes:
1. Z (t) = 0.45°C/W Max.
qJC
2. Duty Factor, D = t /t
1 2
0.01
3. T − T = P
* Z (t)
q
JC
JM
C
DM
0.005
10−5
10−4
10−3
10−2
10−1
1
10
t1, Rectangular Pulse Duration [sec]
Figure 12. Transient Thermal Response Curve
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6
FCH125N60E
V
GS
R
Q
g
L
V
DS
Q
Q
gs
gd
V
GS
DUT
I
G
= Const.
Charge
Figure 13. Gate Charge Test Circuit & Waveform
R
L
V
DS
GS
90%
90%
10%
90%
V
DS
V
DD
V
GS
R
G
10%
V
DUT
V
GS
t
r
t
f
t
t
d(off)
d(on)
t
on
t
off
Figure 14. Resistive Switching Test Circuit & Waveforms
L
2
1
2
EAS
+
@ LIAS
V
DS
BV
DSS
I
D
I
AS
R
G
V
DD
I (t)
D
DUT
V
DD
V
GS
V
DS
(t)
t
p
Time
t
p
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms
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7
FCH125N60E
+
DUT
V
SD
−
I
SD
L
Driver
R
G
Same Type
as DUT
V
DD
V
GS
− dv/dt controlled by R
G
− I controlled by pulse period
SD
Gate Pulse Width
D +
Gate Pulse Period
V
GS
10 V
(Driver)
I
, Body Diode Forward Current
FM
I
di/dt
SD
(DUT)
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
DS
V
DD
V
SD
(DUT)
Body Diode
Forward Voltage Drop
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
SUPERFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or
other countries.
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8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−247−3LD SHORT LEAD
CASE 340CK
ISSUE A
DATE 31 JAN 2019
P1
D2
A
E
P
A
A2
Q
E2
S
D1
D
E1
B
2
2
1
3
L1
A1
b4
L
c
(3X) b
(2X) b2
M
M
B A
0.25
MILLIMETERS
MIN NOM MAX
4.58 4.70 4.82
2.20 2.40 2.60
1.40 1.50 1.60
1.17 1.26 1.35
1.53 1.65 1.77
2.42 2.54 2.66
0.51 0.61 0.71
20.32 20.57 20.82
(2X) e
DIM
A
A1
A2
b
b2
b4
c
GENERIC
D
MARKING DIAGRAM*
D1 13.08
~
~
D2
E
0.51 0.93 1.35
15.37 15.62 15.87
AYWWZZ
XXXXXXX
XXXXXXX
E1 12.81
~
~
E2
e
L
4.96 5.08 5.20
5.56
15.75 16.00 16.25
3.69 3.81 3.93
3.51 3.58 3.65
XXXX = Specific Device Code
~
~
A
Y
= Assembly Location
= Year
WW = Work Week
ZZ = Assembly Lot Code
L1
P
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
P1 6.60 6.80 7.00
Q
S
5.34 5.46 5.58
5.34 5.46 5.58
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13851G
TO−247−3LD SHORT LEAD
PAGE 1 OF 1
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相关型号:
FCH165N65S3R0-F155
Power MOSFET, N-Channel, SUPERFET® III, Easy Drive, 650 V, 19 A, 165 mΩ, TO-247
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