FAN7711N [ONSEMI]
电子镇流器控制器;型号: | FAN7711N |
厂家: | ONSEMI |
描述: | 电子镇流器控制器 电子 PC 驱动 控制器 光电二极管 接口集成电路 |
文件: | 总23页 (文件大小:1524K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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May 2007
FAN7711
Ballast Control Integrated Circuit
Features
Description
Floating Channel for Bootstrap Operation to +600V
Low Start-up and Operating Current: 120μA, 3.2mA
Under-Voltage Lockout with 1.8V of Hysteresis
Adjustable Run Frequency and Preheat Time
Internal Active ZVS Control
The FAN7711, developed with Fairchild’s unique high-
voltage process, is a ballast control integrated circuit (IC)
for a fluorescent lamp. FAN7711 incorporates a preheating
/ ignition function, controlled by an user-selected external
capacitor, to increase lamp life. The FAN7711 detects
switch operation from after ignition mode through an
internal active Zero-Voltage Switching (ZVS) control
circuit. This control scheme enables the FAN7711 to
detect an open-lamp condition, without the expense of
external circuitry, and prevents stress on MOSFETs. The
high-side driver built into the FAN7711 has a common-
mode noise cancellation circuit that provides robust
operation against high-dv/dt noise intrusion.
Internal Protection Function (Latch Mode)
Internal Clamping Zener Diode
High Accuracy Oscillator
Soft-Start Functionality
8-DIP
8-SOP
Applications
Electronic Ballast
Ordering Information
Part Number
FAN7711N
Package
Pb-Free
Operating Temperature Range Packing Method
8-DIP
Tube
FAN7711M
Yes
-25°C ~ 125°C
Tube
8-SOP
FAN7711MX
Tape & Reel
Typical Application
D5
D6
R3
R1
U1
D1
D2
VDD
VB
1
2
8
7
6
5
Main
Supply
R4
R5
HO
VS
RT
CPH
GND
C1
FAN7711
Q1
Q2
C4
D7
C5
L1
C6
3
4
LO
D3
D4
C2
R2
C3
Lamp
C7
FAN7711 Rev. 1.00
Figure 1. Typical Application Circuit for Compact Fluorescent Lamp
© 2007 Fairchild Semiconductor Corporation
FAN7711 Rev. 1.0.3
www.fairchildsemi.com
Internal Block Diagram
VDD
1
HIGH-SIDE DRIVER
VB
10V
REG
VB
8
15V SHUNT
REGULATOR
UVLO
Q
Q
S
R
Noise
Canceller
7
6
HO
VS
IPH=0.6*IRT
BIAS & SYSTEM LATCH
IRT
SDH
IPH
UVLO
4V
UVLO
BGR
R
S
Q
Q
IPH
*
IRT
2
RT
CPH
3V 5V
BIAS TSD
SET
0A
SDL
CPH
PRE-HEAT
Control
SYSHALT
RESET
IPH
*
CPH<3V
DEAD-TIME Control
Yes
VDDH/VDD
LSH
VDDH/VDD
LSH
LOW-SIDE GATE DRIVER
2μA
OSCILLATOR
No
12μA
DELAY
5
LO
SDL
SDH
3
CPH
S
R
Q
OUTPUT
TRANSITION
SENSING
ADAPTIVE
ZVS CONTROLLER
SDL
SDH
RESET
Q
5V/3V
SYSHALT
ADAPTIVE ZVS ENABLE LOGIC
4
FAN7711 Rev. 1.00
GND
Figure 2. Functional Block Diagram
Pin Configuration
VB
8
HO
7
VS
6
LO
5
FAN7711
YWW
(YWW : Work Week Code)
1
2
3
4
VDD
RT
CPH
GND
FAN7711 Rev. 1.00
Figure 3. Pin Configuration (Top View)
Pin Definitions
Pin #
Name
Description
1
2
3
4
5
6
7
8
VDD
RT
Supply voltage
Oscillator frequency set resistor
Preheating time set capacitor
Ground
CPH
GND
LO
Low-side output
VS
High-side floating supply return
High-side output
HO
VB
High-side floating supply
© 2007 Fairchild Semiconductor Corporation
FAN7711 Rev. 1.0.3
www.fairchildsemi.com
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-
ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. TA=25°C unless otherwise specified.
Symbol
VB
Parameter
Min.
-0.3
-0.3
-0.3
Typ.
Max.
625
600
8
Unit
V
High-side floating supply
VS
High-side floating supply return
RT, CPH pins input voltage
Clamping current level
V
VIN
V
ICL
25
mA
V/ns
°C
dVS/dt
TA
Allowable offset voltage slew rate
Operating temperature range
Storage temperature range
50
-25
-65
125
150
TSTG
°C
8-SOP
8-DIP
8-SOP
8-DIP
0.625
1.2
PD
Power dissipation
W
200
100
θJA
Thermal resistance (junction-to-air)
°C/W
Note:
1. Do not supply a low-impedance voltage source to the internal clamping Zener diode between the GND and the VDD
pin of this device.
© 2007 Fairchild Semiconductor Corporation
FAN7711 Rev. 1.0.3
www.fairchildsemi.com
3
Electrical Characteristics
VBIAS (VDD, VBS) = 14.0V, TA = 25°C, unless otherwise specified.
Symbol
Characteristics
Conditions
Min. Typ. Max. Unit
Supply Voltage Section
VDDTH(ST+) VDD UVLO positive going threshold
VDDTH(ST-) VDD UVLO negative going threshold
VDDHY(ST) VDD-side UVLO hysteresis
VDD increasing
12.4
10.8
13.4
11.6
1.8
14.4
12.4
VDD decreasing
V
VCL
IST
Supply clamping voltage
IDD =10mA
14.8
15.2
120
3.2
Start-up supply current
VDD = 10V
μA
IDD
Dynamic operating supply current
50kHz, CL = 1nF
mA
High-Side Supply Section (VB-VS)
VHSTH(ST+) High-side UVLO positive going threshold
VHSTH(ST-) High-side UVLO negative going threshold
VHSHY(ST) High-side UVLO hysteresis
VBS increasing
VBS decreasing
8.5
7.9
9.2
8.6
0.6
50
1
10.0
9.5
V
IHST
IHD
ILK
High-side quiescent supply current
High-side dynamic operating supply current
Offset supply leakage current
VBS = 14V
μA
mA
μA
50kHz, CL = 1nF
VB = VS = 600V
45
Oscillator Section
VMPH CPH pin preheating voltage range
IPH
2.5
1.25
8
3.0
2.00
12
3.5
2.85
16
V
CPH pin charging current during preheating
CPH pin charging current during ignition
CPH pin voltage level at running mode
Preheating frequency
VCPH = 1V
VCPH = 4V
μA
IIG
VMO
fPRE
fOSC
7.0
85
V
RT = 80kΩ, VCPH = 2V
RT = 80kΩ
72
98
kHz
kHz
Running frequency
48.7
53.0
57.3
V
CPH = 1V, VS = GND during
DTMAX
DTMIN
Maximum dead time
Minimum dead time
3.1
1.0
μs
μs
preheat mode
V
mode
CPH = 6V, VS = GND during run
Output Section
IOH+
IOH-
IOL+
IOL-
High-side driver sourcing current
PW = 10μs
250
500
250
500
350
650
350
650
45
High-side driver sinking current
Low-side driver sourcing current
Low-side driver sink current
PW = 10μs
mA
PW = 10μs
PW = 10μs
tHOR
tHOL
tLOR
tLOL
High-side driver turn-on rising time
High-side driver turn-off rising time
Low-side driver turn-on rising time
Low-side driver turn-off rising time
CL = 1nF, VBS = 15V
CL = 1nF, VBS = 15V
CL = 1nF, VBS = 15V
CL = 1nF, VBS = 15V
25
ns
V
45
25
Maximum allowable negative VS swing range for
signal propagation to high-side output
(2)
VS
-9.8
Protection Section
VCPHSD Shutdown voltage
ISD
2.6
V
VRT = 0 after run mode
Shutdown current
250
165
450
μA
°C
TSD
Thermal shutdown(2)
Note:
2. This parameter, although guaranteed, is not 100% tested in production.
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN7711 Rev. 1.0.3
4
Typical Characteristics
3.0
2.5
2.0
1.5
1.0
200
180
160
140
120
100
80
-40 -20
0
20
40
60
80 100 120
-40 -20
0
20
40
60
80 100 120
Temperature [°C]
Temperature [°C]
Figure 4. Start-Up Current vs. Temp.
Figure 5. Preheating Current vs. Temp.
16
4.0
14
12
10
8
3.5
3.0
2.5
2.0
-40 -20
0
20
40
60
80 100 120
-40 -20
0
20
40
60
80 100 120
Temperature [°C]
Temperature [°C]
Figure 6. Ignition Current vs. Temp
Figure 7. Operating Current vs. Temp.
100
400
80
60
40
20
0
300
200
100
0
-40 -20
0
20
40
60
80 100 120
-40 -20
0
20
40
60
80 100 120
Temperature [°C]
Temperature [°C]
Figure 8. Start-Up Current vs. Temp.
Figure 9. Shutdown Current vs. Temp.
© 2007 Fairchild Semiconductor Corporation
FAN7711 Rev. 1.0.3
www.fairchildsemi.com
5
Typical Characteristics (Continued)
14.4
14.0
10.0
9.6
9.2
8.8
8.4
8.0
13.6
ST+
13.2
12.8
12.4
12.0
ST+
ST-
ST-
11.6
11.2
10.8
10.4
-40 -20
0
20
40
60
80 100 120
-40 -20
0
20
40
60
80 100 120
Temperature [°C]
Temperature [°C]
Figure 10. VDD UVLO vs. Temp.
Figure 11. VBS UVLO vs. Temp.
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
16.2
16.0
15.8
15.6
15.4
15.2
15.0
14.8
-40 -20
0
20
40
60
80 100 120
-40 -20
0
20
40
60
80 100 120
Temperature [°C]
Temperature [°C]
Figure 12. VDD Clamp Voltage vs. Temp.
Figure 13. Shutdown Voltage vs. Temp.
100
58
56
54
52
50
48
95
90
85
80
75
70
-40 -20
0
20
40
60
80 100 120
-40 -20
0
20
40
60
80 100 120
Temperature [°C]
Temperature [°C]
Figure 14. Running Frequency vs. Temp.
Figure 15. Preheating Frequency vs. Temp.
© 2007 Fairchild Semiconductor Corporation
FAN7711 Rev. 1.0.3
www.fairchildsemi.com
6
Typical Characteristics (Continued)
1.8
1.6
1.4
1.2
1.0
0.8
0.6
4.0
3.6
3.2
2.8
2.4
2.0
-40 -20
0
20
40
60
80 100 120
-40 -20
0
20
40
60
80 100 120
Temperature [°C]
Temperature [°C]
Figure 16. Minimum Dead Time vs. Temp.
Figure 17. Maximum Dead Time vs. Temp.
© 2007 Fairchild Semiconductor Corporation
FAN7711 Rev. 1.0.3
www.fairchildsemi.com
7
Typical Application Information
Before the lamp is ignited, the lamp impedance is very
high. Once the lamp is turned on, the lamp impedance
significantly decreases. Since the resonant peak is very
high due to the high-resistance of the lamp at the instant
of turning on the lamp, the lamp must be driven at higher
frequency than the resonant frequency, shown as (A) in
Figure 19. In this mode, the current supplied by the
inverter mainly flows through CP. CP connects both
1. Under-Voltage Lockout (UVLO) Function
The FAN7711 has UVLO circuits for both high-side and
low-side circuits. When V
reaches V
, UVLO
DD
DDTH(ST+)
is released and the FAN7711 operates normally. At UVLO
condition, FAN7711 consumes little current, noted I
.
ST
Once UVLO is released, FAN7711 operates normally
until V goes below V , the UVLO hysteresis. At
DD
DDTH(ST-)
UVLO condition, all latches that determine the status of
the IC are reset. When the IC is in the shutdown mode,
filaments and makes the current path to ground. As a
result, the current warms up the filament for easy
ignition. The amount of the current can be adjusted by
controlling the oscillation frequency or changing the
capacitance of CP. The driving frequency, fPRE, is called
the IC can restart by lowering V
below V
.
DD
DDTH(ST-)
FAN7711 has a high-side gate driver circuit. The supply
for the high-side driver is applied between VB and VS. To
preheating frequency and is derived by:
protect the malfunction of the driver at low supply
voltage, between VB and VS, FAN7711 provides an
additional UVLO circuit between the supply rails. If VB-
VS is under VHSTH(ST+), the driver holds low-state to turn
(EQ 1)
fPRE = 1.6 × fOSC
off the high-side switch, as shown in Figure 18. As long
as VB-VS is higher than VHSTH(ST-) after VB-VS exceeds
After the warm-up, the FAN7711 decreases the
frequency, shown as (B) of Figure 19. This action
increases the voltage of the lamp and helps the
fluorescent lamp ignite. The ignition frequency is
described as a function of CPH voltage, as follows:
VHSTH(ST+), operation of the driver continues.
2. Oscillator
The ballast circuit for a fluorescent lamp is based on the
LCC resonant tank and a half-bridge inverter circuit, as
shown in Figure 18. To accomplish Zero-Voltage
Switching (ZVS) of the half-bridge inverter circuit, the
LCC is driven at a higher frequency than its resonant
frequency, which is determined by L, CS, CP, and RL,
(EQ 2)
⎡
⎤
+1 × f
CPH OSC
fIG
=
0.3 × 5-V
)
⎣
⎦
where VCPH is the voltage of CPH capacitor.
where RL is the equivalent lamp's impedance
Equation 2 is valid only when VCPH is between 3V to 5V
before FAN7711 enters running mode. Once VCPH
.
VDC
reaches 5V, the internal latch records the exit from
ignition mode. Unless VDD is below VDDTH(ST-), the
FAN7711
VDD
RT
VB
HO
VS
preheating and ignition modes appear only once during
lamp start transition.
High-side
driver
Oscillator
VDD
LCC resonant tank
RT
Finally, the lamp is driven at a fixed frequency by an
external resistor, RT, shown as (C) of Figure 19. If VDD is
Filament
L
CS
Dead-time
controller
CPH
Low-side
driver
CPH
GND
RL
CP
higher than VDDTH(ST+) and UVLO is released, the
voltage of RT pin is regulated to 4V. This voltage adjusts
LO
equivalent lamp impedance
FAN7711 Rev. 1.00
the oscillator's control current according to the resistance
of RT. Because this current and an internal capacitor set
Figure 18. Resonant Inverter Circuit Based on
LCC Resonant Tank
the oscillation frequency, the FAN7711 does not need
any external capacitors.
The proposed oscillation characteristic is given by:
The transfer function of LCC resonant tank is heavily
dependent on the lamp impedance, RL, as illustrated in
Figure 19. The oscillator in FAN7711 generates effective
driving frequencies to assist lamp ignition and improve
lamp life longevity. Accordingly, the oscillation frequency
is changed in the following sequence:
4 ×109
RT
(EQ 3)
fOSC
=
Preheating freq.->Ignition freq.-> Normal running freq.
Even in the active ZVS mode, shown as (D) in Figure 19,
the oscillation frequency is not changed. The dead-time
is varied according to the resonant tank characteristic.
© 2007 Fairchild Semiconductor Corporation
FAN7711 Rev. 1.0.3
www.fairchildsemi.com
8
CPH voltage [V]
8
(C) Active ZVS mode
40dB
20dB
(B) Ignition Mode
7
6
5
4
3
2
RL=100k
(A) Preheating Mode
(D) Shutdown
mode
1
0
RL=10k
Preheating
frequency
3
2
1
time
0
Dead Time[μs]
(B)
Oscillation
Frequency
Preheating Frequency:fPRE
0dB
Preheating
Mode
(A)
(C)
RL=1k
Running Frequency:
fOSC
Running
Mode
Ignition
Mode
Running frequency
RL=500
time
t0
FAN7711 Rev. 1.00
t1 t2 t3
(D) Dead-time control mode
at fixed frequency
FAN7711 Rev. 1.00
Figure 20. Operation Modes
Figure 19. LCC Transfer Function in Terms of
Lamp Impedance
3.1 Preheating Mode (t0~t1)
When VDD exceeds VDDTH(ST+), the FAN7711 starts
operation. At this time, an internal current source (IPH
)
3. Operation Modes
charges CPH. CPH voltage increases from 0V to 3V in
preheating mode. Accordingly, the oscillation frequency
follows the Equation 4. In this mode, the lamp is not
ignited, but warmed up for easy ignition. The preheating
time depends on the size of CPH:
FAN7711 has four operation modes: (A) preheating
mode, (B) ignition mode, (C) active ZVS mode, and (D)
shutdown mode, depicted in Figure 20. The modes are
automatically selected by the voltage of CPH capacitor,
shown in Figure 20. In modes (A) and (B), the CPH acts
as a timer to determine the preheating and ignition times.
After the preheating and ignition modes, the role of the
CPH is changed to stabilize the active ZVS control
circuit. In this mode, the dead time of the inverter is
selected by the voltage of CPH. Only when FAN7711 is
in active ZVS mode is it possible to shut off the whole
system using CPH pin. Pulling the CPH pin below 2V in
active ZVS mode, causes the FAN7711 to enter
shutdown mode. In shutdown mode, all active operation
is stopped, except UVLO and some bias circuitry. The
shutdown mode is triggered by the external CPH control
or the active ZVS circuit. The active ZVS circuit
automatically detects lamp removal (open-lamp
condition) and decreases CPH voltage below 2V to
protect the inverter switches from damage.
3 ×CPH
IPH
(EQ 4)
fpreheat
=
[Sec.]
According to preheating process, the voltage across the
lamp to ignite is reduced and the lifetime of the lamp is
increased. In this mode, the dead time is fixed at its
maximum value.
3.2 Ignition Mode (t1~t2)
When the CPH voltage exceeds 3V, the internal current
source to charge CPH is increased about six times larger
than IPH, noted as IIG, causing rapid increase in CPH
voltage. The internal oscillator decreases the oscillation
frequency from fPRE to fOSC as CPH voltage increases.
As depicted in Figure 20, lowering the frequency
increases the voltage across the lamp. Finally, the lamp
ignites. Ignition mode is defined when CPH voltage lies
between 3V and 5V. Once CPH voltage reaches 5V, the
FAN7711 does not return to ignition mode, even if the
CPH voltage is in that range, until the FAN7711 restarts
from below VDDTH(ST-). Since the ignition mode
continues when CPH is from 3V to 5V, the ignition time is
given by:
2 ×CPH
IIG
tignition
=
[Sec.]
(EQ 5)
In this mode, dead time varies according to the CPH
voltage.
© 2007 Fairchild Semiconductor Corporation
FAN7711 Rev. 1.0.3
www.fairchildsemi.com
9
3.3 Running and Active Zero-Voltage Switching
(AZVS) Modes (t2~)
3.4 Shutdown Mode
If the voltage of capacitor CPH is decreased below
~2.6V by an external application circuit or internal
protection circuit, the IC enters shutdown mode. Once
the IC enters shutdown mode, this status continues until
an internal latch is reset by decreasing VDD below
When CPH voltage exceeds 5V, the operating frequency
is fixed to fOSC by RT. However, active ZVS operation is
not activated until CPH reaches ~6V. The FAN7711
prepares for active ZVS operation from the instant CPH
exceeds 5V during t2 to t3. When CPH becomes higher
than ~6V at t3, the active ZVS operation is activated. To
determine the switching condition, FAN7711 detects the
transition time of the output (VS pin) of the inverter by
VDDTH(ST-). Figure 22 shows an example of external
shutdown control circuit.
using VB pin. From the output-transition information,
FAN7711 controls the dead time to meet the ZVS
condition. If ZVS is satisfied, the FAN7711 slightly
increases the CPH voltage to reduce the dead time and
to find optimal dead time, which increases the efficiency
and decreases the thermal dissipation and EMI of the
inverter switches. If ZVS fails, the FAN7711 decreases
CPH voltage to increase the dead time. CPH voltage is
adjusted to meet optimal ZVS operation. During the
active ZVS mode, the amount of the charging/
discharging current is the same as IPH. Figure 21 depicts
3
4
CPH
CPH
FAN7711
Shutdown
Q1
GND
FAN7711 Rev. 1.00
Figure 22. External Shutdown Circuit
The amount of the CPH charging current is the same as
IPH, making it possible to shut off the IC using small
normal operation waveforms.
signal transistor. FAN7711 provides active ZVS
operation by controlling the dead time according to the
voltage of CPH. If ZVS fails, even at the maximum dead
time, FAN7711 stops driving the inverter.
VDD
VDDTH(ST+)
VDDTH(ST-)
The FAN7711 thermal shutdown circuit senses the
junction temperature of the IC. If the temperature
exceeds ~160°C, the thermal shutdown circuit stops
operation of the FAN7711.
time
CPH
Active ZVS activated
6V
5V
Dead time settling
3V
2V
The current usages of shutdown mode and under-
voltage lockout status are different. In shutdown mode,
some circuit blocks, such as bias circuits, are kept alive.
Therefore, the current consumption is slightly higher
than during under-voltage lockout.
time
Ignition
Running mode
Lamp
Voltage
Active ZVS mode
0V
time
Preheating period
(Filament warm-up)
OUT
4. Automatic Open-Lamp Detection
FAN7711 can automatically detect the open-lamp
condition. When the lamp is opened, the resonant tank
fails to make a closed-loop to the ground, as shown in
Figure 23. The supplied current from the VS pin is used
0V
time
Perfect ZVS
Zoom-in
to charge and discharge the charge pump capacitor, CP.
Since the open-lamp condition means resonant tank
absence, it is impossible to meet ZVS condition. In this
condition, the power dissipation of the FAN7711, due to
capacitive load drive, is estimated as:
t=1/fOSC
t=1/fOSC
t=1/fOSC
t=1/fOSC
Dead time
FAN7711 Rev. 1.00
1
Figure 21. Typical Transient Waveform from
Preheating to Active ZVS Mode
2
(EQ 6)
PDissipation
=
×CP ×VDC × f [W ]
2
where f is driving frequency and VDC is DC-link voltage.
© 2007 Fairchild Semiconductor Corporation
FAN7711 Rev. 1.0.3
www.fairchildsemi.com
10
5. Power Supply
DB
FAN7711
VDC
When VDD is lower than VDDTH(ST+), it consumes very
little current, IST, making it possible to supply current to
the VDD pin using a resistor with high resistance (Rstart in
VDD
RT
VB
HO
VS
CB
CVDD
RT
High-side
driver
Figure 25). Once UVLO is released, the current
consumption is increased and whole circuits are
operated, which requires additional power supply for
stable operation. The supply must deliver at least several
mA. A charge pump circuit is a cost-effective method to
create an additional power supply and allows CP to be
Oscillator
LCC resonant tank
Filament Open
L
CS
Dead-time
controller
CPH
Low-side
driver
CPH
GND
RL
CP
LO
equivalent lamp impedance
CCP
used to reduce the EMI.
Dp2
Charge Pump
Dp1
FAN7711 Rev. 1.00
Figure 23. Current Flow When the Lamp is Open
DB
VDC
Rstart
FAN7711
VB
HO
VS
VDD
RT
Assuming that CP, VDC, and f are 1nF, 311V, and 50kHz,
CB
dv/dt
respectively; the power dissipation reaches about 2.4W
and the temperature of FAN7711 is increased rapidly. If
no protection is provided, the IC can be damaged by the
thermal attack. Note that hard-switching condition during
the capacitive-load drive causes lots of EMI.
+
Shunt
regulator
LCC resonant tank
(2)
CVDD
Filament Open
L
CS
CPH
GND
RL
CP
LO
Ccp
Dp1
Charge Pump
equivalent lamp impedance
(1)
FAN7711 Rev. 1.00
Figure 24 illustrates the waveforms during the open-
lamp condition. In this condition, the charging and
discharging current of CP is directly determined by
Dp2
FAN7711 and considered hard-switching condition. The
FAN7711 tries to meet ZVS condition by decreasing
CPH voltage to increase dead time. If ZVS fails and CPH
goes below 2V, even though the dead time reaches its
maximum value, FAN7711 shuts off the IC to protect
against damage. To restart FAN7711, VDD must be
Figure 25. Local Power Supply for VDD Using a
Charge Pump Circuit
As presented in Figure 25, when VS is high, the inductor
current and CCP create an output transition with the
slope of dv/dt. The rising edge of VS charges CCP. At that
time, the current that flows through CCP is:
below VDDTH(ST-) to reset an internal latch circuit, which
remembers the status of the IC.
dv
(EQ 7)
I ≅ CCP
×
Shutdown
Release Restart
dt
VDD
VDDTH(ST+)
VDDTH(ST-)
This current flows along the path (1). It charges CVDD
,
which is a bypass capacitor to reduce the noise on the
supply rail. If CVDD is charged over the threshold voltage
time
of the internal shunt regulator, the shunt regulator is
turned on and regulates VDD with the trigger voltage.
Active ZVS activated
CPH
6V
5V
Automatic
Shutdown
When VS is changing from high to low state, CCP is
3V
2V
discharged through Dp2, shown as path (2) in Figure 26.
These charging/discharging operations are continued
until FAN7711 is halted by shutdown operation. The
charging current, I, must be large enough to supply the
operating current of FAN7711.
time
Running mode
Active ZVS mode
OUT
0V
time
The supply for the high-side gate driver is provided by
the boot-strap technique, as illustrated in Figure 26.
When the low-side MOSFET connected between VS and
Shutdown
mode
Preheating period
(Filament warm-up)
Ignition period
FAN7711 Rev. 1.00
GND pins is turned on, the charging current for VB flows
through DB. Every low VS gives the chance to charge the
CB. Therefore CB voltage builds up only when FAN7711
operates normally.
Figure 24. CPH Voltage Variation in Open-Lamp
Condition
© 2007 Fairchild Semiconductor Corporation
FAN7711 Rev. 1.0.3
www.fairchildsemi.com
11
When VS goes high, the diode DB is reverse-biased and
CB supplies the current to the high-side driver. At this
time, since CB discharges, VB-VS voltage decreases. If
VB-VS goes below VHSTH(ST-), the high-side driver
cannot operate due to the high-side UVLO protection
circuit. CB must be chosen to be large enough not to fall
into UVLO range due to the discharge during a half of
the oscillation period, especially when the high-side
MOSFET is turned on.
Bootstrap circuit
DB
VDC
Rstart
FAN7711
VDD
RT
VB
HO
VS
CB
+
LCC resonant tank
Shunt
regulator
CVDD
Charging path
CS Filament Open
L
CPH
GND
RL
CP
LO
equivalent lamp impedance
CCP
Dp1
Dp2
FAN7711 Rev. 1.00
Charge Pump
Figure 26. Implementation of Floating Power Supply
Using the Bootstrap Method
© 2007 Fairchild Semiconductor Corporation
FAN7711 Rev. 1.0.3
www.fairchildsemi.com
12
Design Guide
If Rstart meets Equation 14, restart operation is possible.
However, it is not recommended to choose Rstart at that
range because VDD rising time could be long and it
1. Start-up Circuit
The start-up current (IST) is supplied to the IC through
the start-up resistor, Rstart. Once operation starts, the
increases the lamp's turn-on delay time, as depicted in
Figure 27.
power is supplied by the charge pump circuit. To reduce
the power dissipation in Rstart, select Rstart as high as
possible, considering the current requirements at start-
up. For 220VAC power, the rectified voltage by the full-
VDD
VCL
VDDTH(ST+)
wave rectifier makes DC voltage, as shown in Equation
8. The voltage contains lots of AC component due to
poor regulation characteristic of the simple full-wave
rectifier:
VDDTH(ST-)
tstart
VDC
= 2 × 220[V] ≅ 311[V]
(EQ 8)
Considering the selected parameters, Rstart must satisfy
the following equation:
0
time
FAN7711 Rev. 1.00
Figure 27. VDD Build-up
VDC −VDDTH(ST +)
(EQ 9)
> IST
R start
Figure 28 shows the equivalent circuit for estimating
tstart. From the circuit analysis, VDD variation versus time
From Equation 9, Rstart is selected as:
is given by:
VDC −VDDTH(ST +)
(EQ 10)
> R start
start ⋅CVDD
)
VDD (t) = V − Rstart ⋅IST 1 − e−t /(R
(EQ 15)
(
)
(
)
IST
DC
Note that if choosing the maximum Rstart, it takes long
time for VDD to reach VDDTH(st+). Considering VDD rising
time, Rstart must be selected as shown in Figure 30.
where CVDD is the total capacitance of the bypass
capacitors connected between VDD and GND.
From Equation 15, it is possible to calculate tstart by
Another important concern for choosing Rstart is the
substituting VDD(t) with VDDTH(ST+)
:
available power rating of Rstart. To use a commercially
VDC − Rstart ⋅IST −VDDTH(ST +)
VDD − Rstart ⋅IST
available, low-cost 1/4Ω resistor, Rstart must obey the
following rule:
(EQ 16)
tstart = −Rstart ⋅CVDD ⋅ln
2
In general, Equation 16 can be simplified as:
V
(
− VCL
)
1
4
DC
(EQ 11)
<
[W ]
Rstart
Rstart ⋅CVDD ⋅VDDTH(ST +)
tstart
≈
(EQ 17)
VDC − Rstart ⋅IST −VDDTH(ST +)
Assuming VDC=311V and VCL=15V, the minimum
resistance of Rstart is about 350kΩ.
Accordingly, tstart can be controlled by adjusting the
value of Rstart and CVDD. For example, if VDC=311V,
When the IC operates in shutdown mode due to thermal
protection, open-lamp protection, or hard-switching
protection, the IC consumes shutdown current, ISD
Rstart=560k, CVDD=10µF, Ist=120µA, and VDDTH(ST+)
13.5V, tstart is about 0.33s.
=
,
which is larger than IST. To prevent restart during this
mode, Rstart must be selected to cover ISD current
consumption. The following equation must be satisfied:
VDC −VDDTH(ST +)
Rstart
IST
(EQ 12)
> R start
ISD
VDD
From Equations 10 - 12; it is possible to select Rstart
:
RT
(1) For safe start-up without restart in shutdown mode:
CVDD
CPH
VDC −VDDTH(ST +)
2
4 V −VCL < Rstart
<
(
)
(EQ 13)
DC
ISD
GND
(2) For safe start-up with restart from shutdown mode:
FAN7711 Rev. 1.00
VDC −VDDTH(ST +)
VDC −VDDTH(ST +)
< Rstart
<
(EQ 14)
ISD
IST
Figure 28. Equivalent Circuit During Start
© 2007 Fairchild Semiconductor Corporation
FAN7711 Rev. 1.0.3
www.fairchildsemi.com
13
2. Current Supplied by Charge Pump
3. Lamp Turn-on Time
For the IC supply, the charge pump method is used in
Figure 29. Since CCP is connected to the half-bridge
The turn-on time of the lamp is determined by supply
build-up time tstart, preheating time, and ignition time;
output, the supplied current by CCP to the IC is
determined by the output voltage of the half-bridge.
where tstart has been obtained by Equation 17. When the
IC's supply voltage exceeds VDDTH(ST+) after turn-on or
restart, the IC operates in preheating mode. This
operation continues until CPH pin's voltage reaches ~3V.
In this mode, CPH capacitor is charged by IPH current,
When the half-bridge output shows rising slope, CCP is
charged and the charging current is supplied to the IC.
The current can be estimated as:
as depicted in Figure 30. The preheating time is
achieved by calculating:
VDC
DT
dV
dt
I = CCP
≈ CCP
(EQ 18)
CPH
where DT is the dead time and dV/dt is the voltage
variation of the half-bridge output.
tpreheat = 3
(EQ 21)
IPH
When the half-bridge shows falling slope, CCP is
discharged through Dp2. Total supplied current, Itotal, to
the IC during switching period, t, is:
The preheating time is related to lamp life (especially
filament); therefore, the characteristics of a given lamp
should be considered when choosing the time.
Itotal = I ⋅DT = CCP ⋅VDC
(EQ 19)
VDD
From Equation 19, the average current, Iavg, supplied to
the IC is obtained by:
RT
IPH
CPH
Itotal CCP ⋅VDC
CPH
GND
Iavg
=
=
= CCP ⋅VDC ⋅f
(EQ 20)
t
t
FAN7711 Rev. 1.00
For the stable operation, Iavg must be higher than the
required current. If Iavg exceeds the required current, the
Figure 30. Preheating Timer
residual current flows through the shunt regulator
implemented on the chip, which can cause unwanted
heat generation. Therefore, CCP must be selected
Compared to the preheating time, it is almost impossible
to exactly predict the ignition time, whose definition is the
time from the end of the preheating time to ignition. In
general, the lamp ignites during the ignition mode.
Therefore, assume that the maximum ignition time is the
same as the duration of ignition mode, from 3V until CPH
reaches 5V. Thus, ignition time can be defined as:
considering stable operation and thermal generation.
For example, if CCP=0.5nF, VDC=311V, and f=50kHz, Iavg
is ~7.8mA; it is enough current for stable operation.
CPH
IIG
CPH
IIG
tignition = (5 − 3)
= 2
(EQ 22)
Discharging mode
Charging mode
CCP
CCP
Dp1
To VDD
Dp1
To VDD
Idp1=0
Idp1
CVDD
Note that, at ignition mode, CPH is charged by IIG, which
is six times larger than IPH. Consequently, total turn-on
time is approximately:
CVDD
Dp2
Dp2
f=1/t
VDC
VDD Build-Time + Preheating Time + Ignition Time =
DT:dead time
Half-bridge output
CPH
IIG
CPH
IIG
(EQ 23)
tignition = (5 − 3)
= 2
[Sec.]
Idp1
FAN7711 Rev. 1.00
Figure 29. Charge Pump Operation
© 2007 Fairchild Semiconductor Corporation
FAN7711 Rev. 1.0.3
www.fairchildsemi.com
14
4. PCB Guideline
Component selection and placement on PCB is important
In addition, the ground return path of the timing
components (CPH, RT) and VDD decoupling capacitor
when using power control ICs. Bypass the V
to GND
CC
as close to the IC terminals as possible with a low-ESR/
ESL capacitor, as shown in Figure 31. This bypassed
should be connected directly to the IC GND lead and not
via separate traces or jumpers to other ground traces on
the board. These connection techniques prevent high-
current ground loops from interfering with sensitive
timing component operations and allow the control circuit
to reduce common-mode noise due to output switching.
capacitor (C ) can reduce the noise from the power
BP
supply parts, such as start-up resistor and charge pump.
The signal GND must be separated from the power
GND. So, the signal GND should be directly connected
to the rectify capacitor using an individual PCB trace.
HOT
Cbp
RT
Cph
One point SGND
SGND
PGND
Figure 31. Preheating Timer
© 2007 Fairchild Semiconductor Corporation
FAN7711 Rev. 1.0.3
www.fairchildsemi.com
15
Typical Application Diagram
Rectified
Waveform
D5
VDC
L2
D6
ZD1
C6
R1
D7
R3
INV
R10
R11
D1
D2
FUSE
NTC
R4
D8
R5
VCC
OUT
GND
ZCD
1
2
3
4
8
7
6
5
R2
C3
C4
C5
L1
AC
INP U T
COMP
MOT
CS
TNR
C1
C2
M1
C11
R12
R13
R8
R6
C8
R7
D3
D4
C7
C9
C10
R9
Rectified
Waveform
L3
C55
D50
R50
D51
R51
R52
C56
Lamp
VDD
VB
HO
VS
1
8
7
6
5
C54
RT
C53
D52
2
3
4
M2
M3
R54
R56
L4
C57
R55
R57
CPH
GND
R53
C52
LO
C51
C50
C58
Lamp
FAN7711 Rev. 1.00
Figure 32. Application Circuit of 32W Two Lamps
© 2007 Fairchild Semiconductor Corporation
FAN7711 Rev. 1.0.3
www.fairchildsemi.com
16
Component List for 32W Two Lamps
Part
Value
Resistor
Note
Part
C55
C56
C57
C58
Value
Note
15nF/630V
2.7nF/1kV
15nF/630V
2.7nF/1kV
Miller Capacitor
Miller Capacitor
Miller Capacitor
Miller Capacitor
R1
R2
330kΩ
750kΩ
100Ω
20kΩ
47Ω
1/2W
1/4W
1/2W
1/4W
1/4W
1/4W
1/4W
1/4W
1W
R3
R4
Diode
R5
D1
D2
1N4007
1N4007
1N4007
1N4007
UF4007
UF4007
1N4148
1N4148
UF4007
UF4007
UF4007
IN4746A
1kV,1A
1kV,1A
R6
10kΩ
50kΩ
47kΩ
0.3Ω
R7
D3
1kV,1A
R8
D4
1kV,1A
R9
D5
Ultra Fast,1kV,1A
Ultra Fast,1kV,1A
100V,1A
R10
R11
R12
R13
R50
R51
R52
R53
R54
R55
R56
R57
R58
1MΩ
1/4W
1/4W
1/4W,1%
2W
D6
1MΩ
D7
12.6kΩ
220kΩ
150kΩ
150kΩ
150kΩ
90kΩ
10Ω
D8
100V,1A
D50
D51
D52
ZD1
Ultra Fast,1kV,1A
Ultra Fast,1kV,1A
Ultra Fast,1kV,1A
Zener 18V, 1W
1/4W
1/4W
1/4W
1/4W,1%
1/4W
1/4W
1/4W
1/4W
1/4W
MOSFET
M1
M2
M3
FQPF5N60C
FQPF5N50C
FQPF5N50C
500V,6A
500V,5A
500V,5A
47Ω
47kΩ
47Ω
Fuse
47kΩ
Fuse
TNR
3A/250V
471
Capacitor
TNR
NTC
C1
C2
47nF/275VAC
150nF/275VAC
2200pF/3kV
2200pF/3kV
0.22µF/630V
12nF/50V
Box Capacitor
Box Capacitor
C3
Ceramic Capacitor
Ceramic Capacitor
Miller Capacitor
C4
NTC
LF1
L1
10D-09
C5
Line Filter
40mH
Transformer
0.94mH(75T:10T)
Inductor
3.2mH(130T)
3.2mH(130T)
IC
C6
Ceramic Capacitor
Electrolytic Capacitor
Ceramic Capacitor
Ceramic Capacitor
Ceramic Capacitor
Electrolytic Capacitor
Electrolytic Capacitor
Ceramic Capacitor
Ceramic Capacitor,5%
Ceramic Capacitor
Ceramic Capacitor
C7
22µF/50V
C8
39pF/50V
EI2820
C9
1µF/50V
C10
C11
C50
C51
C52
C53
C54
0.1µF/50V
47µF/450V
10µF/50V
L2
L3
EI2820
EI2820
1µF/50V
U1
U2
FAN7711
FAN7529
Fairchild Semiconductor
Fairchild Semiconductor
0.47µF/25V
100nF/50V
470pF/1kV
© 2007 Fairchild Semiconductor Corporation
FAN7711 Rev. 1.0.3
www.fairchildsemi.com
17
Component List for 20W CFL
Part
Value
Resistor
Note
Part
Value
Note
Diode
R1
R2
R3
R4
R5
470kΩ
90kΩ
10Ω
1/4W
1/4W
1/4W
1/4W
1/4W
D1
D2
D3
D4
D5
D6
D7
1N4007
1N4007
1N4007
1N4007
UF4007
UF4007
UF4007
1kV/1A
1kV/1A
1kV/1A
47Ω
1kV/1A
47Ω
1kV/1A,Ultra Fast
1kV/1A,Ultra Fast
1kV/1A,Ultra Fast
Capacitor
C1
C2
C3
C4
C5
C6
C7
22µF/250V
10µF/50V
Electrolytic Capacitor
Electrolytic Capacitor
Miller Capacitor
Inductor
2.5mH (280T)
MOSFET
FQPF1N50C
FQPF1N50C
IC
L1
EE1616S
470nF/25V
100nF/25V
470pF/630V
33nF/630V
3.3nF/1kV
Miller Capacitor
Q1
Q2
500V,1A
500V,1A
Miller Capacitor
Miller Capacitor
Miller Capacitor
U1
FAN7711
Fairchild Semiconductor
Note:
3. Refer to the typical application circuit provided in Figure 1.
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN7711 Rev. 1.0.3
18
Package Dimensions
8-SOP
Dimensions are in millimeters unless otherwise noted.
Figure 33. 8-Lead Small Outline Package (SOP)
© 2007 Fairchild Semiconductor Corporation
FAN7711 Rev. 1.0.3
www.fairchildsemi.com
19
Package Dimensions
8-DIP
Dimensions are in inches and [millimeters] unless otherwise noted.
Figure 34. 8-Lead Dual In-Line Package (DIP)
© 2007 Fairchild Semiconductor Corporation
FAN7711 Rev. 1.0.3
www.fairchildsemi.com
20
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Preliminary
First Production
Full Production
Not In Production
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
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Obsolete
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
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This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I27
© 2007 Fairchild Semiconductor Corporation
FAN7711 Rev. 1.0.3
www.fairchildsemi.com
21
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