DTA144TM3 [ONSEMI]
Digital Transistors (BRT) R1 = 47 k, R2 = k; 数字晶体管（ BRT ） R1 = 47千欧， R2 = ？ K +
| 型号： | DTA144TM3 |
| 厂家： | 
ONSEMI |
| 描述： | Digital Transistors (BRT) R1 = 47 k, R2 = k |
| 文件： | 总6页 (文件大小：112K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MUN2140, DTA144TM3
Digital Transistors (BRT)
R1 = 47 kW, R2 = 8 kW
PNP Transistors with Monolithic Bias
Resistor Network
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PIN CONNECTIONS
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a base−
emitter resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space.
PIN 3
COLLECTOR
(OUTPUT)
PIN 1
BASE
(INPUT)
R1
R2
PIN 2
EMITTER
(GROUND)
Features
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
MARKING DIAGRAMS
• S and NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC-Q101 Qualified
and PPAP Capable
SC−59
CASE 318D
STYLE 1
XX MG
G
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
1
Compliant
SOT−723
CASE 631AA
STYLE 1
MAXIMUM RATINGS (T = 25°C)
XX M
A
1
Rating
Collector−Base Voltage
Collector−Emitter Voltage
Collector Current − Continuous
Input Forward Voltage
Symbol
Max
50
Unit
Vdc
XXX
M
G
= Specific Device Code
V
V
CBO
CEO
=
=
Date Code*
50
Vdc
Pb−Free Package
I
C
100
40
mAdc
Vdc
(Note: Microdot may be in either location)
V
IN(fwd)
*Date Code orientation may vary depending
upon manufacturing location.
Input Reverse Voltage
V
5
Vdc
IN(rev)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
See detailed ordering, marking, and shipping information in
the package dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
1
Publication Order Number:
September, 2012 − Rev. 1
DTA144T/D
MUN2140, DTA144TM3
Table 1. ORDERING INFORMATION
†
Device
MUN2140T1G
Part Marking
Package
Shipping
6T
6T
SC−59
3,000 / Tape & Reel
8,000 / Tape & Reel
DTA144TM3T5G
SOT−723
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
300
250
200
(1) SC−59; Minimum Pad
(1) (2)
(2) SOT−723; Minimum Pad
150
100
50
0
−50 −25
0
25
50
75
100
125 150
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
Table 2. THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
THERMAL CHARACTERISTICS (SC−59) (MUN2140)
Total Device Dissipation
P
D
T = 25°C
(Note 1)
230
338
1.8
2.7
mW
A
(Note 2)
(Note 1)
(Note 2)
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
R
540
370
°C/W
°C/W
°C
q
JA
Thermal Resistance,
Junction to Lead
(Note 1)
(Note 2)
R
264
287
q
JL
Junction and Storage Temperature Range
THERMAL CHARACTERISTICS (SOT−723) (DTA144TM3)
Total Device Dissipation
T , T
J
−55 to +150
stg
P
D
T = 25°C
A
(Note 1)
(Note 2)
(Note 1)
(Note 2)
260
600
2.0
4.8
mW
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
R
480
205
°C/W
°C
q
JA
Junction and Storage Temperature Range
T , T
J
−55 to +150
stg
1. FR−4 @ Minimum Pad.
2. FR−4 @ 1.0 x 1.0 Inch Pad.
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2
MUN2140, DTA144TM3
Table 3. ELECTRICAL CHARACTERISTICS (T = 25°C, unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector−Base Cutoff Current
I
I
nAdc
nAdc
mAdc
Vdc
CBO
(V = 50 V, I = 0)
−
−
−
−
−
−
−
100
500
0.2
−
CB
E
Collector−Emitter Cutoff Current
(V = 50 V, I = 0)
CEO
CE
B
Emitter−Base Cutoff Current
(V = 6.0 V, I = 0)
I
EBO
−
EB
C
Collector−Base Breakdown Voltage
(I = 10 mA, I = 0)
V
V
(BR)CBO
(BR)CEO
50
50
C
E
Collector−Emitter Breakdown Voltage (Note 3)
(I = 2.0 mA, I = 0)
Vdc
−
C
B
ON CHARACTERISTICS
DC Current Gain (Note 3)
h
FE
(I = 5.0 mA, V = 10 V)
120
−
250
−
−
0.25
−
C
CE
Collector−Emitter Saturation Voltage (Note 3)
(I = 10 mA, I = 1.0 mA)
V
Vdc
Vdc
Vdc
Vdc
Vdc
kW
CE(sat)
C
B
Input Voltage (off)
(V = 5.0 V, I = 100 mA)
V
V
i(off)
−
0.6
1.7
−
CE
C
Input Voltage (on)
(V = 0.2 V, I = 5.0 mA)
i(on)
−
−
CE
C
Output Voltage (on)
(V = 5.0 V, V = 3.5 V, R = 1.0 kW)
V
OL
−
0.2
CC
B
L
Output Voltage (off)
V
OH
(V = 5.0 V, V = 0.25 V, R = 1.0 kW)
4.9
32.9
−
−
47
−
−
61.1
−
CC
B
L
Input Resistor
R1
R /R
Resistor Ratio
1
2
3. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%.
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3
MUN2140, DTA144TM3
TYPICAL CHARACTERISTICS − MUN2140, DTA144TM3
10
1
1000
I /I = 10
150°C
C
B
25°C
100
−55°C
25°C
150°C
10
1
0.1
V
= 10 V
CE
−55°C
0.01
0
10
20
30
40
50
1
10
100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 2. VCE(sat) vs. IC
Figure 3. DC Current Gain
10
9
100
10
150°C
−55°C
f = 10 kHz
= 0 A
T = 25°C
A
I
E
8
7
25°C
6
1
5
4
0.1
3
2
0.01
V
= 5 V
24
O
1
0
0.001
0
10
20
30
40
50
0
4
8
12
16
20
28
V , REVERSE VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 4. Output Capacitance
Figure 5. Output Current vs. Input Voltage
100
−55°C
25°C
10
1
150°C
V
= 0.2 V
O
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 6. Input Voltage vs. Output Current
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4
MUN2140, DTA144TM3
PACKAGE DIMENSIONS
SC−59
CASE 318D−04
ISSUE H
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
MILLIMETERS
INCHES
NOM
3
DIM
A
A1
b
c
D
E
e
L
MIN
1.00
0.01
0.35
0.09
2.70
1.30
1.70
0.20
2.50
NOM
1.15
0.06
0.43
0.14
2.90
1.50
1.90
0.40
2.80
MAX
1.30
0.10
0.50
0.18
3.10
1.70
2.10
0.60
3.00
MIN
MAX
0.051
0.004
0.020
0.007
0.122
0.067
0.083
0.024
0.118
E
0.039
0.001
0.014
0.003
0.106
0.051
0.067
0.008
0.099
0.045
0.002
0.017
0.005
0.114
0.059
0.075
0.016
0.110
H
E
1
2
b
e
H
E
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
C
A
L
A1
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
2.4
0.094
1.0
0.039
0.8
0.031
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
MUN2140, DTA144TM3
PACKAGE DIMENSIONS
SOT−723
CASE 631AA
ISSUE D
NOTES:
−X−
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
D
A
b1
−Y−
3
E
HE
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
1
2
MILLIMETERS
2X b
C
DIM MIN
NOM
0.50
0.21
0.31
0.12
1.20
0.80
MAX
0.55
0.27
0.37
0.17
1.25
0.85
2X e
0.08 X Y
A
b
0.45
0.15
0.25
0.07
1.15
0.75
SIDE VIEW
TOP VIEW
b1
C
3X
L
D
1
E
0.40 BSC
1.20
0.29 REF
0.20
e
H E
L
1.15
0.15
1.25
0.25
L2
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
3X
L2
BOTTOM VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
2X
0.40
2X 0.27
PACKAGE
OUTLINE
1.50
3X 0.52
0.36
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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DTA144T/D
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