CAT706VI-GT3 [ONSEMI]

uP Supervisory Circuits; U& P监控电路
CAT706VI-GT3
型号: CAT706VI-GT3
厂家: ONSEMI    ONSEMI
描述:

uP Supervisory Circuits
U& P监控电路

电源电路 电源管理电路 光电二极管 监控 输入元件
文件: 总12页 (文件大小:137K)
中文:  中文翻译
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CAT705, CAT706, CAT813  
mP Supervisory Circuits  
Description  
The CAT705, CAT706, and CAT813 provide reset and monitoring  
functions for the electronic systems. Each device monitors the system  
voltage and maintains a reset output until that voltage reaches the  
device’s specified trip value and then maintains the reset output active  
condition until the device’s internal timer allows the system power  
supply to stabilize.  
http://onsemi.com  
The devices have a watchdog input which can be used to monitor a  
system signal and causes WDO to go low if the signal fails to change  
state prior to a timeout condition.  
The supervisory circuits provide a MR input which initiates a reset if  
pulled low. The CAT705 and CAT706 provide an active low RESET  
output. The CAT813 provides an active high RESET output.  
There is a secondary supply monitor (PFI) included for powerfail  
warning.  
SOIC8  
V SUFFIX  
CASE 751BD  
MSOP8  
Z SUFFIX  
CASE 846AD  
PIN CONFIGURATIONS AND  
MARKING DIAGRAMS  
Features  
SOIC8 (V) (Top View)  
1
Reset Guaranteed Valid for 1.0 V V  
CC  
WDO  
RESET *  
WDI  
MR  
6 mA Supply Current  
V
CC  
200 ms Reset Pulse Width  
GND  
PFO  
PFI  
Watchdog Timer Function 1.6 s Timeout  
Accurate Brownout Detection Reset in 3.0, 3.6, and 5.0 Volt Systems  
Secondary Low Supply Monitoring on PFI Input  
Pin and Function Compatible with the  
MAX705/MAX706/MAX813L Products  
Operating Range from 40°C to +85°C  
SOIC 8lead and MSOP 8lead Packages  
These Devices are PbFree, Halogen Free/BFR Free and are RoHS  
Compliant  
L
4
A
= Assembly Location Code  
= Lead Finish NiPdAu  
= Product Revision: Fixed as “A”  
CATxxxV = Specific Device Code  
= (CAT705V = CAT705 SOIC)  
= (CAT706V = CAT706 SOIC)  
= (CAT813V = CAT813 SOIC)  
I
Y
M
= Temperature Range (I = Industrial)  
= Production Year (Last Digit)  
= Production Month (19, O, N, D)  
ALND = Last Four Assembly Lot Number Digits  
Typical Applications  
MSOP8 (Z) (Top View)  
1
Microprocessor and Microcontroller Based Systems  
Instrument and Control Systems  
Portable Equipment  
WDI  
PFO  
PFI  
RESET *  
WDO  
MR  
GND  
V
CC  
ABRx = Specific Device Code  
= (ABRT = CAT705 MSOP)  
= (ABRT = CAT706 MSOP)  
= (ABRS = CAT813 MSOP)  
Y
M
Z
= Production Year (Last Digit)  
= Production Month (19, O, N, D)  
= Product Revision  
(* RESET for CAT813)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 12 of this data sheet.  
© Semiconductor Components Industries, LLC, 2012  
1
Publication Order Number:  
April, 2012 Rev. 7  
CAT705/D  
CAT705, CAT706, CAT813  
V
CC  
R
MR  
= 60 kW  
MR  
RESET  
RESET  
(RESET for CAT813)  
CONTROLLER  
+
V
CC  
V
TIMER  
RST  
WATCHDOG  
TRANSITION  
DETECTION  
WATCHDOG  
TIMER  
WDI  
PFI  
WDO  
PFO  
+
1.25 V  
Figure 1. Functional Block Diagram  
Device  
CAT705  
CAT706  
CAT813  
RESET  
RESET  
MR  
x
WDI  
WDO  
PFI  
@ 4.65 V  
x
x
x
x
x
x
x
@ 1.25 V  
@ 1.25 V  
@ 1.25 V  
x
@ 4.65 V  
x
http://onsemi.com  
2
CAT705, CAT706, CAT813  
Table 1. PIN FUNCTION DESCRIPTION  
Pin Name  
Function  
MR  
Manual Reset Input  
Power Supply  
Ground  
V
CC  
GND  
PFI  
Power Fail voltage monitor Input  
PFO  
Power Fail Output  
WDI  
Watchdog Timer Input  
RESET  
RESET  
WDO  
CMOS PushPull Active Low Reset Output (CAT705 & CAT706)  
CMOS PushPull Active High Reset Output (CAT813)  
Watchdog Timer Output  
Table 2. ABSOLUTE MAXIMUM RATINGS  
Parameters  
Ratings  
Units  
V
Supply Voltage  
6.5  
All other pins  
0.3 to (V + 0.3)  
V
CC  
Output Current RESET, RESET, WDO  
20  
mA  
mW  
Continuous Power Dissipations (T = +70°C)  
A
SOIC 8lead (derate 5.9 mW/°C above +70°C)  
471  
330  
MSOP 8lead (derate 4.1 mW/°C above +70°C)  
Storage Temperature  
65 to 150  
+300  
°C  
°C  
V
Lead Soldering (10 seconds max)  
ESD Rating: Human Body Model  
ESD Rating: Machine Model  
2000  
200  
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the  
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect  
device reliability.  
Table 3. RECOMMENDED OPERATING CONDITIONS  
Parameter  
Rating  
Unit  
V
V
CC  
(T = 40°C to +85°C)  
A
1.0 to 5.5  
All Other Pins  
0.1 to (V + 0.1)  
V
CC  
Ambient Temperature  
40 to +85  
°C  
http://onsemi.com  
3
CAT705, CAT706, CAT813  
Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Typical values at T = 25°C and V = 5 V for CAT705, CAT706 and  
A
CC  
CAT813 versions. V = 3.3 V for the CAT706 T/S versions; V = 3.0 V for the CAT706 R version.) (Note 1)  
CC  
CC  
Parameter  
Symbol  
Test Conditions  
Min  
Typ  
6
Max  
17  
Units  
mA  
Supply Current  
I
CAT705, CAT706, CAT813  
CAT706 (R/S/T Versions)  
CAT705 & CAT813 at  
CC  
4
12  
mA  
Reset Threshold  
V
4.50  
4.65  
4.75  
V
RST  
40°C T +85°C  
A
CAT706 at 40°C T +85°C  
4.25  
3.00  
2.85  
2.55  
4.40  
3.08  
2.93  
2.63  
40  
4.50  
3.15  
3.00  
2.70  
V
V
A
CAT706T at 40°C T +85°C  
A
CAT706S at 40°C T +85°C  
V
A
CAT706R at 40°C T +85°C  
V
A
Reset Threshold Tempco (Note 1)  
ppm/°C  
mV  
mV  
ms  
Reset Threshold Hysteresis  
(Note 1)  
CAT705 & CAT813  
CAT706  
10  
5
V
to Reset Delay (Note 2)  
t
V
= V to (V – 100 mV)  
20  
CC  
RD  
CC  
TH  
TH  
Reset Active Timeout Period  
RESET Output High Voltage  
t
140  
200  
400  
ms  
V
RP  
V
CAT705 & CAT706, 4.5 V < V  
<
<
V
CC  
OH  
CC  
5.5 V, I  
= 800 mA  
1.5 V  
SOURCE  
CAT705 & CAT706, V  
<
0.8 x V  
CC  
RST (max)  
= 500 mA  
V
< 3.6 V, I  
CC  
SOURCE  
RESET Output Low Voltage  
V
CAT705 & CAT706, 4.5 V < V  
0.4  
0.3  
0.3  
V
OL  
CC  
5.5 V, I  
= 3.2 mA  
SINK  
CAT705 & CAT706, V  
<
RST (max)  
V
< 3.6 V, I  
= 1.2 mA  
CC  
SINK  
CAT705 &CAT706, V = 1 V,  
CC  
I
= 100 mA  
SINK  
RESET Output High Voltage  
RESET Output Low Voltage  
V
CAT813, V = V  
SOURCE  
,
,
V −  
CC  
V
V
OH  
CC  
RST max  
I
= 120 mA  
1.5 V  
CAT813, V = V  
SOURCE  
0.8 x V  
CC  
RST max  
CC  
I
= 30 mA  
V
CAT813, V = V ,  
RST min  
0.4  
0.3  
OL  
CC  
= 3.2 mA  
I
SINK  
CAT813, V = 1.2 V,  
CC  
= 100 mA  
I
SINK  
WATCHDOG INPUT  
Watchdog Timeout Period  
WDI Pulse Width  
t
1.00  
50  
1.6  
2.25  
0.3 x V  
150  
s
ns  
V
WD  
t
V = 0.4 V, V = 0.8 x V  
IL IH CC  
WP  
WDI Input Voltage (Note 3)  
V
IL  
CC  
V
0.7 x V  
IH  
CC  
WDI Input Current (Note 3)  
WDI = V , Time Average  
50  
mA  
CC  
WDI = 0 V, Time Average  
150  
50  
1. Limits are guaranteed by design and not production tested.  
2. The RESET shortcircuit current is the maximum pullup current when reset is driven low by a bidirectional output.  
3. WDI is internally serviced within the watchdog period if WDI is left open.  
4. RESET for CAT705 & CAT706 & RESET for CAT813.  
5. Not 100% tested but guaranteed by design.  
http://onsemi.com  
4
 
CAT705, CAT706, CAT813  
Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Typical values at T = 25°C and V = 5 V for CAT705, CAT706 and  
A
CC  
CAT813 versions. V = 3.3 V for the CAT706 T/S versions; V = 3.0 V for the CAT706 R version.) (Note 1)  
CC  
CC  
Parameter  
Symbol  
Test Conditions  
Min  
Typ  
Max  
Units  
WATCHDOG INPUT  
WDO Output Voltage  
V
V
< V < 3.6 V;  
0.8 x V  
CC  
V
W_OH  
RST (max)  
CC  
I
= 500 mA  
SOURCE  
4.5 V < V < 5.5 V,  
SOURCE  
V
– 1.5  
V
– 0.25  
CC  
CC  
CC  
I
= 800 mA  
V
V
SINK  
< V < 3.6 V,  
0.3  
0.4  
W_OL  
WDSU  
RST (max)  
CC  
I
= +500 mA  
4.5 V < V < 5.5 V,  
0.1  
CC  
= 1.2 mA  
I
SINK  
WDO to WDI setup time (Note 5)  
MANUAL RESET INPUT  
MR Input Voltage  
t
250  
ns  
V
V
0.3 x V  
140  
IL  
CC  
V
0.7 x V  
IH  
CC  
MR Pullup Current  
MR Pulse Width  
MR = 0 V  
40  
1
70  
60  
mA  
ms  
t
PB  
MR Pullup Resistance  
MR low to Reset Delay (Note 4)  
POWERFAIL INPUT  
PFI Input Threshold  
PFI Input Current  
R
MR  
40  
80  
5
kW  
ms  
t
PDLY  
V
= 5 V  
1.2  
1.25  
0.01  
1.3  
25  
V
nA  
V
CC  
25  
PFO Output Voltage  
V
V
< V < 3.6 V,  
0.8 x V  
CC  
P_OH  
RST(max)  
CC  
I
= 500 mA  
SOURCE  
4.5 V < V < 5.5 V,  
SOURCE  
V
CC  
1.5  
0.4  
0.3  
0.4  
CC  
I
= 800 mA  
V
V
SINK  
< V < 3.6 V,  
RST (max) CC  
P_OL  
I
= +1.2 mA  
4.5 V < V < 5.5 V, I  
= 3.2 mA  
CC  
SINK  
1. Limits are guaranteed by design and not production tested.  
2. The RESET shortcircuit current is the maximum pullup current when reset is driven low by a bidirectional output.  
3. WDI is internally serviced within the watchdog period if WDI is left open.  
4. RESET for CAT705 & CAT706 & RESET for CAT813.  
5. Not 100% tested but guaranteed by design.  
http://onsemi.com  
5
 
CAT705, CAT706, CAT813  
TYPICAL PERFORMANCE CHARACTERISTICS  
9
8
7
6
5
4
3
1.06  
1.04  
1.02  
1.00  
0.98  
0.96  
0.94  
2
1
40 20  
0
20  
40  
60  
80  
100  
120  
40  
20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 2. VCC Supply Current vs. Temperature  
Figure 3. Normalized Reset Threshold Voltage  
vs. Temperature  
FUNCTIONAL DESCRIPTION  
Processor Reset  
Manual Reset  
The CAT705, CAT706 & CAT813 detect supply voltage  
The CAT705, CAT706 & CAT813 each have a Manual  
Reset (MR) input to allow for alternative control of the reset  
outputs. The MR input is designed for direct connection to  
a pushbutton (see Figure 4). The MR input is internally  
pulled up by 60 kW resistor and must be pulled low to cause  
the reset output to go active. Internally, this input is  
debounced and timed such that RESET (or RESET) signals  
of at least 140 ms minimum will be generated. The min  
(V ) conditions that are below the specified voltage trip  
CC  
value (V ) and provide a reset output to maintain correct  
RST  
system operation. On powerup, RESET (or RESET for the  
CAT813) are kept active for a minimum delay t of 140 ms  
RP  
after the supply voltage (V ) rises above V  
to allow the  
CC  
RST  
power supply and processor to stabilize. When V drops  
CC  
below the voltage trip value (V ), the reset output signals  
RST  
RESET (or RESET) are pulled active. RESET (or RESET)  
is specifically designed to provide the reset input signals for  
processors. This provides reliable and consistent operation  
as power is turned on, off or during brownout conditions by  
maintaining the processor operation in known conditions.  
140 ms t delay commences as the Manual Reset input is  
released from the low level. (see Figure 5).  
RP  
MR  
WDO  
V
RESET/RESET  
WDI  
CC  
CAT705  
CAT706  
CAT813  
GND  
PFI  
PFO  
Figure 4. Pushbutton RESET  
t
PB  
MR  
t
PDLY  
V
IH  
V
IL  
t
RP  
RESET  
RESET  
V
OH  
V
OL  
Figure 5. Timing Diagram – Pushbutton RESET  
http://onsemi.com  
6
 
CAT705, CAT706, CAT813  
WATCHDOG TIMER  
The CAT705, CAT706, & CAT813 provide a Watchdog  
used to strobe the watchdog input. The most reliable is a  
dedicated I/O output transitioned by a specific software  
instruction.  
input (WDI). The watchdog timer function controls the  
watchdog output (WDO) signal and forces the WDO to be  
low (active) when the WDI input does not have a transition  
from lowtohigh or hightolow within 1.6 s typical. If a  
transition occurs on the WDI input pin prior to the watchdog  
timeout, the watchdog timer is restarted. The timing  
diagram is shown in Figure 6. The watchdog timer starts as  
soon as reset condition becomes inactive.  
The watchdog can be disabled by floating (or tristating)  
the WDI input (see Figure 8). If the watchdog is disabled the  
th  
WDI pin will be pulled low for the first 7/8 ’s of the  
th  
watchdog period (t ) and pulled high for the last 1/8 of  
WD  
the watchdog period. This pulling low of the WDI input and  
then high is used to detect an open or tristate condition and  
will continue to repeat until the WDI input is driven high or  
low.  
For most efficient operation of devices with the watchdog  
function the WDI input should be held low the majority of  
the time and only strobed high as required to reset the  
watchdog timer.  
When the V supply drops below the reset threshold, the  
CC  
WDO output becomes active and goes low independently of  
the watchdog timing stage.  
Figure 7 below shows a typical implementation of a  
watchdog function. Any processor signal that repeats  
dependant on the normal operation of the processor or  
directed by the software operating on the processor can be  
t
t
WDSU  
WP  
t
t
t
WD  
WD  
WD  
+5 V  
0 V  
WDI  
WDO  
+5 V  
0 V  
+5 V  
0 V  
RESET  
RESET EXTERNALLY  
TRIGGERED BY MR  
t
RS  
+5 V  
0 V  
(RESET)  
(() Are for CAT813 Only)  
Figure 6. Watchdog Timing Diagram  
PIC  
mC  
MR  
WDO  
ADDRESS  
DECODER  
MCLR  
V
RESET/RESET  
WDI  
CC  
GND  
PFI  
CAT705  
CAT706  
CAT813  
PFO  
Figure 7. Watchdog Timer Circuit  
http://onsemi.com  
7
 
CAT705, CAT706, CAT813  
V
Tristate  
CC  
MR  
WDO  
mC  
V
RESET/RESET  
CC  
150 kW  
CAT705  
CAT706  
CAT813  
GND  
PFI  
WDI  
PFO  
OUTPUT  
110 kW  
Figure 8. Watchdog Disable Circuit  
V
CC  
V
(MAX)  
RST  
V
RST  
V
(MIN)  
RST  
t
RD  
RESET (CAT705 & CAT706)  
V
RESET Slews with V  
OH  
CC  
V
RESET (CAT813)  
OL  
Figure 9. Timing Diagram – Power Down  
V
(MAX)  
RST  
V
RST  
V
(MIN)  
RST  
V
CC  
t
RP  
RESET (CAT705 & CAT706)  
V
OH  
V
OL  
RESET (CAT813)  
Figure 10. Timing Diagram – Power Up  
http://onsemi.com  
8
CAT705, CAT706, CAT813  
APPLICATION NOTES  
mP’s with Bidirectional Reset Pins  
These issues can usually be remedied by the proper location  
of bypass capacitance on the circuit board.  
The RESET output can be pulled low by processors like  
the 68HC11 allowing for a system reset issued by the  
processor. The maximum pullup current that can be sourced  
by the CAT705 & CAT706 1.5 mA (and by the CAT706  
T/R/S is 800 mA) allowing the processor to pull the output  
low even when the CAT70x is pulling it high.  
Output Valid Conditions  
The RESET output uses a pushpull output which can  
maintain a valid output down to a V of 1.0 volts. To sink  
CC  
current below 0.8 V a resistor can be connected from  
RESET to Ground (see Figure 11.) This arrangement will  
maintain a valid value on the RESET output during both  
power up and down but will draw current when the RESET  
output is in the high state. A resistor value of about 100 kW  
should be adequate in most situations to maintain a low  
Power Transients  
Generally short duration negativegoing transients of less  
than 2 ms on the power supply at V  
minimum will not  
RST  
cause a reset condition. However the lower the voltage of the  
transient the shorter the required time to cause a reset output.  
condition valid output down to V equal to 1.0 V.  
CC  
mC  
MR  
WDO  
V
RESET/RESET  
CC  
RESET/RESET  
CAT705  
CAT706  
CAT813  
GND  
PFI  
WDI  
PFO  
100 kW  
Figure 11. RESET Valid for VCC < 1.0 V  
5 V  
Push Switch  
mC  
VCC  
NMI  
WDO  
MR  
UNREGULATED DC  
V
RESET/RESET  
WDI  
CC  
RESET/RESET  
CAT705  
CAT706  
CAT813  
GND  
PFI  
I/O LINE  
PFO  
INTERRUPT  
Figure 12. Typical Operating Circuit  
http://onsemi.com  
9
 
CAT705, CAT706, CAT813  
PACKAGE DIMENSIONS  
SOIC 8, 150 mils  
CASE 751BD01  
ISSUE O  
SYMBOL  
MIN  
NOM  
MAX  
1.35  
A
1.75  
A1  
b
0.10  
0.33  
0.19  
4.80  
5.80  
3.80  
0.25  
0.51  
0.25  
5.00  
6.20  
4.00  
c
E1  
E
D
E
E1  
e
1.27 BSC  
h
0.25  
0.40  
0º  
0.50  
1.27  
8º  
L
PIN # 1  
IDENTIFICATION  
θ
TOP VIEW  
D
h
A1  
θ
A
c
e
b
L
SIDE VIEW  
END VIEW  
Notes:  
(1) All dimensions are in millimeters. Angles in degrees.  
(2) Complies with JEDEC MS-012.  
http://onsemi.com  
10  
CAT705, CAT706, CAT813  
PACKAGE DIMENSIONS  
MSOP 8, 3x3  
CASE 846AD01  
ISSUE O  
SYMBOL  
MIN  
NOM  
MAX  
A
A1  
A2  
b
1.10  
0.15  
0.95  
0.38  
0.23  
3.10  
5.00  
3.10  
0.05  
0.75  
0.22  
0.13  
2.90  
4.80  
2.90  
0.10  
0.85  
c
D
3.00  
4.90  
E
E1  
E
E1  
e
3.00  
0.65 BSC  
0.60  
L
0.40  
0.80  
L1  
L2  
θ
0.95 REF  
0.25 BSC  
0º  
6º  
TOP VIEW  
D
A2  
A
DETAIL A  
A1  
e
b
c
SIDE VIEW  
END VIEW  
q
L2  
Notes:  
L
(1) All dimensions are in millimeters. Angles in degrees.  
(2) Complies with JEDEC MO-187.  
L1  
DETAIL A  
http://onsemi.com  
11  
CAT705, CAT706, CAT813  
Example of Ordering Information (Notes 6 8)  
Quantity per  
Reel (Note 9)  
Order Number  
CAT705VIGT3  
CAT705ZIGT3  
Voltage  
Top Mark  
CAT705V  
ABRT  
Manual Reset  
Reset Output  
Package  
SOIC8  
MSOP8  
4.65  
Yes  
LOW  
CAT706RVIGT3  
CAT706RZIGT3  
CAT706SVIGT3  
CAT706SZIGT3  
CAT706TVIGT3  
CAT706TZIGT3  
CAT706VIGT3  
CAT706ZIGT3  
CAT706V  
ABRT  
SOIC8  
MSOP8  
SOIC8  
MSOP8  
SOIC8  
MSOP8  
SOIC8  
MSOP8  
2.63  
2.93  
3.08  
4.40  
Yes  
Yes  
Yes  
Yes  
LOW  
LOW  
LOW  
LOW  
CAT706V  
ABRT  
3,000  
CAT706V  
ABRT  
CAT706V  
ABRT  
CAT813VIGT3  
CAT813ZIGT3  
CAT813V  
ABRS  
SOIC8  
4.65  
Yes  
HIGH  
MSOP8  
6. All packages are RoHScompliant (Leadfree, Halogenfree).  
7. The standard lead finish is NiPdAu.  
8. Contact factory for package availability.  
9. For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
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