CAT706ZI-G [ONSEMI]
μP Supervisory Circuits; μP监控电路
| 型号： | CAT706ZI-G |
| 厂家： | 
ONSEMI |
| 描述： | μP Supervisory Circuits |
| 文件： | 总14页 (文件大小：119K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CAT705, CAT706, CAT813
µP Supervisory Circuits
FEATURES
DESCRIPTION
n Reset guaranteed valid for 1.0 V VCC
n 6µA supply current
The CAT705, CAT706, and CAT813 provide reset and
monitoring functions for the electronic systems. Each
device monitors the system voltage and maintains a
reset output until that voltage reaches the device’s
specified trip value and then maintains the reset
output active condition until the device’s internal timer
allows the system power supply to stabilize.
n 200ms Reset pulse width
n Watchdog timer function 1.6s timeout
n Accurate brownout detection reset in 3.0, 3.6,
and 5.0 volt systems
The devices have a watchdog input which can be
n Secondary low supply monitoring on PFI input
¯¯¯¯
used to monitor a system signal and causes WDO to
n Pin and function compatible with the
go low if the signal fails to change state prior to a
timeout condition.
MAX705/MAX706/MAX813L products
n Operating Range from -40°C to +85°C
¯¯¯
The supervisory circuits provide a MR input which
initiates a reset if pulled low. The CAT705 and
n RoHS Compliant SOIC 8-lead and MSOP 8-lead
¯¯¯¯¯¯
CAT706 provide an active low RESET output. The
packages
CAT813 provides an active high RESET output.
APPLICATIONS
There is a secondary supply monitor (PFI) included for
power-fail warning.
n Microprocessor and microcontroller based
systems
n Instrument and control systems
n Portable equipment
For Ordering Information details, see page 13.
PIN FUNCTIONS
PIN CONFIGURATION
Pin Name Function
SOIC 8-Lead
¯¯¯
MR
Manual Reset Input
Power Supply
1
8
MR
WDO
VCC
GND
PFI
7
2
RESET
(RESET for CAT813)
V
CC
Ground
GND
3
4
6
5
WDI
PFO
Power Fail voltage monitor Input.
Power Fail Output
Watchdog Timer Input
¯¯¯¯
PFO
PFI
WDI
MSOP 8-Lead
CMOS Push-Pull Active Low Reset
Output (CAT705 & CAT706)
¯¯¯¯¯¯
RESET
1
8
RESET
(RESET for CAT813)
WDI
PFO
CMOS Push-Pull Active High Reset
Output (CAT813)
7
2
WDO
MR
RESET
3
4
6
5
PFI
¯¯¯¯¯
WDO
Watchdog Timer Output
GND
V
CC
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
1
Doc. No. MD-3030, Rev. D
CAT705, CAT706, CAT813
BLOCK DIAGRAM
V
CC
70µA
MR
RESET
CONTROLLER
RESET
(RESET for CAT813)
V
CC
VRST
TIMER
WATCHDOG
TRANSITION
DETECTION
WATCHDOG
TIMER
WDI
PFI
WDO
PFO
1.25V
¯¯¯¯¯¯
RESET
¯¯¯
MR
¯¯¯¯¯
WDO
Device
RESET
WDI
PFI
CAT705
CAT706
CAT813
@ 4.65 V
x
x
x
x
x
x
x
x
x
x
@ 1.25 V
@ 1.25 V
@ 1.25 V
@ 4.65 V
Doc. No. MD-3030, Rev. D
2
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT705, CAT706, CAT813
ABSOLUTE MAXIMUM RATINGS(1)
Parameters
Supply Voltage
All other pins
Ratings
Units
V
6.5
-0.3 to (VCC + 0.3)
20
V
¯¯¯¯¯¯ ¯¯¯¯
mA
Output Current RESET, RESET,WDO
Continuous Power Dissipations (TA = +70ºC)
SOIC 8-lead (derate 5.9mW/ºC above +70ºC)
MSOP 8-lead (derate 4.1mW/ºC above +70ºC)
Storage Temperature
471
330
mW
-65 to 150
+300
ºC
ºC
V
Lead Soldering (10 seconds max)
ESD Rating: Human Body Model
ESD Rating: Machine Model
2000
200
V
RECOMMENDED OPERATING CONDITIONS
Parameter
Range
1.0 to 5.5
Units
V
VCC (TA = -40ºC to +85ºC)
All Other Pins
-0.1 to (VCC + 0.1)
-40 to +85
V
Ambient Temperature
ºC
Notes:
(1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
3
Doc. No. MD-3030, Rev. D
CAT705, CAT706, CAT813
ELECTRICAL OPERATING CHARACTERISTICS
Typical values at TA = 25ºC and VCC = 5V for CAT705, CAT706 and CAT813 versions.
V
CC = 3.3V for the CAT706 T/S versions; VCC = 3.0V for the CAT706 R version.(1)
Symbol Parameter
Conditions
Min
Typ
6
Max
17
Units
CAT705
CAT706
CAT813
µA
ICC
Supply Current
CAT706 (R/S/T Versions)
4
12
µA
V
CAT705 & CAT813 at
-40ºC ≤ TA ≤ +85ºC
4.50
4.65 4.75
CAT706 at -40ºC ≤ TA ≤ +85ºC
CAT706T at -40ºC ≤ TA ≤ +85ºC
CAT706S at -40ºC ≤ TA ≤ +85ºC
CAT706R at -40ºC ≤ TA ≤ +85ºC
4.25
3.00
2.85
2.55
4.40 4.50
3.08 3.15
2.93 3.00
2.63 2.70
V
V
V
V
VRST
Reset Threshold
Reset Threshold
Tempco (1)
40
ppm/ºC
CAT705 & CAT813
CAT706
VCC to Reset Delay(2) VCC = VTH to (VTH - 100mV)
10
5
mV
mV
µs
Reset Threshold
Hysteresis (1)
tRD
tRP
20
Reset Active
Timeout Period
140
200
400
ms
CAT705 & CAT706, VCC = VRST max
ISOURCE = -120µA
,
VCC - 1.5V
0.8 x VCC
¯¯¯¯¯¯
Voltage
RESET Output High
VOH
VOL
VOH
VOL
CAT705 & CAT706, VCC = VRST max
ISOURCE = -30µA
,
V
CAT705 & CAT706, VCC = VRST min
ISINK = 3.2mA
,
0.4
0.3
¯¯¯¯¯¯
RESET Output Low
Voltage
CAT705 &CAT706, VCC = 1.2V
ISINK = 100µA
CAT813, VCC = VRST max
ISOURCE = -120µA
,
VCC - 1.5V
0.8 x VCC
RESET Output High
Voltage
V
V
CAT813, VCC = VRST max
ISOURCE = -30µA
,
CAT813, VCC = VRST min
ISINK = 3.2mA
,
0.4
0.3
RESET Output Low
Voltage
CAT813, VCC = 1.2V
ISINK = 100µA
Notes:
(1) Limits are guaranteed by design and not production tested.
(2) The RESET short-circuit current is the maximum pull-up current when reset is driven low by a bidirectional output.
Doc. No. MD-3030 Rev. D
4
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT705, CAT706, CAT813
ELECTRICAL OPERATING CHARACTERISTICS (continued)
Typical values at TA = 25°C and VCC = 5V for CAT705, CAT706, and CAT813 versions;
VCC = 3.3V for the CAT706 T/S versions; VCC = 3.0V for the CAT706 R version.
Symbol Parameter
WATCHDOG INPUT
Conditions
Min
Typ
Max
2.25
Units
tWD
tWP
VIL
VIH
Watchdog Timeout Period
1.00
50
1.6
s
WDI Pulse Width
VIL = 0.4 V, VIH = 0.8 x VCC
ns
0.3 x VCC
150
WDI Input Voltage(3)
V
0.7 x VCC
WDI = VCC, Time Average
WDI = 0V, Time Average
50
WDI Input Current(4)
WDO Output Voltage
µA
-150
-50
VRST (max) < VCC < 3.6 V
ISOURCE = -500 µA
0.8 x VCC
VW_OH
4.5 V < VCC < 5.5 V,
ISOURCE = -800 µA
VCC – 1.5 VCC – 0.25
V
V
VRST (max) < VCC < 3.6 V,
ISINK = +500 µA
0.3
0.4
VW_OL
4.5 V < VCC < 5.5 V,
ISINK = 1.2 mA
0.1
MANUAL RESET INPUT
VIL
0.3 x VCC
¯¯¯
MR Input Voltage
VIH
0.7 x VCC
¯¯¯
¯¯¯
MR = 0 V
40
1
70
140
5
µA
µs
µs
MR Pull-up Current
¯¯¯
tPB
MR Pulse Width
(5)
¯¯¯
tPDLY
MR low to Reset Delay
POWER-FAIL INPUT
PFI Input Threshold
VCC = 5 V
1.2
-25
1.25
0.01
1.3
25
V
PFI Input Current
nA
VRST (max) < VCC < 3.6 V,
ISOURCE = -500 µA
0.8 x VCC
VP_OH
4.5 V < VCC < 5.5 V,
ISOURCE = -800 µA
VCC - 1.5V
0.4
0.3
0.4
¯¯¯¯
V
PFO Output Voltage
VRST (max) < VCC < 3.6 V,
ISINK = +1.2 mA
VP_OL
4.5 V < VCC < 5.5 V,
ISINK = 3.2 mA
Notes:
(3) WDI is internally serviced within the watchdog period if WDI is left open.
(4) The WDI input current is specified as an average input current when the WDI input is driven high or low. The WDI input if connected to a
three-stated output device can be disabled in the tristate mode as long as the leakage current is less than 10µA and a maximum
capacitance of less than 200pF. To clock the WDI input in the active mode the drive device must be able to source or sink at least 200µA
when active.
¯¯¯¯¯¯
(5) RESET for CAT705 & CAT706 & RESET for CAT813.
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
5
Doc. No. MD-3030, Rev. D
CAT705, CAT706, CAT813
TYPICAL ELECTRICAL OPERATING CHARACTERISTICS TABLES
Normalized Reset Threshold
Voltage vs. Temperature
VCC Supply Current vs. Temperature
9
8
7
6
5
4
3
2
1
1.06
1.04
1.02
1.00
0.98
0.96
0.94
-40 -20
0
20
40
60
80 100
-40 -20
0
20 40 60 80 100 120
TEMPERATURE (°C)
TEM PERATURE (ºC)
Doc. No. MD-3030 Rev. D
6
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT705, CAT706, CAT813
FUNCTIONAL DESCRIPTION
PROCESSOR RESET
MANUAL RESET
The CAT705, CAT706 & CAT813 each have a Manual
The CAT705, CAT706 & CAT813 detect supply
voltage (VCC) conditions that are below the specified
voltage trip value (VRST) and provide a reset output to
maintain correct system operation. On power-up,
¯¯¯
Reset (MR) input to allow for alternative control of the
¯¯¯
reset outputs. The MR input is designed for direct
¯¯¯
connection to a pushbutton (see Figure 1). The MR
¯¯¯¯¯¯
RESET (or RESET for the CAT813) are kept active for
input is internally pulled up by 52kΩ resistor and must
be pulled low to cause the reset output to go active.
Internally, this input is debounced and timed such that
a minimum delay tRP of 140ms after the supply voltage
(VCC) rises above VRST to allow the power supply and
processor to stabilize. When VCC drops below the
voltage trip value (VRST), the reset output signals
¯¯¯¯¯¯
RESET (or RESET) signals of at least 140ms
minimum will be generated. The min 140ms tRP delay
commences as the Manual Reset input is released
from the low level. (see Figure 2)
¯¯¯¯¯¯
¯¯¯¯¯¯
RESET (or RESET) are pulled active. RESET (or
RESET) is specifically designed to provide the reset
input signals for processors. This provides reliable
and consistent operation as power is turned on, off or
during brownout conditions by maintaining the
processor operation in known conditions.
MR
WDO
RESET/RESET
V
CC
CAT705
CAT706
CAT813
GND
PFI
WDI
PFO
Figure 1. Pushbutton RESET
t
PB
MR
t
PDLY
V
IH
V
IL
t
RP
RESET
RESET
V
V
OH
OL
Figure 2. Timing Diagram – Pushbutton RESET
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
7
Doc. No. MD-3030, Rev. D
CAT705, CAT706, CAT813
WATCHDOG TIMER
The CAT705, CAT706,
Watchdog input (WDI). The watchdog timer function
¯¯¯¯
&
CAT813 provide
a
or directed by the software operating on the processor
can be used to strobe the watchdog input. The most
reliable is a dedicated I/O output transitioned by a
specific software instruction.
controls the watchdog output (WDO) signal and forces
¯¯¯¯
the WDO to be low (active) when the WDI input does
not have a transition from low-to-high or high-to-low
within 1.6s typical. If a transition occurs on the WDI
input pin prior to the watchdog time-out, the watchdog
timer is restarted. The timing diagram is shown in
Figure 3. The watchdog timer starts as soon as reset
condition becomes inactive.
The watchdog can be disabled by floating (or tri-
stating) the WDI input (see Figure 5). If the watchdog
is disabled the WDI pin will be pulled low for the first
7/8th’s of the watchdog period (tWD) and pulled high for
the last 1/8th of the watchdog period. This pulling low
of the WDI input and then high is used to detect an
open or tri-state condition and will continue to repeat
until the WDI input is driven high or low.
When the VCC supply drops below the reset threshold,
¯¯¯¯
the WDO output becomes active and goes low
independently of the watchdog timing stage.
For most efficient operation of devices with the
watchdog function the WDI input should be held low
the majority of the time and only strobed high as
required to reset the watchdog timer.
Figure 4 below shows a typical implementation of a
watchdog function. Any processor signal that repeats
dependant on the normal operation of the processor
t
WP
t
t
t
WD
WD
WD
+5 V
0 V
WDI
WDO
+5 V
0 V
+5 V
0 V
RESET
(RESET)
RESET EXTERNALLY
TRIGGERED BY MR
t
RS
+5 V
0 V
(() Are for CAT813 Only)
Figure 3. Watchdog Timing Diagram
PIC
µC
WDO
MR
DECODER
ADDRESS
MCLR
V
RESET/RESET
WDI
CC
CAT705
CAT706
CAT813
GND
PFI
PFO
Figure 4. Watchdog Timer Circuit
Doc. No. MD-3030 Rev. D
8
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT705, CAT706, CAT813
V
Tristate
CC
MR
WDO
V
RESET/RESET
CC
GND
PFI
150kΩ
CAT705
CAT706
CAT813
µC
WDI
PFO
OUTPUT
110kΩ
Figure 5. Watchdog Disable Circuit
V
CC
V
RST
(MAX)
V
RST
V
RST
(MIN)
t
RD
RESET (CAT705 & CAT706)
V
OH
RESET Slews with V
CC
V
OL
RESET (CAT813)
Figure 6. Timing Diagram – Power Down
V
RST
(MAX)
V
RST
V
RST
(MIN)
V
CC
t
RP
RESET (CAT705 & CAT706)
V
OH
V
OL
RESET (CAT813)
Figure 7. Timing Diagram – Power Up
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
9
Doc. No. MD-3030, Rev. D
CAT705, CAT706, CAT813
APPLICATION NOTES
OUTPUT VALID CONDITIONS
¯¯¯¯¯¯
µP’s with Bidirectional Reset Pins
The RESET output uses a push-pull output which can
maintain a valid output down to a VCC of 1.0 volts. To
sink current below 0.8V a resistor can be connected
¯¯¯¯¯¯
The RESET output can be pulled low by processors
like the 68HC11 allowing for a system reset issued by
the processor. The maximum pullup current that can
be sourced by the CAT705 & CAT706 1.5mA (and by
the CAT706 T/R/S is 800µA) allowing the processor to
pull the output low even when the CAT70x is pulling it
high.
¯¯¯¯¯¯
from RESET to Ground (see Figure 8.)
This
¯¯¯¯¯¯
arrangement will maintain a valid value on the RESET
output during both power up and down but will draw
¯¯¯¯¯¯
current when the RESET output is in the high state. A
resistor value of about 100kΩ should be adequate in
most situations to maintain a low condition valid
output down to VCC equal to 1.0V.
Power Transients
Generally short duration negative-going transients of
less than 2µs on the power supply at VRST minimum
will not cause a reset condition. However the lower
the voltage of the transient the shorter the required
time to cause a reset output. These issues can
usually be remedied by the proper location of bypass
capacitance on the circuit board.
µC
MR
WDO
V
RESET/RESET
CC
GND
PFI
CAT705
CAT706
CAT813
RESET/RESET
WDI
PFO
100kΩ
¯¯¯¯¯¯
Figure 8. RESET Valid for VCC < 1.0V
5V
µC
VCC
NMI
Push Switch
MR
WDO
UNREGULATED DC
V
RESET/RESET
CC
GND
PFI
RESET/RESET
CAT705
CAT706
CAT813
WDI
PFO
I/O LINE
INTERRUPT
Figure 9. Typical Operating Circuit
Doc. No. MD-3030 Rev. D
10
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT705, CAT706, CAT813
PACKAGE OUTLINE DRAWINGS
(1) (2)
MSOP 8-Lead 3.0 x 3.0mm (Z)
SYMBOL
MIN
NOM
MAX
1.10
0.15
0.95
0.38
0.23
3.10
5.00
3.10
A
A1
A2
b
0.05
0.75
0.22
0.13
2.90
4.80
2.90
0.10
0.85
c
D
3.00
4.90
E
E
E1
E1
e
3.00
0.65 BSC
0.60
L
0.40
0º
0.80
6º
L1
L2
θ
0.95 REF
0.25 BSC
TOP VIEW
D
A2
A
DETAIL A
A1
e
b
c
SIDE VIEW
END VIEW
θ
L2
L
L1
DETAIL A
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-187
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
11
Doc. No. MD-3030, Rev. D
CAT705, CAT706, CAT813
(1) (2)
SOIC 8-Lead 150 mils (V)
SYMBOL
MIN
NOM
MAX
1.75
0.25
0.51
0.25
5.00
6.20
4.00
A
A1
b
1.35
0.10
0.33
0.19
4.80
5.80
3.80
c
E1
E
D
E
E1
e
1.27 BSC
h
0.25
0.40
0º
0.50
1.27
8º
L
PIN # 1
IDENTIFICATION
θ
TOP VIEW
D
h
A1
θ
A
c
e
b
L
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MS-012.
Doc. No. MD-3030 Rev. D
12
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT705, CAT706, CAT813
EXAMPLE OF ORDERING INFORMATION(1)
Prefix
Device #
Suffix
CAT
706
R
V
I
- G
T3
Product
Number
705
Package
V: SOIC 8-Lead
Z: MSOP 8-Lead
Lead Finish
G:NiPdAu
Tape & Reel
T: Tape & Reel
3: 3000/Reel
Optional
Company ID
706
813
Reset Threshold Voltage
Temperature Range
I = Industrial (-40ºC to 85ºC)
Blank: See Ordering Part
Number table
T: 3.08V
S: 2.93V
R: 2.63V
TOP MARKING INFORMATION (FOR ALL THRESHOLDS)
NiPdAu Finish (-G)
Device #
CAT705
CAT706
CAT813
Package
MSOP
MSOP
MSOP
Top Marking
ABRT
Device #
CAT705
CAT706
CAT813
Package
SOIC
Top Marking
CAT705V
ABRT
SOIC
CAT706 V
CAT813V
ABRS
SOIC
ORDERING PART NUMBER
Order Part Number
CAT705VI-G
CAT705ZI-G
Threshold Voltage
4.65V
4.40V
2.63V
2.93V
3.08V
4.65V
CAT706VI-G
CAT706ZI-G
CAT706RVI-G
CAT706RZI-G
CAT706SVI-G
CAT706SZI-G
CAT706TVI-G
CAT706TZI-G
CAT813VI-G
CAT813ZI-G
Notes:
(1) All packages are RoHS-compliant (Lead-free, Halogen-free).
(2) The standard lead finish is NiPdAu.
(3) This device used in the above example is a CAT706RVI -GT3 (2.63V, SOIC 8-Lead, Industrial Temperature, NiPdAu, Tape & Reel,
3,000/reel)
(4) Contact factory for package availability.
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
13
Doc. No. MD-3030, Rev. D
CAT705, CAT706, CAT813
REVISION HISTORY
Date
Rev. Description
21-Jan-08
3-Nov-08
A
B
Initial Issue
Change logo and fine print to ON Semiconductor
Update Features
Update Applications
Update Description
Update Block Diagram
27-Oct-09
06-July-10
C
D
Update Recommended Operating Conditions
Update Electrical Operating Characteristics
Update Watchdog Timing
Update Top Marking Information
Update Electrical Operating Characteristics
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further
notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC
assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special,
consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical
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For additional information, please contact your local
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Doc. No. MD-3030 Rev. D
14
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
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