AND8199 [ONSEMI]
THERMAL STABILITY OF MOSFETS; MOSFET的热稳定性
| 型号： | AND8199 |
| 厂家： | 
ONSEMI |
| 描述： | THERMAL STABILITY OF MOSFETS |
| 文件： | 总4页 (文件大小：88K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AND8199
Thermal Stability of
MOSFETs
Prepared by: Alan Ball
ON Semiconductor
Application Engineering Manager
http://onsemi.com
A variety of applications use hot−swap controllers, often
to increase the reliability of a system. However, a failure in
the hot−swap circuit would defeat that purpose. When you
use MOSFETs in their active region to control current, such
as you would for a controller that operates in a
constant−current mode of operation, they have an inherent
failure mechanism. In this mode, the MOSFET can get
hot spots and fail, long before the device exceeds its
Safe Operating Area (SOA) ratings.
Engineers have long understood that MOSFETs are
positive temperature coefficient devices. Therefore, as the
temperature of the device increases, the resistance increases.
In other words, higher temperatures result in lower currents.
This fact is important if you want to operate MOSFETs in
parallel. With a good thermal path between devices, the
positive temperature coefficient reduces the current in the
hottest device and forces more of it to flow in the cooler
device, thereby avoiding thermal runaway.
the same application of the positive temperature coefficient
applies. In this case, the thermal path between the cells is
better than that of separate packaged devices, because the
cells are all on the same die.
As the current density of a small group of cells increases,
those cells heat up, increasing the resistivity of those cells
and forcing current to flow in neighboring cells, which
minimizes the thermal gradient and avoids hot spots. This
process is an essential physical tenet that allows the parallel
array of cells to function reliably.
If the MOSFET exhibits a negative thermal coefficient,
today’s parallel cell structure would cause serious reliability
issues. In fact, in some modes of operation, the thermal
coefficient goes negative. You can easily understand this
phenomenon by looking at the transconductance curves for
a FET device (refer to Reference 1).
A typical set of transconductance curves clearly
demonstrates this effect as shown by Figure 1. Below are
curves from three typical devices used in
hot swap applications.
Engineers often think of a MOSFET as a single power
transistor, but it is a collection of thousands of tiny power
FET cells connected in parallel. In terms of sharing current,
100
24
V
≥ 10 V
DS
20
16
12
8
T = 175°C
J
T = 25°C
J
T = 25°C
J
4
V
= 50 V
DS
T = −55°C
T = 100°C
J
J
20 ms = Pulse Width
7.0 8.0
, GATE−TO−SOURCE VOLTAGE (V)
10
4.0
0
0
1
2
3
4
5
6
7
8
9
5.0
6.0
V
, GATE−TO−SOURCE VOLTAGE (V)
V
GS
GS
Figure 1. Transfer Characteristics for NTD12N10
Figure 2. International Rectifier IRF530
Semiconductor Components Industries, LLC, 2005
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Publication Order Number:
AND8199/D
January, 2005 − Rev. 0
AND8199
−40°
25°
125°
10
9
8
7
6
5
4
3
2
1
50
40
30
20
10
0
Pulse Duration = 80 ms
Duty Cycle = 0.5% Maximum
V
= 15 V
DD
Point of Inflection
T = 25°C
J
125°
−40°
T = 100°C
J
T = −55°C
J
1
2
3
4
5
6
7
8
9
10
V
V
−
GS
V
+
GS
2
3
4
5
6
GS
V
, GATE−TO−SOURCE VOLTAGE (V)
GS
Figure 3. Fairchild HUF75631SK8
Figure 4. Typical Transconductance Curve
All three devices shown have one thing in common:
a point of inflection at which the temperature coefficient is
zero. At greater gate−to−source voltages, the coefficient is
positive, and, at lower gate−to−source voltages it is negative.
Figure 4 illustrates the change from negative to positive.
At a gate−to−source voltage greater than that of the
The thermal−runaway situation occurs when you use large
devices at low current−limit settings. Even though it would
appear to be desirable to use a very large MOSFET for an
application such as a hot swap and limit it to a low current,
it may be an inappropriate approach. Use of
a
very−low−on−resistance device offers low losses for
steady−state operation but may cause the device to fail
during a short circuit or an overload.
inflection point (V +), a positive temperature coefficient
GS
exists. At this gate voltage, the drain conducts more than
9.0 A of current. However, at 125°C the drain current
reduces to less than 7.0 A. The arrow at the left of Figure 4,
which shows the current decreasing due to an increase in
temperature, indicates this drop.
One way to overcome this problem is to directly sense the
die temperature of the MOSFET by integrating the
MOSFET with the controller using a monolithic approach.
ON Semiconductor takes this approach with its new line of
hot−swap ICs. In this case, the temperature can be sensed
directly on the FET die. The location of the sense element on
the die is critical for ensured protection of the device. If a hot
spot occurs too far from the sense location, the device may
be unable to protect itself.
Discrete hot−swap controllers employ a number of
protection schemes. Thermal instability is an issue only if
the controller can go into a constant−current mode of
operation. Some protection circuits simply shut off the
MOSFET switch if a number of conditions indicate a
dangerous area of operation. Controllers that use a
constant−current method of protection can use timers or
other schemes along with the current−limit circuit to reduce
the risk of failure.
At a gate−to−source voltage below the inflection point
(V −) a negative temperature coefficient exists. At −40°C,
GS
the drain current is close to zero. However, at 125°C, the
drain current is more than 1.0 A. A second arrow at the left
of Figure 4 indicates this relationship, and the current rises
due to an increase in temperature.
The implication is that when you are controlling the FET
with a gate−to−source voltage below the inflection point,
thermal runaway can occur. When one cell or a small group
of cells becomes hotter than the surrounding cells, they tend
to conduct more current. This situation, in turn, creates more
heat, which allows more current to flow. These cells can pull
a large amount of current and, if not limited in time, can
cause the device to fail.
This situation is similar to the well−known phenomenon
of secondary breakdown that occurs in bipolar transistors
except that a bipolar junction transistor is a single device,
and you can take steps to avoid its destruction. A power
MOSFET contains thousands of parallel devices that are
internal to the die, and you cannot individually protect them.
If hot spots occur, the SOA characteristics of the heavily
conducting cells differ greatly from those of the marginally
conducting cells.
Because system efficiency is an important parameter, it is
tempting to use the largest MOSFET possible to reduce
losses. It is important to keep in mind, however, that this
approach may require you to make a trade−off with the
system reliability if you are not mindful of the possible
thermal instability. You can reliably use a large power device
at a low current limit level if you handle it properly.
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AND8199
Reference
1. Thermal Instability of Low Voltage Power−MOSFET’s. IEEE Transactions on Power Electronics, Vol. 15, No. 3, May
2000, Alfio Consoli et al.
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AND8199
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