74VHC112MTC [ONSEMI]
带预设和清零功能的双通道J-K触发器;型号: | 74VHC112MTC |
厂家: | ONSEMI |
描述: | 带预设和清零功能的双通道J-K触发器 光电二极管 逻辑集成电路 触发器 |
文件: | 总11页 (文件大小:381K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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May 2007
74VHC112
tm
Dual J-K Flip-Flops with Preset and Clear
Features
General Description
■ High speed: f
= 200MHz (Typ.) at V = 5.0V
The VHC112 is an advanced high speed CMOS device
fabricated with silicon gate CMOS technology. It
achieves the high-speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation.
MAX
CC
■ Low power dissipation: I = 2µA (Max.) at T = 25°C
CC
A
■ High noise immunity: V
= V
= 28% V (Min.)
NIH
NIL CC
■ Power down protection is provided on all inputs
■ Pin and function compatible with 74HC112
The VHC112 contains two independent, high-speed JK
flip-flops with Direct Set and Clear inputs. Synchronous
state changes are initiated by the falling edge of the
clock. Triggering occurs at a voltage level of the clock
and is not directly related to transition time. The J and K
inputs can change when the clock is in either state with-
out affecting the flip-flop, provided that they are in the
desired state during the recommended setup and hold
times relative to the falling edge of the clock. The LOW
signal on PR or CLR prevents clocking and forces Q and
Q HIGH, respectively. Simultaneous LOW signals on PR
and CLR force both Q and Q HIGH.
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and two supply systems such as battery
backup. This circuit prevents device destruction due to
mismatched supply and input voltages.
Ordering Information
Package
Order Number
74VHC112M
Number
Package Description
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC112SJ
M16D
74VHC112MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number.
©1995 Fairchild Semiconductor Corporation
74VHC112 Rev. 1.2
www.fairchildsemi.com
Connection Diagram
Truth Table
Inputs
Outputs
PR
L
CLR
H
CP
X
J
X
X
X
h
l
K
X
X
X
h
h
l
Q
H
L
Q
L
H
L
L
X
H
H
L
X
H
H
H
H
H
H
Q
Q
0
0
H
L
H
H
h
l
H
L
H
l
Q
Q
0
0
H (h) = HIGH Voltage Level
L (l) = LOW Voltage Level
X = Immaterial
= HIGH-to-LOW Clock Transition
Q (Q ) = Before HIGH-to-LOW Transition of Clock
0
0
Lower case letters indicate the state of the referenced
input or output one setup time prior to the HIGH-to-LOW
clock transition.
Pin Description
Pin Names
Description
J , J , K , K
2
Data Inputs
1
2
1
CLK , CLK
Clock Pulse Inputs (Active Falling
Edge)
1
2
CLR , CLR
Direct Clear Inputs (Active LOW)
Direct Preset Inputs (Active LOW)
Outputs
1
2
PR , PR
1
2
Q , Q , Q , Q
2
1
2
1
Logic Diagram
(One Half Shown)
©1995 Fairchild Semiconductor Corporation
74VHC112 Rev. 1.2
www.fairchildsemi.com
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Rating
V
Supply Voltage
–0.5V to +7.0V
–0.5V to +7.0V
CC
V
DC Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current
IN
V
–0.5V to V + 0.5V
OUT
CC
I
–20mA
20mA
IK
I
OK
I
25mA
OUT
I
DC V / GND Current
50mA
CC
CC
T
Storage Temperature
–65°C to +150°C
260°C
STG
T
Lead Temperature (Soldering, 10 seconds)
L
(1)
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
Rating
V
Supply Voltage
2.0V to +5.5V
0V to +5.5V
0V to V
CC
V
Input Voltage
IN
V
Output Voltage
OUT
CC
T
Operating Temperature
Input Rise and Fall Time,
–40°C to +85°C
OPR
t , t
r
f
V
V
= 3.3V 0.3V
= 5.0V 0.5V
0ns/V ∼ 100ns/V
0ns/V ∼ 20ns/V
CC
CC
Note:
1. Unused inputs must be held HIGH or LOW. They may not float.
©1995 Fairchild Semiconductor Corporation
74VHC112 Rev. 1.2
www.fairchildsemi.com
3
DC Electrical Characteristics
T = –40°C to
A
T = 25°C
+85°C
A
Symbol
Parameter
V
(V)
Conditions
Min.
Typ.
Max.
Min.
Max.
Units
CC
2.0
V
HIGH Level Input
Voltage
1.50
1.50
V
IH
3.0–5.5
2.0
0.7 x V
0.7 x V
CC
CC
V
LOW Level Input
Voltage
0.50
0.50
V
V
IL
3.0–5.5
2.0
0.3 x V
0.3 x V
CC
CC
V
HIGH Level
Output Voltage
V
or V
= V
I
= –50µA
1.9
2.9
2.0
3.0
4.5
1.9
2.9
OH
IN
IH
OH
IL
3.0
4.5
4.4
4.4
3.0
I
I
I
= –4mA
= –8mA
= 50µA
2.58
3.94
2.48
3.80
OH
OH
OL
4.5
V
LOW Level
Output Voltage
2.0
V
or V
= V
IH
IL
0.0
0.0
0.0
0.1
0.1
0.1
0.1
V
OL
IN
3.0
4.5
0.1
0.1
3.0
I
I
= 4mA
= 8mA
0.36
0.36
0.1
0.44
0.44
1.0
OL
OL
4.5
I
Input Leakage
Current
0–5.5
V
= 5.5V or GND
µA
µA
IN
IN
I
Quiescent
5.5
V
= V or GND
2.0
20.0
CC
IN
CC
Supply Current
©1995 Fairchild Semiconductor Corporation
74VHC112 Rev. 1.2
www.fairchildsemi.com
4
AC Electrical Characteristics
T = –40°C
A
T = 25°C
to +85°C
A
Symbol
Parameter
V
(V)
Conditions Min. Typ. Max. Min. Max. Units
CC
f
Maximum Clock
Frequency
3.3 0.3 C = 15pF
110
90
150
120
200
185
8.5
10.0
5.1
6.3
6.7
9.7
4.6
6.4
4
100
80
MHz
MHz
ns
MAX
L
C = 50pF
L
5.0 0.5 C = 15pF
150
120
135
110
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
L
C = 50pF
L
t
, t
Propagation Delay Time 3.3 0.3 C = 15pF
11.0
15.0
7.3
13.4
16.5
8.8
PLH PHL
L
(CP to Q or Q )
n
n
C = 50pF
L
5.0 0.5 C = 15pF
ns
L
C = 50pF
10.5
10.2
13.5
6.7
12.0
11.7
15.0
8.0
L
t
, t
Propagation Delay Time 3.3 0.3 C = 15pF
(PR or CLR to Q or Q )
ns
PLH PHL
L
n
n
C = 50pF
L
5.0 0.5 C = 15pF
ns
L
C = 50pF
9.5
11.0
10
L
C
Input Capacitance
V
= Open
10
pF
pF
IN
CC
(2)
C
Power Dissipation
Capacitance
18
PD
Note:
2. C is defined as the value of the internal equivalent capacitance which is calculated from the operating
PD
current consumption without load. Average operating current can be obtained from the equation:
I
(opr.) = C • V • f + I / 4 (per F/F), and the total C when n pcs of the Flip-Flop operate can be calculated
CC
PD CC IN CC PD
by the following equation: C (total) = 30 + 14 • n
PD
AC Operating Requirements
T = 25°C
T = –40°C to +85°C
A
A
(3)
Symbol
Parameter
V
(V)
Typ.
Guaranteed Minimum
Units
CC
t
Minimum Pulse Width
(CP or CLR or PR)
3.3
5.0
5.0
5.0
5.0
4.0
1.0
1.0
6.0
5.0
ns
W
5.0
3.3
5.0
3.3
5.0
3.3
5.0
5.0
5.0
4.0
1.0
1.0
6.0
5.0
t
Minimum Setup Time
ns
ns
ns
S
H
(J or K to CP )
n
n
n
t
Minimum Hold Time
(J or K to CP )
n
n
n
t
Minimum Recovery Time
(CLR or PR to CP)
REC
Note:
3. V is 3.3 0.3V or 5.0 0.5V.
CC
©1995 Fairchild Semiconductor Corporation
74VHC112 Rev. 1.2
www.fairchildsemi.com
5
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 1. 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M16A
©1995 Fairchild Semiconductor Corporation
74VHC112 Rev. 1.2
www.fairchildsemi.com
6
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 2. 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
©1995 Fairchild Semiconductor Corporation
74VHC112 Rev. 1.2
www.fairchildsemi.com
7
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
5.00 0.10
4.55
5.90
4.45 7.35
0.65
4.4 0.1
1.45
5.00
0.11
12°
MTC16rev4
Figure 3. 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC16
©1995 Fairchild Semiconductor Corporation
74VHC112 Rev. 1.2
www.fairchildsemi.com
8
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exhaustive list of all such trademarks.
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Across the board. Around the world.™
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EcoSPARK®
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HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER
ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
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As used herein:
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support,
which, (a) are intended for surgical implant into the body or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
device, or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Preliminary
First Production
Full Production
Not In Production
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
No Identification Needed
Obsolete
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
design.
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I26
©1995 Fairchild Semiconductor Corporation
74VHC112 Rev. 1.2
www.fairchildsemi.com
9
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
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