74ACT132 [ONSEMI]
Quad 2−Input NAND Schmitt Trigger; 四2输入与非施密特触发器
| 型号： | 74ACT132 |
| 厂家： | 
ONSEMI |
| 描述： | Quad 2−Input NAND Schmitt Trigger |
| 文件： | 总8页 (文件大小：126K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74AC132, MC74ACT132
Quad 2−Input NAND Schmitt
Trigger
The MC74AC/74ACT132 contains four 2−input NAND gates
which are capable of transforming slowly changing input signals into
sharply defined, jitter−free output signals. In addition, they have
greater noise margin than conventional NAND gates.
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Each circuit contains a 2−input Schmitt trigger. The Schmitt trigger
uses positive feedback to effectively speed−up slow input transitions,
and provide different input threshold voltages for positive and
negative-going transitions. This hysteresis between the positive−going
and negative−going input threshold is determined by resistor ratios
and is essentially insensitive to temperature and supply voltage
variations.
PDIP−14
N SUFFIX
CASE 646
14
1
SOIC−14
D SUFFIX
CASE 751A
Features
14
1
• Schmitt Trigger Inputs
• Outputs Source/Sink 24 mA
• ′ACT132 Has TTL Compatible Inputs
• Pb−Free Packages are Available
SOEIAJ−14
M SUFFIX
CASE 965
14
1
V
CC
14
13
12
11
10
9
8
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
1
2
3
4
5
6
7
GND
Figure 1. Pinout; 14−Lead Packages Conductors
(Top View)
FUNCTION TABLE
Inputs
Output
A
B
Y
L
L
H
H
L
H
L
H
H
H
L
H
H = HIGH Voltage Level L = LOW Voltage Level
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
October, 2006 − Rev. 7
MC74AC132/D
MC74AC132, MC74ACT132
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Typ
5.0
5.0
−
Max
6.0
Unit
′AC
2.0
4.5
0
V
Supply Voltage
V
V
CC
′ACT
5.5
V , V
in out
DC Input Voltage, Output Voltage (Ref. to GND)
V
CC
V
V
V
V
V
@ 3.0 V
@ 4.5 V
@ 5.5 V
@ 4.5 V
@ 5.5 V
−
150
40
25
10
8.0
−
−
CC
CC
CC
CC
CC
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
−
−
−
−
−
ns/V
t , t
r
f
−
−
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
t , t
ns/V
r
f
−
T
Junction Temperature (PDIP)
Operating Ambient Temperature Range
Output Current − High
−
140
85
°C
°C
J
T
A
−40
−
25
−
I
I
−24
24
mA
mA
OH
OL
Output Current − Low
−
−
1. V from 30% to 70% V ; see individual Data Sheets for devices that differ from the typical input rise and fall times.
in
CC
2. V from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
in
DC CHARACTERISTICS
74AC
74AC
T
=
A
V
(V)
CC
T
A
= +25°C
−40°C to
+85°C
Symbol
Parameter
Unit
Conditions
Typ
Guaranteed Limits
V
V
I
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
I
= −50 mA
OUT
Minimum High Level
Output Voltage
OH
V
V
V
*V = V or V
IH
IN
IL
3.0
4.5
5.5
−
−
−
2.56
3.86
4.86
2.46
3.76
4.76
−12 mA
−24 mA
−24 mA
I
I
OH
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
= 50 mA
OUT
Maximum Low Level
Output Voltage
OL
*V = V or V
IN
IL
IH
3.0
4.5
5.5
−
−
−
0.36
0.36
0.36
0.44
0.44
0.44
12 mA
V
I
24 mA
24 mA
OL
Maximum Input
Leakage Current
IN
5.5
−
±0.1
±1.0
mA
V = V , GND
I
CC
I
I
I
5.5
5.5
−
−
−
−
−
75
mA
mA
V
V
= 1.65 V Max
= 3.85 V Min
†Minimum Dynamic
Output Current
OLD
OHD
CC
OLD
OHD
−75
Maximum Quiescent
Supply Current
5.5
4.0
40
mA
V
= V or GND
IN CC
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE:
I
and I @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
.
CC
IN
CC
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2
MC74AC132, MC74ACT132
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC
74AC
T
= −40°C
A
T
C
= +25°C
= 50 pF
V
(V)
*
Fig.
No.
A
CC
to +85°C
C
Symbol
Parameter
Unit
L
= 50 pF
L
Min
Typ
Max
Min
Max
3.3
5.0
2.0
2.0
−
−
13.0
9.0
1.5
1.5
14.0
10.0
t
t
Propagation Delay
Propagation Delay
ns
ns
3−5
3−5
PLH
3.3
5.0
2.0
2.0
−
−
13.5
9.0
1.5
1.5
15.0
10.0
PHL
*Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
DC CHARACTERISTICS
74ACT
74ACT
T
=
A
V
(V)
CC
T
A
= +25°C
−40°C to
+85°C
Symbol
Parameter
Unit
Conditions
Typ
Guaranteed Limits
V
V
I
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
I
= −50 mA
OUT
Minimum High Level
Output Voltage
OH
V
V
*V = V or V
IH
IN
IL
4.5
5.5
−
−
3.86
4.86
3.76
4.76
−24 mA
−24 mA
I
I
OH
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
= 50 mA
OUT
Maximum Low Level
Output Voltage
OL
V
V
*V = V or V
IN
IL
IH
4.5
5.5
−
−
0.36
0.36
0.44
0.44
24 mA
24 mA
I
OL
Maximum Input
Leakage Current
IN
5.5
−
±0.1
±1.0
mA
V = V , GND
I CC
DI
Additional Max. I /Input
5.5
5.5
5.5
0.6
−
−
−
−
1.5
75
mA
mA
mA
V = V − 2.1 V
CCT
CC
I
CC
I
V
V
= 1.65 V Max
†Minimum Dynamic
Output Current
OLD
OLD
OHD
I
I
−
−75
= 3.85 V Min
OHD
CC
Maximum Quiescent
Supply Current
5.5
−
4.0
40
mA
V
= V or GND
IN CC
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74ACT
74ACT
T
= −40°C
A
T
C
= +25°C
= 50 pF
V
(V)
*
Fig.
No.
A
CC
to +85°C
C
Symbol
Parameter
Unit
L
= 50 pF
L
Min
3.0
3.0
Typ
−
Max
11.5
11.0
Min
2.5
2.5
Max
t
t
Propagation Delay
Propagation Delay
5.0
5.0
13.0
ns
ns
3−6
3−5
PLH
PHL
−
12.5
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
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3
MC74AC132, MC74ACT132
INPUT CHARACTERISTICS (unless otherwise specified)
V
(V)
CC
Symbol
Parameter
74AC
74ACT
Unit
Test Conditions
3.0
4.5
5.5
2.2
3.2
3.9
Maximum Positive
V
V
V
V
2.0
V
T
= Worst Case
t +
A
Threshold
3.0
4.5
5.5
0.5
0.9
1.1
Minimum Negative
Threshold
0.8
1.2
0.4
V
V
V
T
A
= Worst Case
= Worst Case
= Worst Case
t −
3.0
4.5
5.5
1.2
1.4
1.6
Maximum Hysteresis
Minimum Hysteresis
T
A
h(max)
h(min)
3.0
4.5
5.5
0.3
0.4
0.5
T
A
CAPACITANCE
Symbol
Value
Parameter
Unit
Test Conditions
Typ
4.5
30
C
C
Input Capacitance
Power Dissipation Capacitance
pF
pF
V
V
= 5.0 V
= 5.0 V
IN
CC
CC
PD
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4
MC74AC132, MC74ACT132
MARKING DIAGRAMS
PDIP−14
SOIC−14
SOEIAJ−14
14
1
14
14
MC74AC132N
AWLYYWWG
74AC132
ALYWG
AC132G
AWLYWW
1
1
14
14
14
1
74ACT132
ALYWG
ACT132G
AWLYWW
MC74ACT132N
AWLYYWWG
1
1
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
= Pb−Free Package
G
ORDERING INFORMATION
†
Device
MC74AC132N
Package
Shipping
PDIP−14
MC74AC132NG
PDIP−14
(Pb−Free)
25 Units/Rail
MC74ACT132N
PDIP−14
MC74ACT132NG
PDIP−14
(Pb−Free)
MC74AC132D
SOIC−14
55 Units/Rail
2500/Tape & Reel
55 Units/Rail
MC74AC132DG
SOIC−14
(Pb−Free)
MC74AC132DR2
SOIC−14
MC74AC132DR2G
SOIC−14
(Pb−Free)
MC74ACT132D
SOIC−14
MC74ACT132DG
SOIC−14
(Pb−Free)
MC74ACT132DR2
MC74ACT132DR2G
SOIC−14
2500/Tape & Reel
SOIC−14
(Pb−Free)
MC74AC132MEL
MC74AC132MELG
SOEIAJ−14
SOEIAJ−14
(Pb−Free)
2000/Tape & Reel
MC74ACT132MEL
MC74ACT132MELG
SOEIAJ−14
SOEIAJ−14
(Pb−Free)
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5
MC74AC132, MC74ACT132
PACKAGE DIMENSIONS
PDIP−14
CASE 646−06
ISSUE P
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
14
1
8
7
B
INCHES
MILLIMETERS
A
F
DIM
A
B
C
D
F
MIN
MAX
0.770
0.260
0.185
0.021
0.070
MIN
18.16
6.10
3.69
0.38
1.02
MAX
19.56
6.60
4.69
0.53
1.78
0.715
0.240
0.145
0.015
0.040
L
N
C
G
H
J
K
L
M
N
0.100 BSC
2.54 BSC
0.052
0.008
0.115
0.290
−−−
0.095
0.015
0.135
0.310
10
1.32
0.20
2.92
7.37
−−−
0.38
2.41
0.38
3.43
7.87
10
−T−
SEATING
PLANE
J
_
_
K
0.015
0.039
1.01
D 14 PL
H
G
M
M
0.13 (0.005)
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6
MC74AC132, MC74ACT132
PACKAGE DIMENSIONS
SOIC−14
CASE 751A−03
ISSUE H
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−A−
14
8
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
−B−
P 7 PL
M
M
B
0.25 (0.010)
7
1
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
F
R X 45
_
C
A
B
C
D
F
G
J
K
M
P
R
8.55
3.80
1.35
0.35
0.40
8.75 0.337 0.344
4.00 0.150 0.157
1.75 0.054 0.068
0.49 0.014 0.019
1.25 0.016 0.049
0.050 BSC
0.25 0.008 0.009
0.25 0.004 0.009
−T−
SEATING
PLANE
J
M
K
1.27 BSC
D 14 PL
0.19
0.10
0
M
S
S
0.25 (0.010)
T
B
A
7
0
7
_
_
_
_
5.80
0.25
6.20 0.228 0.244
0.50 0.010 0.019
SOLDERING FOOTPRINT*
7X
7.04
14X
1.52
1
14X
0.58
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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7
MC74AC132, MC74ACT132
PACKAGE DIMENSIONS
SOEIAJ−14
CASE 965−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
L
14
8
E
Q
1
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
H
E
E
_
M
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
L
7
1
DETAIL P
Z
D
MILLIMETERS
INCHES
MIN MAX
−−− 0.081
VIEW P
DIM MIN
MAX
2.05
0.20
0.50
0.20
10.50
5.45
A
e
A
−−−
0.05
0.35
0.10
9.90
5.10
c
A
1
b
c
0.002
0.008
0.020
0.008
0.413
0.215
0.014
0.004
0.390
0.201
D
E
e
b
A
1
1.27 BSC
0.050 BSC
H
M
7.40
0.50
1.10
8.20
0.85
1.50
0.291
0.020
0.043
0.323
0.033
0.059
0.13 (0.005)
E
0.10 (0.004)
0.50
L
E
M
0
10
10
0.035
0
0.028
_
_
_
_
Q
1
0.70
−−−
0.90
1.42
Z
−−− 0.056
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MC74AC132/D
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