2N5064G [ONSEMI]

SILICON CONTROLLED RECTIFIERS 0.8 A RMS, 30 − 200 V; 可控硅整流器0.8 A RMS , 30 A ???? 200 V
2N5064G
型号: 2N5064G
厂家: ONSEMI    ONSEMI
描述:

SILICON CONTROLLED RECTIFIERS 0.8 A RMS, 30 − 200 V
可控硅整流器0.8 A RMS , 30 A ???? 200 V

可控硅整流器
文件: 总8页 (文件大小:124K)
中文:  中文翻译
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2N5060 Series  
Sensitive Gate  
Silicon Controlled Rectifiers  
Reverse Blocking Thyristors  
Annular PNPN devices designed for high volume consumer  
applications such as relay and lamp drivers, small motor controls, gate  
drivers for larger thyristors, and sensing and detection circuits.  
Supplied in an inexpensive plastic TO92/TO-226AA package which  
is readily adaptable for use in automatic insertion equipment.  
Features  
http://onsemi.com  
SILICON CONTROLLED  
RECTIFIERS  
0.8 A RMS, 30 200 V  
Sensitive Gate Trigger Current 200 mA Maximum  
Low Reverse and Forward Blocking Current 50 mA Maximum,  
T = 110°C  
C
Low Holding Current 5 mA Maximum  
Passivated Surface for Reliability and Uniformity  
These are PbFree Devices  
G
A
K
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Rating  
Symbol  
Value  
Unit  
Peak Repetitive OffState Voltage (Note 1)  
V
V
DRM,  
RRM  
(T = *40 to 110°C, Sine Wave,  
V
J
50 to 60 Hz, R = 1 kW)  
2N5060  
2N5061  
2N5062  
2N5064  
30  
60  
100  
200  
GK  
MARKING  
DIAGRAM  
On-State Current RMS (180° Conduction  
I
0.8  
A
A
T(RMS)  
2N  
50xx  
YWW  
Angles; T = 80°C)  
C
TO92  
CASE 29  
STYLE 10  
*Average On-State Current  
I
T(AV)  
(180° Conduction Angles)  
(T = 67°C)  
C
0.51  
0.255  
C
(T = 102°C)  
1
2
3
*Peak Non-repetitive Surge Current,  
I
10  
A
TSM  
T = 25°C (1/2 cycle, Sine Wave, 60 Hz)  
A
2
2
50xx  
Y
WW  
Specific Device Code  
= Year  
= Work Week  
Circuit Fusing Considerations (t = 8.3 ms)  
*Average On-State Current  
I t  
0.4  
A s  
I
A
T(AV)  
(180° Conduction Angles)  
(T = 67°C)  
0.51  
0.255  
C
(T = 102°C)  
C
*Forward Peak Gate Power (Pulse Width v  
P
0.1  
0.01  
1.0  
W
W
A
GM  
PIN ASSIGNMENT  
Cathode  
1.0 msec; T = 25°C)  
A
1
*Forward Average Gate Power  
P
G(AV)  
2
3
Gate  
(T = 25°C, t = 8.3 ms)  
A
Anode  
*Forward Peak Gate Current (Pulse Width  
I
GM  
v 1.0 msec; T = 25°C)  
A
*Reverse Peak Gate Voltage (Pulse Width  
V
RGM  
5.0  
V
v 1.0 msec; T = 25°C)  
A
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 6 of this data sheet.  
*Operating Junction Temperature Range  
T
40 to  
°C  
°C  
J
+110  
*Storage Temperature Range  
T
stg  
40 to  
+150  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. V  
and V  
for all types can be applied on a continuous basis. Ratings  
DRM  
RRM  
apply for zero or negative gate voltage; however, positive gate voltage shall  
not be applied concurrent with negative potential on the anode. Blocking  
voltages shall not be tested with a constant current source such that the  
voltage ratings of the devices are exceeded.  
*Indicates JEDEC Registered Data.  
© Semiconductor Components Industries, LLC, 2011  
1
Publication Order Number:  
September, 2011 Rev. 10  
2N5060/D  
 
2N5060 Series  
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Max  
75  
Unit  
°C/W  
°C/W  
*Thermal Resistance, JunctiontoCase (Note 2)  
Thermal Resistance, JunctiontoAmbient  
R
q
JC  
R
200  
q
JA  
2. This measurement is made with the case mounted “flat side down” on a heatsink and held in position by means of a metal clamp over the  
curved surface.  
*Indicates JEDEC Registered Data.  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
C
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
*Peak Repetitive Forward or Reverse Blocking Current (Note 3)  
I
, I  
DRM RRM  
(V = Rated V  
or V  
)
T
C
T
C
= 25°C  
= 110°C  
10  
50  
mA  
mA  
AK  
DRM  
RRM  
ON CHARACTERISTICS  
*Peak Forward OnState Voltage (Note 4)  
V
TM  
1.7  
V
(I = 1.2 A peak @ T = 25°C)  
TM  
A
Gate Trigger Current (Continuous DC) (Note 5)  
I
mA  
GT  
*(V = 7.0 Vdc, R = 100 W)  
T
C
T
C
= 25°C  
= 40°C  
200  
350  
AK  
L
Gate Trigger Voltage (Continuous DC) (Note 5)  
T
C
T
C
= 25°C  
= 40°C  
V
0.8  
1.2  
V
V
GT  
*(V = 7.0 Vdc, R = 100 W)  
AK  
L
*Gate NonTrigger Voltage  
(V = Rated V , R = 100 W) T = 110°C  
V
GD  
0.1  
AK  
DRM  
L
C
Holding Current (Note 3)  
T
T
= 25°C  
= 40°C  
I
5.0  
10  
mA  
ms  
C
C
H
*(V = 7.0 Vdc, initiating current = 20 mA)  
AK  
Turn-On Time  
Delay Time  
Rise Time  
t
t
3.0  
0.2  
d
r
(I = 1.0 mA, V = Rated V ,  
GT  
D
DRM  
Forward Current = 1.0 A, di/dt = 6.0 A/ms  
Turn-Off Time  
t
ms  
q
(Forward Current = 1.0 A pulse,  
Pulse Width = 50 ms,  
0.1% Duty Cycle, di/dt = 6.0 A/ms,  
10  
30  
dv/dt = 20 V/ms, I = 1 mA)  
2N5060, 2N5061  
2N5062, 2N5064  
GT  
DYNAMIC CHARACTERISTICS  
Critical Rate of Rise of OffState Voltage  
dv/dt  
30  
V/ms  
(Rated V  
, Exponential, R = 1 kW)  
DRM  
GK  
*Indicates JEDEC Registered Data.  
3. R = 1000 W is included in measurement.  
GK  
4. Forward current applied for 1 ms maximum duration, duty cycle p 1%.  
5. R current is not included in measurement.  
GK  
http://onsemi.com  
2
 
2N5060 Series  
Voltage Current Characteristic of SCR  
+ Current  
Anode +  
V
TM  
Symbol  
Parameter  
V
Peak Repetitive Off State Forward Voltage  
Peak Forward Blocking Current  
Peak Repetitive Off State Reverse Voltage  
Peak Reverse Blocking Current  
Peak on State Voltage  
DRM  
DRM  
on state  
I
I
H
I
at V  
RRM  
RRM  
V
RRM  
RRM  
I
V
TM  
+ Voltage  
I
H
Holding Current  
I
at V  
DRM  
Reverse Blocking Region  
(off state)  
DRM  
Forward Blocking Region  
(off state)  
Reverse Avalanche Region  
Anode −  
CURRENT DERATING  
130  
130  
110  
90  
a
a = CONDUCTION ANGLE  
a
120  
110  
100  
90  
a = CONDUCTION ANGLE  
CASE MEASUREMENT  
POINT - CENTER OF  
FLAT PORTION  
TYPICAL PRINTED  
CIRCUIT BOARD  
MOUNTING  
dc  
70  
80  
dc  
a = 30°  
180°  
120°  
60°  
90°  
70  
50  
30  
60  
50  
90° 120°  
0.3  
, AVERAGE ON‐STATE CURRENT (AMP)  
180°  
a = 30°  
60°  
0
0.1  
0.2  
0.3  
0.4  
0.5  
0
0.1  
0.2  
0.4  
I
, AVERAGE ON‐STATE CURRENT (AMP)  
I
T(AV)  
T(AV)  
Figure 1. Maximum Case Temperature  
Figure 2. Maximum Ambient Temperature  
http://onsemi.com  
3
2N5060 Series  
CURRENT DERATING  
10  
5.0  
7.0  
5.0  
3.0  
2.0  
T = 110°C  
J
25°C  
3.0  
2.0  
1.0  
0.7  
0.5  
1.0  
1.0  
2.0 3.0  
5.0 7.0 10  
20 30  
50 70 100  
0.3  
0.2  
NUMBER OF CYCLES  
Figure 4. Maximum NonRepetitive Surge Current  
0.8  
0.6  
0.4  
180°  
120°  
0.1  
0.07  
0.05  
a
90°  
60°  
a = CONDUCTION ANGLE  
a = 30°  
0.03  
0.02  
dc  
0.2  
0
0.01  
0
0.5  
1.0  
1.5  
2.0  
2.5  
0
0.1  
0.2  
0.3  
0.4  
0.5  
v , INSTANTANEOUS ON‐STATE VOLTAGE (VOLTS)  
T
I , AVERAGE ON‐STATE CURRENT (AMP)  
T(AV)  
Figure 3. Typical Forward Voltage  
Figure 5. Power Dissipation  
http://onsemi.com  
4
2N5060 Series  
1.0  
0.5  
0.2  
0.1  
0.05  
0.02  
0.01  
0.002  
0.005  
0.01  
0.02  
0.05  
0.1  
0.2  
0.5  
1.0  
2.0  
5.0  
10  
20  
t, TIME (SECONDS)  
Figure 6. Thermal Response  
TYPICAL CHARACTERISTICS  
0.8  
0.7  
0.6  
0.5  
200  
V
= 7.0 V  
AK  
R = 100  
V
= 7.0 V  
AK  
R = 100  
100  
50  
L
L
R
= 1.0 k  
GK  
2N5062‐64  
20  
10  
5.0  
2N5060‐61  
2.0  
1.0  
0.5  
0.4  
0.3  
0.2  
75  
-50  
-25  
0
25  
50  
75  
100 110  
-75  
-50  
-25  
0
25  
50  
75  
100 110  
T , JUNCTION TEMPERATURE (°C)  
J
T , JUNCTION TEMPERATURE (°C)  
J
Figure 8. Typical Gate Trigger Current  
Figure 7. Typical Gate Trigger Voltage  
4.0  
3.0  
V
= 7.0 V  
AK  
R = 100  
L
R
= 1.0 k  
GK  
2.0  
2N5060,61  
1.0  
0.8  
2N5062‐64  
0.6  
0.4  
-75  
-50  
-25  
0
25  
50  
75  
100 110  
T , JUNCTION TEMPERATURE (°C)  
J
Figure 9. Typical Holding Current  
http://onsemi.com  
5
2N5060 Series  
ORDERING INFORMATION  
Device  
Package  
Shipping  
2N5060G  
TO92  
(PbFree)  
5000 Units / Box  
2N5060RLRA  
TO92  
2000 / Tape & Reel  
2000 / Tape & Reel  
2N5060RLRAG  
TO92  
(PbFree)  
2N5060RLRMG  
2N5061G  
TO92  
2000 / Ammo Pack  
5000 Units / Box  
2000 / Tape & Reel  
5000 Units / Box  
2000 / Tape & Reel  
2000 / Ammo Pack  
2000 / Tape & Reel  
5000 Units / Box  
(PbFree)  
TO92  
(PbFree)  
2N5061RLRAG  
2N5062G  
TO92  
(PbFree)  
TO92  
(PbFree)  
2N5062RLRAG  
2N5064RLRMG  
2N5064RLRAG  
2N5064G  
TO92  
(PbFree)  
TO92  
(PbFree)  
TO92  
(PbFree)  
TO92  
(PbFree)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
http://onsemi.com  
6
2N5060 Series  
PACKAGE DIMENSIONS  
TO92 (TO226)  
CASE 2911  
ISSUE AM  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
3. CONTOUR OF PACKAGE BEYOND DIMENSION R  
IS UNCONTROLLED.  
A
STRAIGHT LEAD  
BULK PACK  
B
R
4. LEAD DIMENSION IS UNCONTROLLED IN P AND  
BEYOND DIMENSION K MINIMUM.  
P
L
INCHES  
DIM MIN MAX  
MILLIMETERS  
SEATING  
PLANE  
K
MIN  
4.45  
4.32  
3.18  
0.407  
1.15  
2.42  
0.39  
12.70  
6.35  
2.04  
---  
MAX  
5.20  
5.33  
4.19  
0.533  
1.39  
2.66  
0.50  
---  
A
B
C
D
G
H
J
0.175  
0.170  
0.125  
0.016  
0.045  
0.095  
0.015  
0.500  
0.250  
0.080  
---  
0.205  
0.210  
0.165  
0.021  
0.055  
0.105  
0.020  
---  
D
X X  
G
J
H
V
K
L
---  
---  
N
P
R
V
0.105  
0.100  
---  
2.66  
2.54  
---  
C
SECTION XX  
0.115  
0.135  
2.93  
3.43  
1
N
---  
---  
N
NOTES:  
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. CONTOUR OF PACKAGE BEYOND  
DIMENSION R IS UNCONTROLLED.  
A
BENT LEAD  
TAPE & REEL  
AMMO PACK  
B
R
4. LEAD DIMENSION IS UNCONTROLLED IN P  
AND BEYOND DIMENSION K MINIMUM.  
P
T
MILLIMETERS  
SEATING  
PLANE  
DIM MIN  
MAX  
5.20  
5.33  
4.19  
0.54  
2.80  
0.50  
---  
K
A
B
C
D
G
J
4.45  
4.32  
3.18  
0.40  
2.40  
0.39  
12.70  
2.04  
1.50  
2.93  
3.43  
D
X X  
G
K
N
P
R
V
J
2.66  
4.00  
---  
V
C
---  
SECTION XX  
STYLE 10:  
1
N
PIN 1. CATHODE  
2. GATE  
3. ANODE  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 8002829855 Toll Free  
USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center  
Phone: 81357733850  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 3036752175 or 8003443860 Toll Free USA/Canada  
Fax: 3036752176 or 8003443867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
2N5060/D  
Mouser Electronics  
Authorized Distributor  
Click to View Pricing, Inventory, Delivery & Lifecycle Information:  
ON Semiconductor:  
2N5060 2N5060RLRA 2N5060RLRAG 2N5060RLRM 2N5060RLRMG 2N5061 2N5061G 2N5061RLRA  
2N5061RLRAG 2N5062 2N5062G 2N5062RLRA 2N5062RLRAG 2N5064 2N5064RLRA 2N5064RLRAG  
2N5064RLRM 2N5064RLRMG 2N5060G 2N5064G  

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