TDA8002C/AD [NXP]

IC SPECIALTY MICROPROCESSOR CIRCUIT, PDSO28, 7.50 MM, PLASTIC, SO-28, Microprocessor IC:Other;
TDA8002C/AD
型号: TDA8002C/AD
厂家: NXP    NXP
描述:

IC SPECIALTY MICROPROCESSOR CIRCUIT, PDSO28, 7.50 MM, PLASTIC, SO-28, Microprocessor IC:Other

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INTEGRATED CIRCUITS  
DATA SHEET  
TDA8002  
IC card interface  
1997 Nov 04  
Product specification  
Supersedes data of 1997 Mar 13  
File under Integrated Circuits, IC02  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
Supply supervisor for spikes elimination and emergency  
FEATURES  
deactivation.  
Single supply voltage interface (3.3 or 5 V environment)  
Low-power sleep mode  
APPLICATIONS  
Three specific protected half-duplex bidirectional  
IC card readers for:  
– GSM applications  
– banking  
buffered I/O lines  
VCC regulation (5 V ±5%, ICC <65 mA at VDD = 5 V, with  
controlled rise and fall times  
Thermal and short-circuit protections with current  
limitations  
– electronic payment  
– identification  
– Pay TV  
Automatic ISO 7816 activation and deactivation  
sequences  
– road tolling.  
Enhanced ESD protections on card side (>6 kV)  
Clock generation for the card up to 12 MHz with  
synchronous frequency changes  
GENERAL DESCRIPTION  
The TDA8002 is a complete low-power, analog interface  
for asynchronous and synchronous cards. It can be placed  
between the card and the microcontroller. It performs all  
supply, protection and control functions. It is directly  
compatible with ISO 7816, GSM11.11 and EMV  
specifications.  
Clock generation up to 20 MHz (auxiliary clock)  
Synchronous and asynchronous cards (memory and  
smart cards)  
ISO 7816, GSM11.11 compatibility and EMV (Europay,  
Mastercard, Visa) compliant  
Step-up converter for VCC generation  
QUICK REFERENCE DATA  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
Supply  
VDDA  
IDD  
analog supply voltage  
supply current  
3.0  
5
6.5  
150  
6
V
sleep mode  
µA  
mA  
idle mode; fCLK = 2.5 MHz;  
fCLKOUT = 10 MHz; VDD = 5 V  
active mode; fCLK = 2.5 MHz;  
fCLKOUT = 10 MHz; VDD = 5 V  
9
mA  
mA  
active mode; fCLK = 2.5 MHz;  
12  
fCLKOUT = 10 MHz; VDD = 3 V  
Card supply  
VCC(O)  
output voltage  
output current  
DC load <65 mA  
4.75  
5.25  
100  
V
ICC(O)  
VCC short-circuited to GND  
mA  
General  
fCLK  
Tde  
Ptot  
card clock frequency  
0
12  
MHz  
deactivation cycle time  
continuous total power dissipation  
TDA8002AT; TDA8002BT  
TDA8002G  
60  
80  
100  
µs  
T
amb = 25 to +85 °C  
amb = 25 to +85 °C  
0.56  
0.46  
+85  
W
W
°C  
T
Tamb  
operating ambient temperature  
25  
1997 Nov 04  
2
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
ORDERING INFORMATION  
TYPE NUMBER(1)  
PACKAGE  
DESCRIPTION  
MARKING  
NAME  
VERSION  
TDA8002AT/3/C2(2) TDA8002AT/3  
TDA8002AT/5/C2(3) TDA8002AT/5  
TDA8002BT/3/C2(2) TDA8002BT/3  
TDA8002BT/5/C2(3) TDA8002BT/5  
TDA8002G/3/C2(2) 80023  
SO28 plastic small outline package; 28 leads;  
body width 7.5 mm  
SOT136-1  
LQFP32 plastic low profile quad flat package; 32 leads;  
SOT401-1  
body 5 × 5 × 1.4 mm  
TDA8002G/5/C2(3) 80025  
Notes  
1. The /3 or /5 suffix indicates the voltage supervisor option.  
2. The /3 version can be used with a 3 or 5 V power supply environment (see Chapter “Functional description”).  
3. The /5 version can be used with a 5 V power supply environment.  
1997 Nov 04  
3
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
BLOCK DIAGRAM  
V
V
DDD  
100 nF  
DDA  
100 nF  
100 nF  
S1  
14  
S2  
12  
13  
28  
SUPPLY  
4
STEP-UP CONVERTER  
ALARM  
ALARM  
INTERNAL  
REFERENCE  
3
V
REF  
VUP  
15  
INTERNAL OSCILLATOR  
f
INT  
100 nF  
VOLTAGE SENSE  
ALARM  
EN1 CLKUP  
EN2  
26  
25  
24  
27  
V
23  
22  
OFF  
RSTIN  
CC  
PV  
V
CC  
CC  
GENERATOR  
100  
nF  
CMDVCC  
MODE  
EN5  
RST  
RST  
BUFFER  
SEQUENCER  
19  
18  
6
7
5
PRES  
PRES  
CLKDIV1  
CLKDIV2  
CLKSEL  
HORSEQ  
CLK  
CLOCK  
CIRCUITRY  
EN4  
21  
CLOCK  
BUFFER  
8
9
CLK  
STROBE  
CLKOUT  
EN3  
THERMAL  
PROTECTION  
30  
31  
XTAL1  
XTAL2  
OSCILLATOR  
20  
17  
16  
1
2
I/O  
AUX1  
AUX2  
I/O  
AUX1UC  
AUX2UC  
TRANSCEIVER  
TDA8002G  
I/O  
TRANSCEIVER  
32  
I/O  
I/OUC  
TRANSCEIVER  
29  
11  
10  
MGE730  
DGND2  
AGND  
DGND1  
All capacitors are mandatory.  
Fig.1 Block diagram (TDA8002G).  
4
1997 Nov 04  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
PINNING  
PIN  
TYPE A TYPE B TYPE G  
SYMBOL  
I/O  
DESCRIPTION  
XTAL1  
XTAL2  
I/OUC  
1
2
3
4
1
2
3
4
30  
31  
32  
1
I/O  
I/O  
I/O  
I/O  
crystal connection or input for external clock  
crystal connection  
data I/O line to and from microcontroller  
AUX1UC  
auxiliary line to and from microcontroller for synchronous  
applications  
AUX2UC  
5
2
I/O  
auxiliary line to and from microcontroller for synchronous  
applications  
ALARM  
ALARM  
5
6
3
4
O
O
open drain NMOS reset output for microcontroller (active LOW)  
6
open drain PMOS reset output for microcontroller (active  
HIGH)  
CLKSEL  
7
7
5
I
control input signal for CLK (LOW = XTAL oscillator;  
HIGH = STROBE input)  
CLKDIV1  
CLKDIV2  
STROBE  
CLKOUT  
DGND1  
AGND  
S2  
8
8
6
I
I
control input with CLKDIV2 for choosing CLK frequency  
control input with CLKDIV1 for choosing CLK frequency  
external clock input for synchronous applications  
clock output (see Table 1)  
9
9
7
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
10  
11  
12  
13  
14  
15  
16  
17  
18  
8
I
9
O
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
supply digital ground 1  
supply analog ground  
I/O  
capacitance connection for voltage doubler  
VDDA  
supply analog supply voltage  
S1  
I/O  
I/O  
I/O  
I/O  
I
capacitance connection for voltage doubler  
VUP  
output of voltage doubler (connect to 100 nF)  
data I/O line to and from card  
I/O  
AUX2  
PRES  
PRES  
AUX1  
CLK  
auxiliary I/O line to and from card  
active LOW card input presence contact  
active HIGH card input presence contact  
auxiliary I/O line to and from card  
clock to card output (C3) (see Table 1)  
card reset output (C2)  
19  
20  
21  
22  
23  
24  
25  
I
21  
22  
23  
24  
25  
I/O  
O
RST  
O
VCC  
O
supply for card (C1) (decouple with 100 nF)  
CMDVCC  
I
active LOW start activation sequence input from  
microcontroller  
RSTIN  
OFF  
26  
27  
26  
27  
25  
26  
I
card reset input from microcontroller  
O
open drain NMOS interrupt output to microcontroller (active  
LOW)  
MODE  
VDDD  
28  
28  
27  
28  
29  
I
operating mode selection input (HIGH = normal; LOW = sleep)  
supply digital supply voltage  
supply digital ground 2  
DGND2  
1997 Nov 04  
5
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
handbook, halfpage  
handbook, halfpage  
XTAL1  
XTAL2  
I/OUC  
MODE  
28  
1
2
XTAL1  
XTAL2  
MODE  
OFF  
1
2
28  
27  
26  
25  
24  
OFF  
27  
26  
25  
24  
3
RSTIN  
CMDVCC  
I/OUC  
3
RSTIN  
CMDVCC  
AUX1UC  
ALARM  
4
AUX1UC  
AUX2UC  
ALARM  
4
V
V
5
5
CC  
CC  
ALARM  
6
23 RST  
CLK  
23 RST  
CLK  
6
CLKSEL  
CLKDIV1  
CLKDIV2  
STROBE  
CLKOUT  
22  
7
CLKSEL  
CLKDIV1  
CLKDIV2  
STROBE  
CLKOUT  
22  
7
TDA8002B  
TDA8002A  
8
21 AUX1  
8
21 AUX1  
PRES  
PRES  
I/O  
9
20  
19  
18  
17  
16  
15  
PRES  
AUX2  
I/O  
9
20  
19  
18  
17  
16  
15  
10  
11  
10  
11  
DGND1 12  
AGND  
VUP  
S1  
DGND1 12  
AGND  
VUP  
S1  
13  
S2 14  
13  
S2 14  
V
V
DDA  
DDA  
MGE732  
MGE731  
Fig.2 Pin configuration (TDA8002A).  
Fig.3 Pin configuration (TDA8002B).  
AUX1UC  
AUX2UC  
ALARM  
CMDVCC  
1
2
3
4
5
6
7
8
24  
23  
V
CC  
22 RST  
ALARM  
21  
20  
19  
18  
17  
CLK  
TDA8002G  
CLKSEL  
CLKDIV1  
CLKDIV2  
STROBE  
AUX1  
PRES  
PRES  
AUX2  
MGE733  
Fig.4 Pin configuration (TDA8002G).  
6
1997 Nov 04  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
FUNCTIONAL DESCRIPTION  
Power supply  
Clock circuitry  
The TDA8002 supports both synchronous and  
asynchronous cards (I2C-bus memories requiring an  
acknowledge signal from the master are not supported).  
There are three methods to clock the circuitry:  
The supply pins for the chip are VDDA, VDDD, AGND,  
DGND1 and DGND2. VDDA and VDDD (i.e. VDD) should be  
in the range of 3.0 to 6.5 V. All card contacts remain  
inactive during power-up or power-down.  
Apply a clock signal to pin STROBE  
Use of an internal RC oscillator  
On power-up, the logic is reset by an internal signal.  
The sequencer is not activated until VDD reaches  
Vth2 + Vhys2 (see Fig.5). When VDD falls below Vth2, an  
automatic deactivation sequence of the contacts is  
performed.  
Use of a quartz oscillator which should be connected  
between pins XTAL1 and XTAL2.  
When CLKSEL is HIGH, the clock should be applied on the  
STROBE pin, and when CLKSEL is LOW, one of the  
internal oscillators is used.  
Supply voltage supervisor (VDD  
)
When an internal clock is used, the clock output is  
available on pin CLKOUT. The RC oscillator is selected by  
making CLKDIV1 HIGH and CLKDIV2 LOW. The clock  
output to the card is available on pin CLK. The frequency  
of the card clock can be the input frequency divided by  
2 or 4, STOP LOW or 1.25 MHz, depending on the states  
of CLKDIV1 or CLKDIV2 (see Table 1).  
This block surveys the VDD supply. A defined reset pulse  
of 10 ms minimum (tW) can be retriggered and is delivered  
on the ALARM outputs during power-up or power-down of  
VDD (see Fig.5). This signal is also used for eliminating the  
spikes on card contacts during power-up or power-down.  
When VDD reaches Vth2 + Vhys2, an internal delay is  
started. The ALARM outputs are active until this delay has  
expired. When VDD falls below Vth2, ALARM is activated  
and a deactivation sequence of the contacts is performed.  
Do not change CLKSEL during activation. When in  
low-power (sleep) mode, the internal oscillator frequency  
which is available on pin CLKOUT is lowered to  
approximately 16 kHz for power-economy purposes.  
For 3 V supply, the supervisor option must be chosen at  
3 V. For 5 V supply, both options (3 or 5 V) may be chosen  
depending on the application.  
V
V
+ V  
hys2  
th2  
th2  
V
DD  
t
t
W
W
ALARM  
ALARM  
MGE734  
Fig.5 Alarm as a function of VDD (pulse width 10 ms).  
1997 Nov 04  
7
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
Table 1 Clock circuitry definition  
FREQUENCY  
OF CLK  
FREQUENCY  
OF CLKOUT  
MODE  
CLKSEL  
CLKDIV1  
CLKDIV2  
HIGH  
HIGH  
HIGH  
HIGH  
HIGH  
LOW(2)  
LOW  
LOW  
LOW  
LOW  
HIGH  
X(1)  
HIGH  
LOW  
LOW  
HIGH  
X(1)  
LOW  
LOW  
HIGH  
HIGH  
X(1)  
12fint  
14fxtal  
12fxtal  
12fint  
fxtal  
fxtal  
fxtal  
fxtal  
STOP LOW  
STROBE  
STOP LOW  
X(1)  
X(1)  
12fint  
(3)  
Notes  
1. X = don’t care.  
2. In low-power mode.  
3. fint = 32 kHz in low-power mode.  
When the input is back to HIGH level, a current booster is  
turned on during the delay td on the output side and then  
both sides are back to their idle state, ready to detect the  
next logic 0 on any side.  
I/O circuitry  
The three I/O transceivers are identical. The state is HIGH  
for all I/O pins (i.e. I/O, I/OUC, AUX1, AUX1UC, AUX2 and  
AUX2UC). Pin I/O is referenced to VCC and pin I/OUC to  
In case of a conflict, both lines may remain LOW until the  
software enables the lines to be HIGH. The anti-latch  
circuitry ensures that the lines do not remain LOW if both  
sides return HIGH, regardless of the prior conditions.  
The maximum frequency on the lines is approximately  
1 MHz.  
V
DD, thus ensuring proper operation in case VCC VDD.  
The first side on which a falling edge is detected becomes  
a master (input). An anti-latch circuitry first disables the  
detection of the falling edge on the other side, which  
becomes slave (output).  
After a delay time td (about 50 ns), the logic 0 present on  
the master side is transferred on the slave side.  
I/O  
I/OUC  
t
t
t
d
conflict  
idle  
d
d
MGD703  
Fig.6 Master and slave signals.  
1997 Nov 04  
8
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
If pin MODE goes LOW in the active mode, a normal  
deactivation sequence is performed before entering  
low-power mode. When pin MODE goes HIGH, the circuit  
enters normal operation after a delay of at least 6 ms  
(96 cycles of CLKOUT). During this time the CLKOUT  
remains at 16 kHz.  
Logic circuitry  
After power-up, the circuit has six possible states of  
operation. Table 1 shows the sequence of these states.  
IDLE MODE  
After reset, the circuit enters the idle mode.  
A minimum number of functions in the circuit are active  
while waiting for the microcontroller to start a session:  
All card contacts are inactive  
Oscillator XTAL does not run  
The VDD supervisor, ALARM output, card presence  
detection and OFF output remain functional  
All card contacts are inactive  
I/OUC, AUX1UC and AUX2UC are high-impedance  
Oscillator XTAL runs, delivering CLKOUT  
Voltage supervisor is active.  
Internal oscillator is slowed to 32 kHz, CLKOUT  
providing 16 kHz.  
ACTIVE MODE  
LOW-POWER (SLEEP) MODE  
When the activation sequence is completed, the TDA8002  
will be in the active mode. Data is exchanged between the  
card and the microcontroller via the I/O lines.  
When pin MODE goes LOW, the circuit enters the  
low-power (sleep) mode. As long as pin MODE is LOW, no  
activation is possible.  
State diagram  
ACTIVATION  
POWER  
OFF  
IDLE  
MODE  
ACTIVE  
FAULT  
MODE  
LOW-POWER  
MODE  
DEACTIVATION  
MGE735  
Fig.7 State diagram.  
1997 Nov 04  
9
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
Figures 8 to 10 illustrate the activation sequence as  
ACTIVATION SEQUENCE  
described below:  
From idle mode, the circuit enters the activation mode  
when the microcontroller sets the CMDVCC line LOW or  
sets the MODE line HIGH when the CMDVCC line is  
already LOW. The internal circuitry is then activated, the  
internal clock is activated and an activation sequence is  
executed. When RST is enabled, it becomes the inverse of  
RSTIN.  
1. Step-up converter is started (t1 t0)  
2. VCC rises from 0 to 5 V (t2 = t1 + 112T)  
3. I/O, AUX1, AUX2 are enabled and CLK is enabled  
(t3 = t1 + 4T); a special circuitry ensures that I/O  
remains below VCC during falling slope of VCC  
4. CLK is set by setting RSTIN to HIGH (t4)  
5. RST is enabled (t5 = t1 + 7T); after t5, RSTIN has no  
further action on CLK, but is only controlling RST.  
OSC_INT/64  
t
act  
T = 25 µs  
t
CMDVCC  
VUP  
0
t
1
t
V
2
CC  
t
t
3
5
I/O  
CLK  
high - Z  
t
4
RSTIN  
RST  
MGE736  
Fig.8 Activation sequence using RSTIN and CMDVCC.  
1997 Nov 04  
10  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
OSC_INT/64  
t
act  
CLKDIV1  
CLKDIV2  
t
CMDVCC  
VUP  
0
t
1
t
V
2
CC  
t
3
I/O  
CLK  
high - Z  
RSTIN  
RST  
MGE737  
Fig.9 Activation sequence using CMDVCC, CLKDIV1 and CLKDIV2 signals to enable CLK.  
t
OSC_INT/64  
act  
PRES, OFF  
CMDVCC  
V
CC  
I/O  
RSTIN  
high - Z  
STROBE  
RST  
MGE738  
Fig.10 Activation sequence for synchronous application.  
11  
1997 Nov 04  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
Figures 11 and 12 illustrate the deactivation sequence as  
described below:  
DEACTIVATION SEQUENCE  
When a session is completed, the microcontroller sets the  
CMDVCC line to HIGH state or MODE line to LOW state.  
The circuit then executes an automatic deactivation  
sequence by counting the sequencer down and ends in  
idle mode.  
1. RST goes LOW (t11 t10)  
2. CLK is stopped (t12 = t11 + 12T)  
3. I/O, AUX1, AUX2 are outputs into high-impedance  
state (t13 = t11 + T)  
4. VCC falls to zero (t14 = t11 + 112T); a special circuitry  
ensures that I/O remains below VCC during falling  
slope of VCC  
5. VUP falls (t15 = t11 + 5T).  
t
OSC_INT/64  
de  
t
10  
CMDVCC  
VUP  
t
15  
t
14  
V
CC  
t
13  
I/O  
CLK  
high - Z  
t
12  
RSTIN  
RST  
t
11  
MGE739  
Fig.11 Deactivation sequence.  
1997 Nov 04  
12  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
When one or more of these faults are detected, the circuit  
pulls the interrupt line OFF to its active LOW state and a  
deactivation sequence is initiated. In case the card is  
present the interrupt line OFF is set to HIGH when the  
microcontroller has reset the CMDVCC line HIGH (after  
completion of the deactivation sequence). In case the card  
is not present OFF remains LOW.  
Fault detection  
The following fault conditions are monitored by the circuit:  
Short-circuit or high current on VCC  
Removing card during transaction  
VDD dropping  
Overheating.  
t
OSC_INT/64  
de  
t
OFF  
10  
PRES  
t
14  
V
CC  
t
13  
I/O  
CLK  
RST  
high - Z  
t
12  
t
11  
MGE740  
Fig.12 Emergency deactivation sequence.  
1997 Nov 04  
13  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 134); note 1.  
SYMBOL  
VDD  
PARAMETER  
supply voltage  
CONDITIONS  
MIN.  
0.3  
MAX.  
+6.5  
UNIT  
V
V
Vi(CMOS)  
voltage on CMOS pins  
XTAL1, XTAL2, ALARM, ALARM,  
MODE, RSTIN, CLKSEL, AUX2UC,  
AUX1UC, CLKDIV1, CLKDIV2,  
CLKOUT, STROBE, CMDVCC and  
OFF  
0.3  
+6.5  
Vi(card)  
voltage on card contact pins  
I/O, AUX2, PRES, PRES, AUX1,  
CLK, RST and VCC  
0.3  
6  
+6.5  
+6  
V
Ves  
electrostatic handling  
on pins I/O, RST, VCC, CLK, AUX1,  
AUX2, PRES and PRES  
kV  
on all other pins  
2  
+2  
kV  
Tstg  
Ptot  
storage temperature  
continuous total power dissipation  
TDA8002T  
55  
+125  
°C  
T
amb = 25 to +85 °C  
amb = 25 to +85 °C  
0.56  
0.46  
+85  
150  
W
W
°C  
°C  
TDA8002G  
T
Tamb  
Tj  
operating ambient temperature  
junction temperature  
25  
Note  
1. Stress beyond these levels may cause permanent damage to the device. This is a stress rating only and functional  
operation of the device under this condition is not implied.  
HANDLING  
Every pin withstands the ESD test according to MIL-STD-883C class 3 for card contacts, class 2 for the remaining.  
Method 3015 (HBM 1500 , 100 pF) 3 positive pulses and 3 negative pulses on each pin referenced to ground.  
THERMAL CHARACTERISTICS  
SYMBOL  
Rth(j-a)  
PARAMETER  
VALUE  
UNIT  
thermal resistance from junction to ambient in free air  
SOT136-1  
SOT401-1  
70  
91  
K/W  
K/W  
1997 Nov 04  
14  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
CHARACTERISTICS  
VDD = 5 V; Tamb = 25 °C; fxtal = 10 MHz; unless otherwise specified.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
Supply  
VDD  
positive supply voltage  
option 5 V power supply  
(TDA8002xx/5)  
4.5  
5
5
6.5  
V
V
option 3.3 V or 5 V power  
supply (TDA8002xx/3)  
3
6.5  
IDD(sl)  
supply current  
supply current  
sleep mode; VDD = 5 V  
200  
6
µA  
IDD(idle)  
idle mode; VDD = 5 V;  
fCLK = 2.5 MHz;  
mA  
fCLKOUT = 10 MHz  
IDD(active)  
supply current  
active mode  
V
DD = 5 V;  
9
mA  
mA  
fCLK = 2.5 MHz;  
fCLKOUT = 10 MHz  
V
DD = 3.3 V;  
fCLK = 2.5 MHz;  
CLKOUT = 10 MHz  
falling  
12  
f
Vth2  
threshold voltage on VDD for  
voltage supervisor  
option 5 V power supply 3.9  
(TDA8002xx/5)  
4.05  
2.7  
4.2  
2.8  
V
V
option 3.3 V or 5 V power 2.6  
supply (TDA8002xx/3)  
rising  
option 5 V power supply  
(TDA8002xx/5)  
4
4.2  
4.4  
V
option 3.3 or 5 V power 2.7  
supply (TDA8002xx/3)  
2.85  
150  
2.99  
200  
V
Vhys2  
hysteresis on Vth2  
output voltage  
100  
mV  
CARD SUPPLY  
VCC(O)(idle)  
idle mode  
0.4  
V
VCC(O)(active) output voltage  
active mode  
I
CC < 20 mA: DC load  
with 3 V < VDD < 3.3 V  
CC < 65 mA: DC load  
with 3.3 V < VDD < 6.5 V  
CC = 40 mA: AC load  
VCC(O) = from 0 to 5 V  
CC short-circuited to  
4.75  
4.75  
5.25  
5.25  
V
V
I
I
4.6  
5.4  
65  
V
ICC(O)  
output current  
slew rate  
mA  
mA  
V
100  
ground  
SR  
rising or falling slope  
0.12  
0.17  
0.22  
V/µs  
1997 Nov 04  
15  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
Crystal connections (XTAL1 and XTAL2)  
Cext  
fxtal  
external capacitors  
note 1  
note 2  
15  
pF  
resonance frequency  
2
24  
MHz  
Data lines  
GENERAL  
tedge  
delay between falling edge of  
I/O, AUX1, AUX2 and I/OUC,  
AUX1UC, AUX2UC  
200  
200  
ns  
ns  
µs  
delay between falling edge of  
I/OUC, AUX1UC, AUX2UC and  
I/O, AUX1, AUX2  
tr, tf  
rise and fall times  
Ci = Co = 30 pF  
0.5  
DATA LINES I/O, AUX1 AND AUX2  
VOH(I/O)  
HIGH-level output voltage on  
data lines  
IOH = 20 µA  
V
CC 0.5  
VCC + 0.1 V  
I
OH = 100 µA  
3.5  
V
VOL(I/O)  
VIH(I/O)  
VIL(I/O)  
VI/O(idle)  
Rpu  
LOW-level output voltage on  
data lines  
II/O = 1 mA  
300  
mV  
HIGH-level input voltage on data  
lines  
1.8  
0
VCC  
0.8  
0.4  
12  
V
LOW-level input voltage on data  
lines  
V
voltage on data lines outside a  
session  
V
internal pull-up resistance  
between data lines and VCC  
8
10  
1
kΩ  
mA  
µA  
µA  
Iedge  
current from data lines when  
active pull-up is active  
IIL(I/O)  
IIH(I/O)  
LOW-level input current on data VIL = 0.4 V  
lines  
600  
10  
HIGH-level input current on data VIH = VCC  
lines  
DATA LINES I/OUC, AUX1UC AND AUX2UC  
VOH(I/OUC)  
VOL(I/OUC)  
VIH(I/OUC)  
VIL(I/OUC)  
ZI/OUC(idle)  
HIGH-level output voltage on  
data lines  
IOH = 20 µA  
V
DD 1  
VDD + 0.2 V  
LOW-level output voltage on  
data lines  
II/OUC = 1 mA  
300  
VDD  
0.3VDD  
mV  
HIGH-level input voltage on data  
lines  
0.7VDD  
V
LOW-level input voltage on data  
lines  
0
V
impedance on data lines outside  
a session  
10  
MΩ  
1997 Nov 04  
16  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
ALARM, ALARM and OFF when connected (open-drain outputs)  
IOH(ALARM)  
HIGH-level output current on  
pin ALARM  
VOH(ALARM) = 5 V  
IOL(ALARM) = 2 mA  
VOH(OFF) = 5 V  
V
6
5
µA  
V
VOL(ALARM) LOW-level output voltage on  
pin ALARM  
0.4  
5
IOH(OFF)  
HIGH-level output current on  
pin OFF  
µA  
V
VOL(OFF)  
IOL(ALARM)  
LOW-level output voltage on  
pin OFF  
I
OL(OFF) = 2 mA  
0.4  
5  
LOW-level output current on  
pin ALARM  
VOL(ALARM) = 0 V  
µA  
V
VOH(ALARM) HIGH-level output voltage on  
pin ALARM  
IOH(ALARM) = 2 mA  
DD 1  
tW  
ALARM pulse width  
20  
ms  
Clock output (CLKOUT; powered from VDD  
)
fCLKOUT  
frequency on CLKOUT  
0
0
V
20  
MHz  
kHz  
V
low power  
16  
VOL  
VOH  
tr, tf  
δ
LOW-level output voltage  
HIGH-level output voltage  
rise and fall times  
IOL = 1 mA  
0.5  
IOH = 1 mA  
DD 0.5  
V
CL = 15 pF; notes 3 and 5  
8
ns  
duty factor  
CL = 15 pF; notes 3 and 5 40  
60  
%
Internal oscillator  
fint  
frequency of internal oscillator  
active mode  
sleep mode  
2.2  
2.7  
32  
3.2  
MHz  
kHz  
Card reset output (RST)  
VO(inact)  
td(RST)  
VOL  
output voltage  
inactive modes  
0
0.3  
V
delay between RSTIN and RST RST enabled  
100  
0.3  
ns  
V
LOW-level output voltage  
HIGH-level output voltage  
IOL = 200 µA  
0
VOH  
IOH = 200 µA  
4.3  
VCC  
VCC  
V
IOH = 50 µA  
V
CC 0.5  
V
Card clock output (CLK)  
VO(inact)  
output voltage  
inactive modes  
IOL = 200 µA  
0
0
V
0.3  
0.3  
VCC  
8
V
VOL  
VOH  
tr  
LOW-level output voltage  
HIGH-level output voltage  
rise time  
V
IOH = 50 µA  
CC 0.5  
V
CL = 30 pF; note 3  
CL = 30 pF; note 3  
CL = 30 pF; note 3  
ns  
ns  
%
tf  
fall time  
8
δ
duty factor  
45  
55  
SR  
slew rate (rise and fall)  
0.2  
V/ns  
1997 Nov 04  
17  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
Strobe input (STROBE)  
fSTROBE  
VIL  
frequency on STROBE  
0
0
20  
MHz  
V
LOW-level input voltage  
HIGH-level input voltage  
0.3VDD  
VDD  
VIH  
0.7VDD  
V
Logic inputs (CLKSEL, CLKDIV1, CLKDIV2, MODE, CMDVCC and RSTIN); note 4  
VIL  
VIH  
LOW-level input voltage  
HIGH-level input voltage  
0
0.8  
V
V
1.8  
VDD  
Logic inputs (PRES, PRES); note 4  
VIL  
LOW-level input voltage  
HIGH-level input voltage  
0
0.3VDD  
VDD  
V
VIH  
0.7VDD  
V
IIL(PRES)  
LOW-level input current on  
pin PRES  
VOL = 0 V  
10  
µA  
IIH(PRES)  
HIGH-level input current on  
pin PRES  
10  
µA  
Protections  
Tsd  
shut-down local temperature  
shut-down current at VCC  
135  
°C  
ICC(sd)  
90  
mA  
Timing  
tact  
activation sequence duration  
see Fig.9; guaranteed by  
design  
180  
70  
220  
90  
µs  
µs  
µs  
µs  
tde  
t3  
deactivation sequence duration see Fig.11; guaranteed by 50  
design  
start of the window for sending  
CLK to the card  
see Figs 8 and 9  
130  
t5  
end of the window for sending  
CLK to the card  
see Fig.8  
150  
Notes  
1. It may be necessary to put capacitors from XTAL1 and XTAL2 to ground depending on the choice of crystal or  
resonator.  
2. When the oscillator is stopped in mode 1, XTAL1 is set to HIGH.  
t1  
3. The transition time and duty cycle definitions are shown in Fig.13; δ =  
--------------  
t1 + t2  
4. PRES and CMDVCC are active LOW; RSTIN and PRES are active HIGH.  
5. CLKOUT transition time and duty cycle do not need to be tested.  
1997 Nov 04  
18  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
t
t
f
r
V
90%  
90%  
OH  
1/2 V  
CC  
10%  
10%  
V
OL  
t
t
1
2
MGE741  
Fig.13 Definition of transition times.  
1997 Nov 04  
19  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
APPLICATION INFORMATION  
33 pF  
33 pF  
f = 14.75 MHz  
+5 V  
V
P1-0  
P1-1  
P1-2  
P1-3  
P1-4  
P1-5  
P1-6  
P1-7  
RST  
CC  
P0-0  
P0-1  
P0-2  
P0-3  
P0-4  
P0-5  
P0-6  
P0-7  
EA  
MODE  
OFF  
XTAL1  
1
2
3
4
5
6
28  
27  
XTAL2  
RSTIN  
I/OUC  
26  
25  
24  
23  
CARD READ LM01  
CMDVCC  
AUX1UC  
AUX2UC  
ALARM  
CLKSEL  
CLKDIV1  
CLKDIV2  
STROBE  
CLKOUT  
DGND1  
AGND  
V
CC  
C5I  
C6I  
C1I  
C2I  
RST  
CLK  
P3-0  
P3-1  
P3-2  
P3-3  
P3-4  
P3-5  
P3-6  
P3-7  
XTAL2  
XTAL1  
80C51  
22  
21  
20  
19  
18  
17  
16  
15  
C7I  
C8I  
C3I  
C4I  
7
ALE  
TDA8002A  
AUX1  
PRES  
AUX2  
I/O  
8
9
PSEN  
P2-7  
P2-6  
P2-5  
P2-4  
P2-3  
P2-2  
P2-1  
P2-0  
10  
11  
12  
13  
14  
VUP  
S1  
K1  
K2  
V
S2  
DDA  
100  
nF  
V
SS  
10  
µF  
100  
nF  
100  
nF  
100  
nF  
MGE742  
Fig.14 Application diagram (for more details, consult “Application Note AN96096”).  
20  
1997 Nov 04  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
PACKAGE OUTLINES  
SO28: plastic small outline package; 28 leads; body width 7.5 mm  
SOT136-1  
D
E
A
X
c
y
H
v
M
A
E
Z
28  
15  
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
14  
w
detail X  
e
M
b
p
0
5
10 mm  
scale  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
max.  
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.30  
0.10  
2.45  
2.25  
0.49  
0.36  
0.32  
0.23  
18.1  
17.7  
7.6  
7.4  
10.65  
10.00  
1.1  
0.4  
1.1  
1.0  
0.9  
0.4  
mm  
2.65  
1.27  
0.050  
1.4  
0.25  
0.01  
0.25  
0.1  
0.25  
0.01  
8o  
0o  
0.012 0.096  
0.004 0.089  
0.019 0.013 0.71  
0.014 0.009 0.69  
0.30  
0.29  
0.419  
0.394  
0.043 0.043  
0.016 0.039  
0.035  
0.016  
inches 0.10  
0.055  
0.01 0.004  
Note  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
EIAJ  
95-01-24  
97-05-22  
SOT136-1  
075E06  
MS-013AE  
1997 Nov 04  
21  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm  
SOT401-1  
c
y
X
A
E
17  
24  
Z
16  
25  
E
e
A
H
2
E
A
(A )  
3
A
1
w M  
p
θ
pin 1 index  
b
L
p
32  
9
L
1
8
detail X  
Z
v M  
D
A
e
w M  
b
p
D
B
H
v
M
B
D
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
D
H
L
L
v
w
y
Z
Z
E
θ
1
2
3
p
E
p
D
max.  
7o  
0o  
0.15 1.5  
0.05 1.3  
0.27 0.18 5.1  
0.17 0.12 4.9  
5.1  
4.9  
7.15 7.15  
6.85 6.85  
0.75  
0.45  
0.95 0.95  
0.55 0.55  
mm  
1.60  
0.25  
0.5  
1.0  
0.2 0.12 0.1  
Note  
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
EIAJ  
95-12-19  
97-08-04  
SOT401-1  
1997 Nov 04  
22  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
If wave soldering cannot be avoided, for LQFP  
packages with a pitch (e) larger than 0.5 mm, the  
following conditions must be observed:  
SOLDERING  
Introduction  
There is no soldering method that is ideal for all IC  
packages. Wave soldering is often preferred when  
through-hole and surface mounted components are mixed  
on one printed-circuit board. However, wave soldering is  
not always suitable for surface mounted ICs, or for  
printed-circuits with high population densities. In these  
situations reflow soldering is often used.  
A double-wave (a turbulent wave with high upward  
pressure followed by a smooth laminar wave)  
soldering technique should be used.  
The footprint must be at an angle of 45° to the board  
direction and must incorporate solder thieves  
downstream and at the side corners.  
This text gives a very brief insight to a complex technology.  
A more in-depth account of soldering ICs can be found in  
our “IC Package Databook” (order code 9398 652 90011).  
SO  
Wave soldering techniques can be used for all SO  
packages if the following conditions are observed:  
A double-wave (a turbulent wave with high upward  
pressure followed by a smooth laminar wave) soldering  
technique should be used.  
Reflow soldering  
Reflow soldering techniques are suitable for all LQFP and  
SO packages.  
The longitudinal axis of the package footprint must be  
Reflow soldering requires solder paste (a suspension of  
fine solder particles, flux and binding agent) to be applied  
to the printed-circuit board by screen printing, stencilling or  
pressure-syringe dispensing before package placement.  
parallel to the solder flow.  
The package footprint must incorporate solder thieves at  
the downstream end.  
METHOD (LQFP AND SO)  
Several methods exist for reflowing; for example,  
infrared/convection heating in a conveyor type oven.  
Throughput times (preheating, soldering and cooling) vary  
between 50 and 300 seconds depending on heating  
method. Typical reflow peak temperatures range from  
215 to 250 °C.  
During placement and before soldering, the package must  
be fixed with a droplet of adhesive. The adhesive can be  
applied by screen printing, pin transfer or syringe  
dispensing. The package can be soldered after the  
adhesive is cured.  
Maximum permissible solder temperature is 260 °C, and  
maximum duration of package immersion in solder is  
10 seconds, if cooled to less than 150 °C within  
Wave soldering  
LQFP  
6 seconds. Typical dwell time is 4 seconds at 250 °C.  
Wave soldering is not recommended for LQFP packages.  
This is because of the likelihood of solder bridging due to  
closely-spaced leads and the possibility of incomplete  
solder penetration in multi-lead devices.  
A mildly-activated flux will eliminate the need for removal  
of corrosive residues in most applications.  
Repairing soldered joints  
CAUTION  
Fix the component by first soldering two diagonally-  
opposite end leads. Use only a low voltage soldering iron  
(less than 24 V) applied to the flat part of the lead. Contact  
time must be limited to 10 seconds at up to 300 °C. When  
using a dedicated tool, all other leads can be soldered in  
one operation within 2 to 5 seconds between  
270 and 320 °C.  
Wave soldering is NOT applicable for all LQFP  
packages with a pitch (e) equal or less than 0.5 mm.  
1997 Nov 04  
23  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
DEFINITIONS  
Data sheet status  
Objective specification  
Preliminary specification  
Product specification  
This data sheet contains target or goal specifications for product development.  
This data sheet contains preliminary data; supplementary data may be published later.  
This data sheet contains final product specifications.  
Limiting values  
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or  
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation  
of the device at these or at any other conditions above those given in the Characteristics sections of the specification  
is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices, or systems where malfunction of these  
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for  
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such  
improper use or sale.  
1997 Nov 04  
24  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
NOTES  
1997 Nov 04  
25  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
NOTES  
1997 Nov 04  
26  
Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
NOTES  
1997 Nov 04  
27  
Philips Semiconductors – a worldwide company  
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04552-903 São Paulo, SÃO PAULO - SP, Brazil,  
Tel. +55 11 821 2333, Fax. +55 11 829 1849  
France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex,  
Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427  
Spain: Balmes 22, 08007 BARCELONA,  
Tel. +34 3 301 6312, Fax. +34 3 301 4107  
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,  
Tel. +49 40 23 53 60, Fax. +49 40 23 536 300  
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,  
Tel. +46 8 632 2000, Fax. +46 8 632 2745  
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,  
Tel. +30 1 4894 339/239, Fax. +30 1 4814 240  
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,  
Tel. +41 1 488 2686, Fax. +41 1 481 7730  
Hungary: see Austria  
India: Philips INDIA Ltd, Band Box Building, 2nd floor,  
254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,  
Tel. +91 22 493 8541, Fax. +91 22 493 0966  
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,  
TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874  
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,  
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,  
Tel. +66 2 745 4090, Fax. +66 2 398 0793  
Indonesia: see Singapore  
Ireland: Newstead, Clonskeagh, DUBLIN 14,  
Tel. +353 1 7640 000, Fax. +353 1 7640 200  
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,  
Tel. +90 212 279 2770, Fax. +90 212 282 6707  
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,  
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007  
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,  
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461  
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,  
20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557  
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,  
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421  
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,  
Tel. +81 3 3740 5130, Fax. +81 3 3740 5077  
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,  
Tel. +1 800 234 7381  
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,  
Tel. +82 2 709 1412, Fax. +82 2 709 1415  
Uruguay: see South America  
Vietnam: see Singapore  
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,  
Tel. +60 3 750 5214, Fax. +60 3 757 4880  
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,  
Tel. +381 11 625 344, Fax.+381 11 635 777  
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,  
Tel. +9-5 800 234 7381  
Middle East: see Italy  
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,  
Internet: http://www.semiconductors.philips.com  
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825  
© Philips Electronics N.V. 1997  
SCA55  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license  
under patent- or other industrial or intellectual property rights.  
Printed in The Netherlands  
547047/1200/03/pp28  
Date of release: 1997 Nov 04  
Document order number: 9397 750 02454  

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