TDA8002CT/A/C1,512 [NXP]
TDA8002CT;
| 型号： | TDA8002CT/A/C1,512 |
| 厂家： | 
NXP |
| 描述： | TDA8002CT 光电二极管 外围集成电路 |
| 文件： | 总31页 (文件大小：176K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8002C
IC card interface
Product specification
1999 Oct 12
Supersedes data of 1999 Feb 24
File under Integrated Circuits, IC02
Philips Semiconductors
Product specification
IC card interface
TDA8002C
FEATURES
APPLICATIONS
• Single supply voltage interface (3.3 or 5 V environment) IC card readers for:
• Low-power sleep mode
• GSM applications
• Banking
• Three specific protected half-duplex bidirectional
buffered I/O lines
• Electronic payment
• Identification
• Pay TV
• VCC regulation 5 V ±5% or 3 V ±5%, ICC < 55 mA for
VDD = 3.0 to 6.5 V, with controlled rise and fall times
• Thermal and short-circuit protections with current
limitations
• Road tolling.
• Automatic ISO 7816 activation and deactivation
sequences
GENERAL DESCRIPTION
• Enhanced ESD protections on card side (>6 kV)
The TDA8002C is a complete low-power analog interface
for asynchronous and synchronous cards. It can be placed
between the card and the microcontroller. It performs all
supply, protection and control functions. It is directly
compatible with ISO 7816, GSM11.11 and EMV
specifications.
• Clock generation for the card up to 12 MHz with
synchronous frequency changes
• Clock generation up to 20 MHz (external clock)
• Synchronous and asynchronous cards (memory and
smart cards)
• ISO 7816, GSM11.11 compatibility and EMV
(Europay, MasterCard and Visa) compliant
• Step-up converter for VCC generation
• Supply supervisor for spikes elimination and emergency
deactivation
• Chip select input for easy use of several TDA8002Cs in
parallel.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
MARKING
NAME
DESCRIPTION
VERSION
TDA8002CT/A/C1 TDA8002CT/A
TDA8002CT/B/C1 TDA8002CT/B
TDA8002CT/C/C1 TDA8002CT/C
SO28
plastic small outline package; 28 leads; body width
7.5 mm
SOT136-1
TDA8002CG/C1
TDA8002C
LQFP32 plastic low profile quad flat package; 32 leads;
SOT401-1
body 5 × 5 × 1.4 mm
1999 Oct 12
2
Philips Semiconductors
Product specification
IC card interface
TDA8002C
QUICK REFERENCE DATA
SYMBOL
Supplies
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
VDD
supply voltage
supply current
supply current
supply current
3.0
−
−
−
6.5
150
5
V
IDD(lp)
low-power
−
−
µA
mA
IDD(idle)
IDD(active)
Idle mode; fCLKOUT = 10 MHz
active mode; VCC(O) = 5 V;
fCLKOUT = 10 MHz
fCLK = LOW; ICC = 100 µA
−
−
−
−
−
−
8
mA
mA
mA
fCLK = 5 MHz; ICC = 10 mA
CLK = 5 MHz; ICC = 55 mA
50
140
f
active mode; VCC(O) = 3 V;
fCLKOUT = 10 MHz
fCLK = LOW; ICC = 100 µA
fCLK = 5 MHz; ICC = 10 mA
fCLK = 5 MHz; ICC = 55 mA
−
−
−
−
−
−
8
mA
mA
mA
50
140
Card supply
VCC(O)
output voltage
active mode for VCC = 5 V
CC < 55 mA; DC load
I
4.6
4.6
−
−
5.4
5.4
V
V
ICC = 40 nAs; AC load
active mode for VCC = 3 V
I
CC < 55 mA; DC load
2.76
2.76
−
−
3.24
3.24
V
V
ICC = 40 nAs; AC load
General
fCLK
tde
card clock frequency
deactivation sequence duration
continuous total power dissipation
TDA8002CT/x
0
−
12
MHz
60
80
100
µs
Ptot
Tamb = −25 to +85 °C
−
−
−
−
0.56
0.46
+85
W
W
°C
TDA8002CG
Tamb = −25 to +85 °C
−
Tamb
ambient temperature
−25
1999 Oct 12
3
Philips Semiconductors
Product specification
IC card interface
TDA8002C
BLOCK DIAGRAM
V
V
DDD
100 nF
DDA
100 nF
470 nF
S1
14
S2
12
13
28
SUPPLY
AGND
11
15
STEP-UP CONVERTER
INTERNAL
REFERENCE
V
4
ref
ALARM
INTERNAL OSCILLATOR
2.5 MHz
VUP
VOLTAGE SENSE
470 nF
EN1 CLKUP
EN2
3
CS
26
OFF
V
CC
V
23
22
CC
ALARM
PV
CC
GENERATOR
100
nF
100
nF
25
24
27
19
RSTIN
CMDVCC
MODE
EN5
EN4
RST
BUFFER
RST
CV/TV
SEQUENCER
LATCH
6
7
CLKDIV1
CLKDIV2
CLKSEL
STROBE
21
18
CLOCK
BUFFER
CLK
5
8
CLOCK
CIRCUITRY
PRES
9
CLKOUT
CLK
EN3
THERMAL
PROTECTION
30
31
XTAL1
XTAL2
OSCILLATOR
20
17
16
1
2
I/O
AUX1
AUX2
I/O
AUX1UC
AUX2UC
TRANSCEIVER
TDA8002CG
I/O
TRANSCEIVER
32
I/O
I/OUC
TRANSCEIVER
29
10
FCE246
DGND2
DGND1
Fig.1 Block diagram.
4
1999 Oct 12
Philips Semiconductors
Product specification
IC card interface
TDA8002C
PINNING
PIN
TYPE TYPE TYPE TYPE
SYMBOL
I/O
DESCRIPTION
CT/A CT/B CT/C
CG
XTAL1
XTAL2
I/OUC
1
2
3
4
1
2
3
4
1
2
3
4
30
31
32
1
I
crystal connection or input for external clock
crystal connection
O
I/O
I/O
data I/O line to and from microcontroller
AUX1UC
auxiliary line 1 to and from microcontroller for synchronous
applications
AUX2UC
CS
5
−
−
2
3
I/O
I
auxiliary line 2 to and from microcontroller for synchronous
applications
−
5
5
chip select control input for enabling pins I/OUC, AUX1UC,
AUX2UC, CLKSEL, CLKDIV1, CLKDIV2, STROBE, CV/TV,
CMDVCC, RSTIN, OFF and MODE; note 1
ALARM
6
7
6
7
6
7
4
5
O
I
open drain PMOS reset output for microcontroller (active
HIGH)
CLKSEL
control input signal for CLK (LOW = XTAL oscillator;
HIGH = STROBE input)
CLKDIV1
CLKDIV2
STROBE
CLKOUT
DGND1
AGND
S2
8
8
8
6
I
I
control input with CLKDIV2 for choosing CLK frequency
control input with CLKDIV1 for choosing CLK frequency
external clock input for synchronous applications
clock output (see Table 1)
9
9
9
7
10
11
12
13
14
15
16
17
18
19
20
−
10
11
12
13
14
15
16
17
18
−
10
11
12
13
14
15
16
17
18
−
8
I
9
O
10
11
12
13
14
15
16
17
18
−
supply digital ground 1
supply analog ground
I/O
capacitance connection for voltage doubler
VDDA
supply analog supply voltage
S1
I/O
I/O
I/O
I/O
I
capacitance connection for voltage doubler
VUP
output of voltage doubler
I/O
data I/O line to and from card
AUX2
PRES
PRES
CV/TV
AUX1
CLK
auxiliary I/O line to and from card
card input presence contact (active LOW)
active HIGH card input presence contact
card voltage selection input line (high = 5 V, low = 3 V); note 1
auxiliary I/O line to and from card
clock to card output (C3I) (see Table 1)
card reset output (C2I)
19
20
−
19
−
I
−
20
21
22
23
24
25
19
20
21
22
23
24
I
21
22
23
24
25
21
22
23
24
25
I/O
O
O
O
I
RST
VCC
supply for card (C1I)
CMDVCC
start activation sequence input from microcontroller (active
LOW)
RSTIN
OFF
26
27
26
27
26
27
25
26
I
card reset input from microcontroller
O
open-drain NMOS interrupt output to microcontroller (active
LOW)
1999 Oct 12
5
Philips Semiconductors
Product specification
IC card interface
TDA8002C
PIN
TYPE TYPE TYPE TYPE
SYMBOL
I/O
DESCRIPTION
CT/A CT/B CT/C
CG
MODE
VDDD
28
−
28
−
28
−
27
28
29
I
operating mode selection input (HIGH = normal; LOW = sleep)
supply digital supply voltage
supply digital ground 2
DGND2
−
−
−
Note
1. A pull-up resistor of 100 kΩ connected to VDD is integrated.
handbook, halfpage
handbook, halfpage
XTAL1
MODE
OFF
1
2
28
27
26
25
24
XTAL1
MODE
OFF
1
2
28
27
26
25
24
XTAL2
I/OUC
XTAL2
I/OUC
3
RSTIN
CMDVCC
3
RSTIN
CMDVCC
AUX1UC
AUX2UC
ALARM
4
AUX1UC
CS
4
V
V
5
5
CC
CC
23 RST
CLK
6
ALARM
CLKSEL
CLKDIV1
CLKDIV2
STROBE
CLKOUT
6
23 RST
CLK
CLKSEL
CLKDIV1
CLKDIV2
STROBE
CLKOUT
22
7
22
7
TDA8002CT/A
TDA8002CT/B
8
21 AUX1
8
21 AUX1
PRES
AUX2
I/O
9
20
19
18
17
16
15
PRES
PRES
I/O
9
20
19
18
17
16
15
10
11
10
11
DGND1 12
AGND
VUP
S1
DGND1 12
AGND
VUP
S1
13
S2 14
13
S2 14
V
V
DDA
DDA
FCE247
FCE248
Fig.2 Pin configuration (TDA8002CT/A).
Fig.3 Pin configuration (TDA8002CT/B).
1999 Oct 12
6
Philips Semiconductors
Product specification
IC card interface
TDA8002C
handbook, halfpage
XTAL1
MODE
OFF
1
2
28
27
26
25
24
XTAL2
I/OUC
3
RSTIN
CMDVCC
AUX1UC
CS
4
V
5
CC
ALARM
CLKSEL
CLKDIV1
CLKDIV2
STROBE
CLKOUT
6
23 RST
CLK
22
7
TDA8002CT/C
8
21 AUX1
CV/TV
PRES
I/O
9
20
19
18
17
16
15
10
11
DGND1 12
AGND
VUP
S1
13
S2 14
V
DDA
FCE249
Fig.4 Pin configuration (TDA8002CT/C).
1
2
3
4
5
6
7
8
24
CMDVCC
AUX1UC
AUX2UC
CS
V
23
22
21
20
19
18
17
CC
RST
ALARM
CLKSEL
CLKDIV1
CLKDIV2
STROBE
CLK
TDA8002CG
AUX1
CV/TV
PRES
AUX2
FCE250
Fig.5 Pin configuration (TDA8002CG).
7
1999 Oct 12
Philips Semiconductors
Product specification
IC card interface
TDA8002C
FUNCTIONAL DESCRIPTION
Power supply
Clock circuitry
The TDA8002C supports both synchronous and
asynchronous cards. There are three methods to clock the
circuitry:
The supply pins for the chip are VDDA, VDDD, AGND,
DGND1 and DGND2. VDDA and VDDD (i.e. VDD) should be
in the range of 3.0 to 6.5 V. All card contacts remain
inactive during power-up or power-down.
• Apply a clock signal to pin STROBE
• Use of an internal RC oscillator
• Use of a quartz oscillator which should be connected
between pins XTAL1 and XTAL2 or an external clock
applied on XTAL1.
On power-up, the logic is reset by an internal signal.
The sequencer is not activated until VDD reaches
Vth2 + Vhys2 (see Fig.6). When VDD falls below Vth2, an
automatic deactivation sequence of the contacts is
performed.
When CLKSEL is HIGH, the clock should be applied to the
STROBE pin. When CLKSEL is LOW, the internal
oscillators is used.
Chip selection
When an internal clock is used, the clock output is
available on pin CLKOUT. The RC oscillator is selected by
making CLKDIV1 HIGH and CLKDIV2 LOW. The clock
output to the card is available on pin CLK. The frequency
of the card clock can be the input frequency divided by
2 or 4, STOP low or 1.25 MHz, depending on the states of
CLKDIV1 or CLKDIV2 (see Table 1).
The chip select pin (CS) allows the use of several
TDA8002Cs in parallel.
When CS is HIGH, the pins RSTN, CMDVCC, MODE,
CV/TV, CLKDIV1, CLKDIV2, CLKSEL and STROBE
control the chip, pins I/OUC, AUX1UC and AUX2UC are
the copy of I/O, AUX1 and AUX2 when enabled (with
integrated 20 kΩ pull-up resistors connected to VDD) and
OFF is enabled.
When STROBE is used for entering the clock to a
synchronous card, STROBE should remain stable during
activation sequence otherwise the first pulse may be
omitted.
When CS goes LOW, the levels on pins RSTIN,
CMDVCC, MODE, CV/TV, CLKDIV1, CLKDIV2 and
STROBE are internally latched, I/OUC, AUX1UC and
AUX2UC go to high-impedance with respect to I/O, AUX1
and AUX2 (with integrated 100 kΩ pull-up resistors
connected to VDD) and OFF is high-impedance.
Do not change CLKSEL during activation. When in
low-power (sleep) mode, the internal oscillator frequency
which is available on pin CLKOUT is lowered to
approximately 16 kHz for power economy purposes.
Supply voltage supervisor (VDD
)
This block surveys the VDD supply. A defined retriggerable
pulse of 10 ms minimum (tW) is delivered on the ALARM
output during power-up or power-down of VDD (see Fig.6).
This signal is also used for eliminating the spikes on card
contacts during power-up or power-down.
When VDD reaches Vth2 + Vhys2, an internal delay (tW) is
started. The ALARM output is active until this delay has
expired. When VDD falls below Vth2, ALARM is activated
and a deactivation sequence of the contacts is performed.
1999 Oct 12
8
Philips Semiconductors
Product specification
IC card interface
TDA8002C
V
V
+ V
hys2
th2
th2
V
DD
t
t
W
W
ALARM
FCE272
Fig.6 ALARM as a function of VDD (tW pulse width minimum of 10 ms).
CS
OFF, I/OUC
AUX1UC, AUX2UC
t
t
DZ
SL
CS
INPUTS
FCE245
t
t
t
t
DI
IS
SI
ID
Fig.7 Chip select.
1999 Oct 12
9
Philips Semiconductors
Product specification
IC card interface
TDA8002C
Table 1 Clock circuitry definition
FREQUENCYOF FREQUENCYOF
MODE
CLKSEL
CLKDIV1
CLKDIV2
CLK
CLKOUT
HIGH
HIGH
HIGH
HIGH
HIGH
LOW(2)
LOW
LOW
LOW
LOW
HIGH
X(1)
HIGH
LOW
LOW
HIGH
X(1)
LOW
LOW
HIGH
HIGH
X(1)
1⁄2fint
1⁄4fxtal
1⁄2fxtal
1⁄2fint
fxtal
fxtal
fxtal
fxtal
STOP low
STROBE
STOP low
(3)
X(1)
X(1)
1⁄2fint
Notes
1. X = don’t care.
2. In low-power mode.
3. fint = 32 kHz in low-power mode.
I/O circuitry
In the event of a conflict, both lines may remain LOW until
the software enables the lines to be HIGH. The anti-latch
circuitry ensures that the lines do not remain LOW if both
sides return HIGH, regardless of the prior conditions.
The maximum frequency on the lines is approximately
200 kHz.
The three I/O transceivers are identical. The state is HIGH
for all I/O pins (i.e. I/O, I/OUC, AUX1, AUX1UC, AUX2 and
AUX2UC). Pin I/O is referenced to VCC and pin I/OUC to
VDD, thus ensuring proper operation in the event that
VCC ≠ VDD.
When CS is HIGH, I/OUC, AUX1UC and AUX2UC are
internally pulled-up to VDD with 20 kΩ resistors. When
CS is LOW, I/OUC, AUX1UC and AUX2UC are
permanently HIGH (with integrated 100 kΩ pull-up
resistors connected to VDD).
The first side on which a falling edge is detected becomes
a master (input). An anti-latch circuitry first disables the
detection of the falling edge on the other side, which
becomes slave (output), see Fig.8.
After a delay time td (between 50 and 400 ns), the logic 0
present on the master side is transferred on the slave side.
When the input is back to HIGH level, a current booster is
turned on during the delay td on the output side and then
both sides are back to their idle state, ready to detect the
next logic 0 on any side.
I/O
I/OUC
t
t
t
d
conflict
idle
d
d
MGD703
Fig.8 Master and slave signals.
10
1999 Oct 12
Philips Semiconductors
Product specification
IC card interface
TDA8002C
Logic circuitry
If pin MODE goes LOW in the active mode, a normal
deactivation sequence is performed before entering the
low-power mode. When pin MODE goes HIGH, the circuit
enters the normal operating mode after a delay of at least
6 ms (96 cycles of CLKOUT). During this time the
CLKOUT remains at 16 kHz.
After power-up, the circuit has six possible states of
operation. Figure 9 shows the state diagram.
IDLE MODE
After reset, the circuit enters the idle mode. A minimum
number of functions in the circuit are active while waiting
for the microcontroller to start a session:
• All card contacts are inactive
• Oscillator (XTAL) does not operate
• The VDD supervisor, ALARM output, card presence
detection and OFF output remain functional
• All card contacts are inactive
• I/OUC, AUX1UC and AUX2UC are high-impedance
• Oscillator (XTAL) runs, delivering CLKOUT
• Voltage supervisor is active.
• Internal oscillator is slowed to 32 kHz, providing 16 kHz
on CLKOUT.
ACTIVE MODE
LOW-POWER MODE
When the activation sequence is completed, the
When pin MODE goes LOW, the circuit enters the
low-power (sleep) mode. As long as pin MODE is LOW no
activation is possible.
TDA8002C will be in the active mode. Data is exchanged
between the card and the microcontroller via the I/O lines.
ACTIVATION
POWER
OFF
IDLE
MODE
ACTIVE
FAULT
MODE
LOW-POWER
MODE
DEACTIVATION
MGE735
Fig.9 State diagram.
1999 Oct 12
11
Philips Semiconductors
Product specification
IC card interface
TDA8002C
ACTIVATION SEQUENCE
2. VCC rises from 0 to 3 or 5 V (t2 = t1 + 11⁄2T) (according
to the state on pin CV/TV)
From Idle mode, the circuit enters the activation mode
when the microcontroller sets the CMDVCC line LOW or
sets the MODE line HIGH when the CMDVCC line is
already LOW. The internal circuitry is then activated, the
internal clock is activated and an activation sequence is
executed. When RST is enabled it becomes the inverse of
RSTIN.
3. I/O, AUX1 and AUX2 are enabled and CLK is enabled
(t3 = t1 + 4T); I/O, AUX1 and AUX2 were forced LOW
until this time
4. CLK is set by setting RSTIN to HIGH (t4)
5. RST is enabled (t5 = t1 + 7T); after t5, RSTIN has no
further action on CLK, but is only controlling RST.
Figures 10 to 12 illustrate the activation sequence as
follows:
The value of VCC (5 or 3 V) must be selected by the level
on pin CV/TV before the activation sequence.
1. Step-up converter is started (t1 ≈ t0)
OSC_INT/64
t
act
T = 25 µs
t
CMDVCC
VUP
0
t
1
t
V
2
CC
t
t
3
5
I/O
CLK
LOW
t
4
RSTIN
RST
FCE273
Fig.10 Activation sequence using RSTIN and CMDVCC.
1999 Oct 12
12
Philips Semiconductors
Product specification
IC card interface
TDA8002C
OSC_INT/64
t
act
CLKDIV1
CLKDIV2
t
CMDVCC
VUP
0
t
1
t
V
2
CC
t
3
I/O
CLK
LOW
RSTIN
RST
FCE274
Fig.11 Activation sequence using CMDVCC, CLKDIV1 and CLKDIV2 signals to enable CLK.
CMDVCC
V
CC
I/O
AUX1UC
AUX1
RSTIN
RST
t
act
STROBE
CLK
FCE251
Fig.12 Activation sequence for synchronous application.
13
1999 Oct 12
Philips Semiconductors
Product specification
IC card interface
TDA8002C
DEACTIVATION SEQUENCE
1. RST goes LOW (t11 ≈ t10)
2. CLK is stopped (t12 = t11 + 1⁄2T)
When a session is completed, the microcontroller sets the
CMDVCC line to HIGH state or MODE line to LOW state.
The circuit then executes an automatic deactivation
sequence by counting the sequencer down and thus end
in the Idle mode.
3. I/O, AUX1 and AUX2 fall to zero (t13 = t11 + T)
4. VCC falls to zero (t14 = t11 + 11⁄2T); a special circuit
ensures that I/O remains below VCC during the falling
slope of VCC
Figures 13 and 14 illustrate the deactivation sequence as
follows:
5. VUP falls (t15 = t11 + 5T).
t
de
OSC_INT/64
t
10
CMDVCC
VUP
t
15
t
14
V
CC
t
13
I/O
CLK
LOW
t
12
RSTIN
RST
t
11
FCE479
Fig.13 Deactivation sequence
1999 Oct 12
14
Philips Semiconductors
Product specification
IC card interface
TDA8002C
Fault detection
When one or more of these faults are detected, the circuit
pulls the interrupt line OFF to its active LOW state and a
deactivation sequence is initiated. In the event that the
card is present the interrupt line OFF is set to HIGH state
when the microcontroller has reset the CMDVCC line
HIGH (after completion of the deactivation sequence).
In the event that the card is not present OFF remains
LOW.
The following fault conditions are monitored by the circuit:
• Short-circuit or high current on VCC
• Removing card during transaction
• VDD dropping
• Overheating.
t
de
OSC_INT/64
t
OFF
10
PRES
t
14
V
CC
t
13
I/O
CLK
RST
LOW
t
12
t
11
FCE480
Fig.14 Emergency deactivation sequence.
1999 Oct 12
15
Philips Semiconductors
Product specification
IC card interface
TDA8002C
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); note 1.
SYMBOL
VDDD
PARAMETER
digital supply voltage
CONDITIONS
MIN.
−0.3
MAX.
+6.5
UNIT
V
V
V
VDDA
VCC
analog supply voltage
−0.3
−0.3
+6.5
+6.5
card supply voltage pins;
XTAL1, XTAL2, ALARM, CS, MODE,
RSTIN, CLKSEL, AUX2UC, AUX1UC,
CLKDIV1, CLKDIV2, CLKOUT,
STROBE, CMDVCC, CV/TV and OFF
Vi(card)
input voltage on card contact pins;
I/O, AUX2, PRES, PRES, AUX1, CLK,
RST and VCC
−0.3
−6
+6.5
+6
V
Ves
electrostatic handling voltage
on pins I/O, AUX2, PRES, PRES,
AUX1, CLK, RST and VCC
kV
on all other pins
−2
+2
kV
Tstg
Ptot
storage temperature
continuous total power dissipation
TDA8002CT/x
−55
+125
°C
T
amb = −25 to +85 °C
amb = −25 to +85 °C
−
0.56
0.46
+85
150
W
W
°C
°C
TDA8002CG
T
−
Tamb
Tj
ambient temperature
junction temperature
−25
−
Note
1. Stress beyond these levels may cause permanent damage to the device. This is a stress rating only and functional
operation of the device under this condition is not implied.
HANDLING
Every pin withstands the ESD test according to MIL-STD-883C class 3 for card contacts, class 2 for the remaining.
Method 3015 (HBM 1500 Ω, 100 pF) 3 positive pulses and 3 negative pulses on each pin with respect to ground.
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
PARAMETER
CONDITIONS
VALUE
UNIT
thermal resistance from junction to ambient
in free air
SOT136-1
SOT401-1
70
91
K/W
K/W
1999 Oct 12
16
Philips Semiconductors
Product specification
IC card interface
TDA8002C
CHARACTERISTICS
VDD = 3.3 V; Tamb = 25 °C; fxtal = 10 MHz; unless otherwise specified.
SYMBOL
Supplies
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDD
supply voltage
3
−
−
−
−
−
6.5
V
IDD(lp)
supply current
supply current
supply current
low-power mode
150
5
µA
mA
IDD(idle)
IDD(active)
Idle mode; fCLKOUT = 10 MHz
active mode; VCC(O) = 5 V;
fCLKOUT = 10 MHz
f
CLK = LOW; ICC = 100 µA
−
−
−
−
−
−
8
mA
mA
mA
fCLK = 5 MHz; ICC = 10 mA
50
140
fCLK = 5 MHz; ICC = 55 mA
active mode; VCC(O) = 3 V;
fCLKOUT = 10 MHz
fCLK = LOW; ICC = 100 µA
fCLK = 5 MHz; ICC = 10 mA
fCLK = 5 MHz; ICC = 55 mA
−
−
−
−
−
−
−
8
mA
mA
mA
V
50
140
2.4
Vth2
threshold voltage on VDD for falling
voltage supervisor
2.2
Vhys2
hysteresis on Vth2
50
100
150
mV
Card supply
VCC(O)
output voltage
Idle mode
−
−
−
0.3
5.4
V
V
active mode
VCC = 5 V; ICC < 55 mA;
DC load
4.6
I
CC = 40 nAs; AC load
4.6
−
−
5.4
V
V
V
CC = 3 V; ICC < 55 mA;
2.76
3.24
DC load
ICC = 24 nAs; AC load
VCC(O) = from 0 to 5 or 3 V
2.76
−
−
3.24
55
V
ICC(O)
output current
slew rate
−
mA
mA
V/µs
VCC short-circuited to ground
−
200
0.15
−
SR
rising or falling slope
0.10
0.20
Crystal connections (XTAL1 and XTAL2)
Cext
fxtal
external capacitors
note 1
note 2
−
15
−
pF
resonance frequency
2
−
24
MHz
1999 Oct 12
17
Philips Semiconductors
Product specification
IC card interface
TDA8002C
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Data lines
GENERAL
td(edge)
delay between falling edge
of I/O, AUX1, AUX2, I/OUC,
AUX1UC and AUX2UC
−
−
1
µs
tr, tf
rise and fall times
Ci = Co = 30 pF
−
−
−
−
0.5
µs
fI/O(max)
maximum frequency on
data lines
200
kHz
DATA LINES I/O, AUX1 AND AUX2 (WITH 10 KΩ PULL-UP RESISTOR CONNECTED TO VCC
)
Vo
output voltage
Idle and low-power modes
0
−
−
0.3
V
V
VOH
HIGH-level output voltage
on data lines
IOH = −20 µA
0.8VCC
VCC
VOL
VIH
VIL
LOW-level output voltage on II/O = 1 mA
data lines
−
−
−
−
−
0.4
VCC
0.5
0.4
12
V
HIGH-level input voltage on
data lines
0.6VCC
V
LOW-level input voltage on
data lines
0
−
8
−
−
−
V
Vidle
Rpu
Iedge
IIL
voltage on data lines
outside a session
V
internal pull-up resistance
between data lines and VCC
10
1
kΩ
mA
µA
µA
current from data lines
when active pull-up is active
−
LOW-level input current on VIL = 0.4 V
data lines
−
−600
10
IIH
HIGH-level input current on VIH = VCC
data lines
−
DATA LINES I/OUC, AUX1UC AND AUX2UC (WITH 20 KΩ PULL-UP RESISTOR CONNECTED TO VDD WHEN CS IS HIGH AND
100 KΩ WHEN CS IS LOW)
VOH
VOL
VIH
HIGH-level output voltage
on data lines
IOH = −20 µA
V
DD − 1
−
−
−
−
−
VDD + 0.2
V
LOW-level output voltage on II/OUC = 1 mA
data lines
−
0.4
V
HIGH-level input voltage on
data lines
0.7VDD
VDD
V
VIL
LOW-level input voltage on
data lines
0
0.3VDD
−
V
Zidle
impedance on data lines
outside a session
10
MΩ
ALARM and OFF when connected (open-drain outputs)
IOH(OFF)
HIGH-level output current
on pin OFF
VOH(OFF) = 5 V
−
−
5
µA
1999 Oct 12
18
Philips Semiconductors
Product specification
IC card interface
TDA8002C
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
0.4
UNIT
VOL(OFF)
LOW-level output voltage on IOL(OFF) = 2 mA
pin OFF
−
−
V
6
−
−
−
−
V
IOL(ALARM)
LOW-level output current on VOL(ALARM) = 0 V
pin ALARM
−5
−
µA
V
VOH(ALARM) HIGH-level output voltage
on pin ALARM
IOH(ALARM) = −2 mA
DD − 1
tW
ALARM pulse width
20
ms
Clock output (CLKOUT; powered from VDD
)
fCLKOUT
frequency on CLKOUT
0
−
0
V
−
−
20
−
MHz
kHz
V
low power
16
VOL
VOH
tr, tf
δ
LOW-level output voltage
HIGH-level output voltage
rise and fall times
IOL = 1 mA
−
0.5
−
IOH = −1 mA
DD − 0.5 −
V
CL = 15 pF; notes 3 and 4
CL = 15 pF; notes 3 and 4
−
8
ns
duty factor
40
−
60
%
Internal oscillator
fint frequency of internal
oscillator
Card reset output (RST)
active mode
sleep mode
2
2.5
32
3
MHz
kHz
−
−
VO(inact)
td(RST)
output voltage
inactive modes
RST enabled
0
−
−
0.3
V
delay between RSTIN and
RST
−
100
ns
VOL
VOH
tr, tf
LOW-level output voltage
HIGH-level output voltage
rise and fall times
IOL = 200 µA
IOH = −200 µA
CL = 30 pF
0
−
−
0.3
VCC
0.5
V
V
CC − 0.5 −
V
−
ns
Card clock output (CLK)
VO(inact)
VOL
VOH
tr, tf
δ
output voltage
inactive modes
IOL = 200 µA
0
−
−
0.3
0.3
VCC
8
V
LOW-level output voltage
HIGH-level output voltage
rise and fall times
duty factor
0
V
IOH = −50 µA
V
CC − 0.5 −
V
CL = 30 pF; note 3
CL = 30 pF; note 3
−
−
−
−
ns
%
45
0.2
55
−
SR
slew rate (rise and fall)
V/ns
Strobe input (STROBE)
fSTROBE frequency on STROBE
VIL
0
−
−
−
10
MHz
V
LOW-level input voltage
HIGH-level input voltage
0
0.3VDD
VDD
VIH
0.7VDD
V
Logic inputs (CLKSEL, CLKDIV1, CLKDIV2, MODE, CMDVCC and RSTIN); note 5
VIL
VIH
LOW-level input voltage
HIGH-level input voltage
0
−
−
0.3VDD
VDD
V
V
0.7VDD
1999 Oct 12
19
Philips Semiconductors
Product specification
IC card interface
TDA8002C
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
LOGIC INPUTS (CV/TV AND CS) (INTEGRATED 10 KΩ PULL-UP RESISTOR CONNECTED TO VDD); note 5
VIL
VIH
LOW-level input voltage
HIGH-level input voltage
0
−
−
0.3VDD
VDD
V
V
0.7VDD
Logic inputs PRES and PRES; note 5
VIL
LOW-level input voltage
HIGH-level input voltage
0
−
−
−
0.3VDD
VDD
V
VIH
0.7VDD
V
IIL(PRES)
LOW-level input current on VOL = 0 V
pin PRES
−
−10
µA
IIH(PRES)
HIGH-level input current on
pin PRES
−
−
10
µA
Protections
Tsd
shut-down local
temperature
−
−
135
−
°C
ICC(sd)
Timing
tact
shut-down current at VCC
−
90
mA
activation sequence
duration
guaranteed by design;
see Fig.12
−
180
70
−
220
100
130
−
µs
µs
µs
µs
tde
t3
deactivation sequence
duration
guaranteed by design;
see Fig.14
50
−
start of the window for
sending CLK to the card
see Figs 10 and 11
t5
end of the window for
see Fig.11
150
−
sending CLK to the card
tIS
tSI
tID
tDI
tSL
time from input to select
time from select to input
time from input to deselect
time from deselect to input
100
1000
1000
100
−
−
−
−
−
−
−
ns
ns
ns
ns
ns
−
−
−
time from select to low
impedance
40
tDZ
time from deselect to high
impedance
pull-up resistor at pin
OFF = 10 kΩ; 1 device
−
−
6
ns
2 devices in parallel
−
−
−
−
3
ns
ns
tr(max)
tf(max)
maximum rise time on pin
CS
100
maximum fall time on pin
CS
−
−
100
ns
1999 Oct 12
20
Philips Semiconductors
Product specification
IC card interface
TDA8002C
Notes
1. It may be necessary to connect capacitors from XTAL1 and XTAL2 to ground depending on the choice of crystal or
resonator.
2. When the oscillator is stopped in mode 1, XTAL1 is set to HIGH.
t1
3. The transition time and duty cycle definitions are shown in Fig.15; δ =
--------------
t1 + t2
4. CLKOUT transition time and duty cycle do not need to be tested.
5. PRES and CMDVCC are active LOW; RSTIN, PRES and CS are active HIGH.
t
t
f
r
V
90%
90%
OH
1/2 V
CC
10%
10%
V
OL
t
t
1
2
MGE741
Fig.15 Definition of transition times.
1999 Oct 12
21
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i
V
DD
J1 1
3.3 V or 5 V
ground
V
DD
C1
100 nF
C2
10 µF
V
P1-0
P1-1
P1-2
P1-3
P1-4
P1-5
P1-6
P1-7
RST
CC
1
2
3
4
5
6
40
39
38
37
J1 2
P0-0
P0-1
P0-2
P0-3
P0-4
P0-5
P0-6
P0-7
EA
33 pF
33 pF
14.745
MHz
XTAL1
XTAL2
I/OUC
MODE
OFF
1
2
3
4
5
6
28
27
C4
C3
C8
C7
36
35
34
33
RSTIN
(2)
26
25
24
23
C2
C1
C6
C5
C3
100
nF
7
AUX1UC
CS
CMDVCC
V
8
CC
C5I C1I
C6I C2I
9
32
31
30
29
28
27
RST
CLK
ALARM
CLKSEL
CLKDIV1
CLKDIV2
STROBE
CLKOUT
DGND1
AGND
IC2
P3-0
P3-1
P3-2
P3-3
P3-4
P3-5
P3-6
P3-7
XTAL2
XTAL1
10
11
12
13
14
IC1
80C51
22
21
20
19
18
17
16
15
C7I C3I
C8I C4I
7
8
ALE
TDA8002CT/C
AUX1
CV/TV
PRES
I/O
PSEN
P2-7
P2-6
P2-5
P2-4
P2-3
P2-2
P2-1
P2-0
9
CARD READ
10
11
12
13
14
(1)
15
16
VUP
S1
26
25
24
23
K1
K2
V
17
18
19
20
S2
DDA
(5)
C6
470 nF
22
21
V
(3)
(4)
SS
C4
100 nF
C5
C7
100 nF
C8
10 µF
470 nF
FCE195
V
DD
TDA8002C should be placed as close as possible to the card reader.
(1) Contact normally open.
(2) C3 close to pin VCC of TDA8002C.
(3) C4 close to C1 contact of card reader.
(4) C5 close to VUP pin of TDA8002C.
CLK line may be shielded with respect to other lines.
Decoupling capacitors C7 and C8 may be placed as close as possible to pin VDDA
A good ground plane is recommended.
.
(5) C6 as close as possible to pins S1 and S2.
Fig.16 Application diagram.
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e
V
DD
J1 1
3.3 V or 5 V
ground
V
DD
C1
100 nF
C2
10 µF
V
P1-0
P1-1
P1-2
P1-3
P1-4
P1-5
P1-6
P1-7
RST
CC
J1 2
1
2
3
4
5
6
40
39
38
37
33 pF
33 pF
P0-0
P0-1
P0-2
P0-3
P0-4
P0-5
P0-6
P0-7
EA
V
DD
C9
14.745 MHz
100 nF
C4
C3
C8
C7
36
35
34
33
C2
C1
C6
C5
25 26 27 28 29 30 31 32
(2)
C3
100 nF
7
AUX1UC
AUX2UC
CS
CMDVCC
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
V
8
CC
C5I C1I
C6I C2I
9
32
31
30
29
28
27
RST
CLK
P3-0
P3-1
P3-2
P3-3
P3-4
P3-5
P3-6
P3-7
XTAL2
XTAL1
10
11
12
13
14
ALARM
CLKSEL
CLKDIV1
CLKDIV2
STROBE
IC2
C7I C3I
C8I C4I
IC1
ALE
80C51
AUX1
CV/TV
PRES
AUX2
TDA8002CG
PSEN
P2-7
P2-6
P2-5
P2-4
P2-3
P2-2
P2-1
P2-0
CARD READ
(1)
15
16
26
25
24
23
K1
16 15 14 13 12 11 10
9
K2
17
18
19
20
(5)
C6
470 nF
(4)
22
21
V
SS
(3)
C4
C5
100 nF
470 nF
C7
100 nF
C8
10 µF
FCE196
V
DD
TDA8002C should be placed as close as possible to the card reader.
(1) Contact normally open.
(2) C3 close to pin VCC of TDA8002C.
(3) C4 close to C1 contact of card reader.
(4) C5 close to VUP pin of TDA8002C.
CLK line may be shielded with respect to other lines.
Decoupling capacitors C7, C8 and C9 may be placed as close as possible to pin VDDA and VDDD
A good ground plane is recommended.
.
(5) C6 as close as possible to pins S1 and S2.
Fig.17 Application diagram (for more details, see “Application note AN98054”).
Philips Semiconductors
Product specification
IC card interface
TDA8002C
PACKAGE OUTLINES
SO28: plastic small outline package; 28 leads; body width 7.5 mm
SOT136-1
D
E
A
X
c
y
H
v
M
A
E
Z
28
15
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
14
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.30
0.10
2.45
2.25
0.49
0.36
0.32
0.23
18.1
17.7
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
mm
2.65
1.27
0.050
1.4
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.71
0.014 0.009 0.69
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches 0.10
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-01-24
97-05-22
SOT136-1
075E06
MS-013AE
1999 Oct 12
24
Philips Semiconductors
Product specification
IC card interface
TDA8002C
LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm
SOT401-1
c
y
X
A
E
17
24
Z
16
25
E
e
A
H
2
E
A
(A )
3
A
1
w M
p
θ
pin 1 index
b
L
p
32
9
L
1
8
detail X
Z
v M
D
A
e
w M
b
p
D
B
H
v
M
B
D
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
D
H
L
L
v
w
y
Z
Z
E
θ
1
2
3
p
E
p
D
max.
7o
0o
0.15 1.5
0.05 1.3
0.27 0.18 5.1
0.17 0.12 4.9
5.1
4.9
7.15 7.15
6.85 6.85
0.75
0.45
0.95 0.95
0.55 0.55
mm
1.60
0.25
0.5
1.0
0.2 0.12 0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-12-19
97-08-04
SOT401-1
1999 Oct 12
25
Philips Semiconductors
Product specification
IC card interface
TDA8002C
SOLDERING
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Reflow soldering
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Wave soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
1999 Oct 12
26
Philips Semiconductors
Product specification
IC card interface
TDA8002C
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
WAVE
REFLOW(1)
BGA, SQFP
not suitable
suitable
suitable
suitable
suitable
suitable
HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable(2)
PLCC(3), SO, SOJ
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
suitable
not recommended(3)(4)
not recommended(5)
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1999 Oct 12
27
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For all other countries apply to: Philips Semiconductors,
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International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
68
SCA
© Philips Electronics N.V. 1999
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545004/25/03/pp28
Date of release: 1999 Oct 12
Document order number: 9397 750 06149
Go to Philips Semiconductors' home page
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Communications
The TDA8002C is a complete low-power analog interface for asynchronous and synchronous cards. It can be placed between the card and
the microcontroller. It performs all supply, protection and control functions. It is directly compatible with ISO 7816, GSM11.11 and EMV
specifications.
PC/PC-peripherals
Cross reference
Models
Features
Packages
Application notes
Selection guides
Other technical documentation
End of Life information
Datahandbook system
l Single supply voltage interface (3.3 or 5 V environment)
l Low-power sleep mode
l Three specific protected half-duplex bidirectional buffered I/O lines
l VCC regulation 5 V ± 5% or 3 V ± 5%, ICC < 55 mA for VDD = 3.0 to 6.5 V, with controlled rise and fall times
l Thermal and short-circuit protections with current limitations
l Automatic ISO 7816 activation and deactivation sequences
l Enhanced ESD protections on card side (> 6 kV)
l Clock generation for the card up to 12 MHz with synchronous frequency changes
l Clock generation up to 20 MHz (external clock)
l Synchronous and asynchronous cards (memory and smart cards)
l ISO 7816, GSM11.11 compatibility and EMV (Europay, MasterCard® and Visa) compliant
l Step-up converter for VCC generation
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TDA8002C
TDA8002C
l Supply supervisor for spikes elimination and emergency deactivation
l Chip select input for easy use of several TDA8002Cs in parallel.
Applications
IC card readers for:
l GSM applications
l Banking
l Electronic payment
l Identification
l Pay TV
l Road tolling.
Datasheet
File
size
(kB)
Publication
release date Datasheet status
Page
count
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Title
Datasheet
Download
TDA8002C IC card interface
12-Oct-99
Product
28
139
Specification
Products, packages, availability and ordering
North American
Partnumber
Order code
(12nc)
Partnumber
marking/packing
package device status buy online
SOT401 Full production
Standard Marking * Reel Dry
Pack, SMD, 13"
TDA8002CG/C1
TDA8002CGB-T
9352 617 09518
TDA8002CT/A/C1 TDA8002C/AD
TDA8002C/AD-T
9352 616 33112 Standard Marking * Tube
SOT136 Full production
SOT136 Full production
SOT136 Full production
SOT136 Full production
SOT136 Full production
SOT136 Full production
-
-
-
-
Standard Marking * Reel Pack,
9352 616 33118
SMD, 13"
TDA8002CT/B/C1 TDA8002C/BD
TDA8002C/BD-T
9352 616 51112 Standard Marking * Tube
Standard Marking * Reel Pack,
9352 616 51118
SMD, 13"
TDA8002CT/C/C1 TDA8002C/CD
TDA8002C/CD-T
9352 616 52112 Standard Marking * Tube
Standard Marking * Reel Pack,
9352 616 52118
SMD, 13"
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